GB975832A - Semiconductor switching circuit arrangement - Google Patents
Semiconductor switching circuit arrangementInfo
- Publication number
- GB975832A GB975832A GB3066461A GB3066461A GB975832A GB 975832 A GB975832 A GB 975832A GB 3066461 A GB3066461 A GB 3066461A GB 3066461 A GB3066461 A GB 3066461A GB 975832 A GB975832 A GB 975832A
- Authority
- GB
- United Kingdom
- Prior art keywords
- reactor
- transistor
- current
- condition
- output circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
- H03K17/66—Switching arrangements for passing the current in either direction at will; Switching arrangements for reversing the current at will
- H03K17/661—Switching arrangements for passing the current in either direction at will; Switching arrangements for reversing the current at will connected to both load terminals
Abstract
975,832. Transistor switching circuits. J. B. M. CLIFTON. Aug. 25, 1961 [Sept. 29, 1960], No. 30664/61. Heading H3T. To minimise the power loss during the transitory period of switching a transistor or S.C.R. from the " off " condition to the " on " condition, a saturable core reactor is connected in the output circuit to limit the current flow through the transistor or S.C.R. As shown in Fig. 1 a reactor 17 is connected in the output circuit of a transistor 8 which is rendered conducting and non-conducting by pulses from square-wave generator 9. During the transient time when the transistor is switched from cutoff to the " on " condition, the reactor limits the collector current to the magnetizing current, but when, due to the voltage drop across the reactor, the reactor becomes saturated, its impedance reduces to zero and full current in the output circuit is established substantially instantaneously. The reactor 17 is demagnetized during the cut-off period of the transistor by current passing through winding 19 of the reactor connected across the collector bias supply 13. Fig. 2 shows a push-pull arrangement of the circuit of Fig. 1.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US5921760A | 1960-09-29 | 1960-09-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB975832A true GB975832A (en) | 1964-11-18 |
Family
ID=22021538
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB3066461A Expired GB975832A (en) | 1960-09-29 | 1961-08-25 | Semiconductor switching circuit arrangement |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB975832A (en) |
-
1961
- 1961-08-25 GB GB3066461A patent/GB975832A/en not_active Expired
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