GB936643A - Improvements in or relating to electrical fault detection circuits - Google Patents

Improvements in or relating to electrical fault detection circuits

Info

Publication number
GB936643A
GB936643A GB1926862A GB1926862A GB936643A GB 936643 A GB936643 A GB 936643A GB 1926862 A GB1926862 A GB 1926862A GB 1926862 A GB1926862 A GB 1926862A GB 936643 A GB936643 A GB 936643A
Authority
GB
United Kingdom
Prior art keywords
relating
condition
fault detection
stages
detection circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1926862A
Inventor
Francesco Ambrosino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Priority to GB1926862A priority Critical patent/GB936643A/en
Publication of GB936643A publication Critical patent/GB936643A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K21/00Details of pulse counters or frequency dividers
    • H03K21/40Monitoring; Error detection; Preventing or correcting improper counter operation

Landscapes

  • Monitoring And Testing Of Exchanges (AREA)

Abstract

936,643. Counters. STANDARD TELEPHONES & CABLES Ltd. May 18, 1962, No. 19268/62. Class 106 (1). Faulty operation of a ring counter is detected by the provision of an additional bi-stable unit X which should be in state O while preceding stages are operative and in state 1 at other times. Strobe pulses are omitted from the drawings for clarity. Fig. 1 shows a conventional ring counter which should have only one stage A-J in " 1 " condition. If X is in " 0 " condition while stages A-E are also " 0," or if X is in " 1 " condition while stages F-J are at " 0 " then OR gate G01 sends a signal to an alarm circuit. A modification is shown in Fig. 3 while failure of X in Fig. 3 to change over is detected by the circuit of Fig. 4.
GB1926862A 1962-05-18 1962-05-18 Improvements in or relating to electrical fault detection circuits Expired GB936643A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB1926862A GB936643A (en) 1962-05-18 1962-05-18 Improvements in or relating to electrical fault detection circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1926862A GB936643A (en) 1962-05-18 1962-05-18 Improvements in or relating to electrical fault detection circuits

Publications (1)

Publication Number Publication Date
GB936643A true GB936643A (en) 1963-09-11

Family

ID=10126559

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1926862A Expired GB936643A (en) 1962-05-18 1962-05-18 Improvements in or relating to electrical fault detection circuits

Country Status (1)

Country Link
GB (1) GB936643A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5040306B1 (en) * 1969-08-29 1975-12-23

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5040306B1 (en) * 1969-08-29 1975-12-23

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