GB957641A - Improvements in or relating to electrical fault detection circuits for counting circuits - Google Patents

Abstract

957,641. Electronic counters; fault detection. STANDARD TELEPHONES & CABLES Ltd. March 13, 1962, No. 9585/62. Heading G4A. All the stages of a counter are connected to a fault detector which gives an alarm if the counter fails to change its condition at the reception of an input pulse. Fig. 1 shows a decimal ring counter in which a bi-stable circuit X is set to 1 condition whenever any one of the odd stages A, C, E &c. is in 1 condition, X taking up 0 condition at the next input or strobe pulse. For convenience the strobe pulse connections are not shown. Failure of the counter to advance results in coincidence of the X1 or X0 outputs with outputs from the odd or even-numbered stages and the operation of an alarm AL. Fig. 2 shows a variation in which outputs are taken from the 0 side of the counting stages. The inputs to gates CG1, CG2 should normally be five in number. If six inputs occur a fault is indicated. Fig. 3 shows a 2-out-of-5 coded decimal counter the bits A-E being weighted 0, 1, 2, 4, 7 except in the code for zero. Bi-stable circuit X is in condition 1 for off numbers and condition 0 for even numbers. A succession of 3-gates, in which the inputs are made up of the relevant two stages A-E and one from X form the fault indicator. A modification is described (Fig. 4, not shown). The fault indicator may be modified to operate in respect of a multi-denomination counter. Specification 897,400 is referred to.