GB932502A - Number comparing systems - Google Patents

Number comparing systems

Info

Publication number
GB932502A
GB932502A GB11711/61A GB1171161A GB932502A GB 932502 A GB932502 A GB 932502A GB 11711/61 A GB11711/61 A GB 11711/61A GB 1171161 A GB1171161 A GB 1171161A GB 932502 A GB932502 A GB 932502A
Authority
GB
United Kingdom
Prior art keywords
stage
gate
output
digit
digits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB11711/61A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Warner and Swasey Co
Original Assignee
Warner and Swasey Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Warner and Swasey Co filed Critical Warner and Swasey Co
Publication of GB932502A publication Critical patent/GB932502A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/02Comparing digital values
    • G06F7/026Magnitude comparison, i.e. determining the relative order of operands based on their numerical value, e.g. window comparator

Abstract

932,502. Comparing digital data. WARNER & SWASEY CO. March 30, 1961 [April 21, 1960], No. 11711/61. Class 106 (1). A circuit for comparing two multi-digit binary numbers R, D, and adapted to provide a first output signal if R > D and a second output signal if R # D, comprises a plurality of stages, each stage being supplied with corresponding digits of the two numbers and with a control signal from the next higher stage. Fig. 3 shows a single comparison stage, the digits R<SP>9</SP>, D<SP>9</SP> being applied at terminals 101, 102 respectively and a control signal from the next higher stage being applied at a terminal 100. Binary " 1 " and " 0 " are represented by high and low potentials respectively. The signal applied at 100 is normally low and is inverted at 112 and supplied via a line 113 to condition an " and " gate 108 which is supplied with digit R<SP>9</SP> and the complement of digit D<SP>9</SP> to provide a high output if R<SP>9</SP> = 1, D<SP>9</SP> = 0, this output being inverted at 130 and applied over a lead 131 to an " and " gate 134 also fed with corresponding leads from the other comparison stages. The line 113 is also connected to "and" " gates 115, 118 supplied with R<SP>9</SP> and the complement of D<SP>9</SP>, the outputs of these " and " gates being supplied to an " or " gate 124 which feeds an inverter 126, the output of the inverter at 127 being connected to the terminal 100 of the next lower comparison stage. The potential at 127 is high if R<SP>9</SP> = 0 and D<SP>9</SP> = 1 or if the potential at 100 is high and in these circumstances the gate 108 of the next lower stage is inhibited so that a high output is applied on the lead 131 of the lower stage. Thus if the higher digits are equal, the corresponding leads 131 are at a high level to condition the " and " gate 134. If at any stage the corresponding D digit is greater than the R digit, the output at 127 of that stage is high to inhibit all the lower " and " gates 108 and cause a high output on their leads 131. The gate 134 is thus opened to produce a high level on a lead 80, which level is also produced if all the R digits equal all the D digits. In all other circumstances the gate 134 is inhibited and the potential on 80 is low. The lead 80 may be arranged to operate a relay (Fig. 1, not shown). The various gates comprise diodes and the inverters triode tubes (Fig. 2, not shown). Reference has been directed by the Comptroller to Specification 836,234.
GB11711/61A 1960-04-21 1961-03-30 Number comparing systems Expired GB932502A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US23742A US3166733A (en) 1960-04-21 1960-04-21 Number comparing systems

Publications (1)

Publication Number Publication Date
GB932502A true GB932502A (en) 1963-07-31

Family

ID=21816945

Family Applications (1)

Application Number Title Priority Date Filing Date
GB11711/61A Expired GB932502A (en) 1960-04-21 1961-03-30 Number comparing systems

Country Status (2)

Country Link
US (1) US3166733A (en)
GB (1) GB932502A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3278733A (en) * 1962-12-10 1966-10-11 Burroughs Corp Adding and subtracting unit for a digital computer
US3422255A (en) * 1965-09-29 1969-01-14 Ibm Maximum occurring event determining apparatus
US3569677A (en) * 1965-12-07 1971-03-09 Texas Instruments Inc Data readout system
DE2425602A1 (en) * 1974-05-27 1975-12-11 Siemens Ag COMPARISON CIRCUIT FOR TWO-DIGIT BINARY WORDS, IN PARTICULAR DUAL NUMBERS
JP2842389B2 (en) * 1996-07-11 1999-01-06 日本電気株式会社 Random number generator

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2900620A (en) * 1953-11-25 1959-08-18 Hughes Aircraft Co Electronic magnitude comparator
US2885655A (en) * 1954-04-09 1959-05-05 Underwood Corp Binary relative magnitude comparator
NL216647A (en) * 1956-04-27 1900-01-01

Also Published As

Publication number Publication date
US3166733A (en) 1965-01-19

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