GB897400A - Improvements in electronic devices - Google Patents
Improvements in electronic devicesInfo
- Publication number
- GB897400A GB897400A GB4368860A GB4368860A GB897400A GB 897400 A GB897400 A GB 897400A GB 4368860 A GB4368860 A GB 4368860A GB 4368860 A GB4368860 A GB 4368860A GB 897400 A GB897400 A GB 897400A
- Authority
- GB
- United Kingdom
- Prior art keywords
- counter
- gates
- toggles
- alarm
- pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
- H03K21/40—Monitoring; Error detection; Preventing or correcting improper counter operation
Landscapes
- Monitoring And Testing Of Exchanges (AREA)
- Alarm Systems (AREA)
Abstract
897,400. Counters. STANDARD TELEPHONES & CABLES Ltd. Dec. 20, 1960, No. 43688/60. Class 106 (1). In an electronic ring counter, if more than the correct number of devices constituting the counter are simultaneously in the operated state a fault detector operates, and means are further provided to test the fault detector. In the example described, only one of the toggles A-N should be in the "1 " state at any time. The conditioning gates GA-GN are shown, but not the usual strobe gates. If two toggles should be operated simultaneously a gate G1 opens to operate toggle Y, and provided the test circuit is not being used, gates G6, G7 open to operate an alarm. The fault detector is tested while the counter is otherwise idle by applying a P1 pulse to two adjacent toggles. The counter then runs with a pair of adjacent toggles operative, AB, BC, CD, &c. The pulse P1 is followed immediately by a pulse P2 which operates toggle X so that both X and Y are operated whereby gate G6 is closed to prevent operation of the alarm. X resets Y at alternate stages through gate G3. If X fails to reset Y at these stages one of gates G9 operates the alarm. In a modification, Fig. 3, a ring counter which normally runs at a low speed is run at a higher speed for fault detection. Advance is controlled by toggle S which automatically resets itself. The speed of the counter therefore depends on the frequency of the input to S.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB4368860A GB897400A (en) | 1960-12-20 | 1960-12-20 | Improvements in electronic devices |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB4368860A GB897400A (en) | 1960-12-20 | 1960-12-20 | Improvements in electronic devices |
Publications (1)
Publication Number | Publication Date |
---|---|
GB897400A true GB897400A (en) | 1962-05-23 |
Family
ID=10429872
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB4368860A Expired GB897400A (en) | 1960-12-20 | 1960-12-20 | Improvements in electronic devices |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB897400A (en) |
-
1960
- 1960-12-20 GB GB4368860A patent/GB897400A/en not_active Expired
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