GB928562A - Methods of varying carrier mobility in semiconductive bodies - Google Patents

Methods of varying carrier mobility in semiconductive bodies

Info

Publication number
GB928562A
GB928562A GB2522161A GB2522161A GB928562A GB 928562 A GB928562 A GB 928562A GB 2522161 A GB2522161 A GB 2522161A GB 2522161 A GB2522161 A GB 2522161A GB 928562 A GB928562 A GB 928562A
Authority
GB
United Kingdom
Prior art keywords
type
strain
wafer
mesa
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2522161A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of GB928562A publication Critical patent/GB928562A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04RLOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R23/00Transducers other than those covered by groups H04R9/00 - H04R21/00
    • H04R23/006Transducers other than those covered by groups H04R9/00 - H04R21/00 using solid state devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Acoustics & Sound (AREA)
  • Signal Processing (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Die Bonding (AREA)

Abstract

928,562. Semi-conductor devices. WESTERN ELECTRIC CO. Ltd. July 12, 1961 [July 18, 1960], No. 25221/61. Class 37. In making a semi-conductive device containing at least one PN junction a directional elastic strain is produced and maintained in the semiconductive material and if of a magnitude such that the carrier mobilities in the material are altered by at least 15%, the strain direction being aligned with respect to a crystallographic direction of the material. A theoretical discussion of the effect is given and includes data relating to the choice of the strain direction. In the mesa-type transistor shown in Figs. 2 and 3 the stressing of the P-type germanium wafer 5 serving as the collector communicates a compressive strain to the N-type base region 11 bearing a heavily doped P-type base contact 12 and an N-type emitter region 13 and simultaneously increases the mobilities of electrons in the direction across the base zone and of holes in the plane of the zone. The three other embodiments described, Figs. 4, 5, 6 (not shown) are a NPN transistor, a PNP mesa-type transistor, and a P+NN+ varactor diode, and these are stressed in differing ways: the plane germanium wafer of the NPN transistor is hard soldered at its ends to the surface of a block which is bent about a fulcrum to apply tensile strain to the wafer; the P-type collector wafer of the PNP mean-type transistor is hard soldered to the end face of a metal pin held under biaxial radial compression and the force on the pin them removed thus applying biaxial tension to the wafer and the N-type mesa on its other surface; the base region of the varactor diode is hard soldered or otherwise attached to a heated bar which is then allowed to cool, thus setting up a compressive strain in the diode. Semiconductive materials suitable for using the effect are:- Si, Ge, InSb, PbTe, GaSb, AgSbTe 2 , AgSbTe, Cu 3 AsS 4 , Cu 3 AsS 3 , Cu 3 SbS 3 , Bi 2 Te 3 , Bi 2 Se 3 , Sb 2 Te 3 , PbSe, CdS, ZnO, AgSbSe 2 .
GB2522161A 1960-07-18 1961-07-12 Methods of varying carrier mobility in semiconductive bodies Expired GB928562A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US4349460A 1960-07-18 1960-07-18

Publications (1)

Publication Number Publication Date
GB928562A true GB928562A (en) 1963-06-12

Family

ID=21927441

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2522161A Expired GB928562A (en) 1960-07-18 1961-07-12 Methods of varying carrier mobility in semiconductive bodies

Country Status (4)

Country Link
BE (1) BE606275A (en)
DE (1) DE1232270B (en)
GB (1) GB928562A (en)
NL (1) NL267220A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0075374A1 (en) * 1981-09-23 1983-03-30 Budapesti Radiotechnikai Gyar Ground-plane antenna
WO2002045156A2 (en) * 2000-11-29 2002-06-06 Intel Corporation Cmos fabrication process utilizing special transistor orientation
CN100452321C (en) * 2004-07-20 2009-01-14 国际商业机器公司 Creating increased mobility in a bipolar device and bipolar device
US7888710B2 (en) 2000-11-29 2011-02-15 Intel Corporation CMOS fabrication process utilizing special transistor orientation
CN112968067A (en) * 2021-02-25 2021-06-15 电子科技大学 Bi-doped sulfur antimony silver-based inorganic thin-film solar cell and preparation method thereof

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102008008931B3 (en) * 2008-02-13 2009-07-16 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Device for operating electrical signal of integrated circuit, has component, which has p-doped area with connection and n-doped area with another connection, and another component is provided, which is coupled with former component

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0075374A1 (en) * 1981-09-23 1983-03-30 Budapesti Radiotechnikai Gyar Ground-plane antenna
WO2002045156A2 (en) * 2000-11-29 2002-06-06 Intel Corporation Cmos fabrication process utilizing special transistor orientation
WO2002045156A3 (en) * 2000-11-29 2003-01-23 Intel Corp Cmos fabrication process utilizing special transistor orientation
US7312485B2 (en) 2000-11-29 2007-12-25 Intel Corporation CMOS fabrication process utilizing special transistor orientation
US7888710B2 (en) 2000-11-29 2011-02-15 Intel Corporation CMOS fabrication process utilizing special transistor orientation
CN100452321C (en) * 2004-07-20 2009-01-14 国际商业机器公司 Creating increased mobility in a bipolar device and bipolar device
CN112968067A (en) * 2021-02-25 2021-06-15 电子科技大学 Bi-doped sulfur antimony silver-based inorganic thin-film solar cell and preparation method thereof

Also Published As

Publication number Publication date
BE606275A (en)
NL267220A (en)
DE1232270B (en) 1967-01-12

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