GB8421323D0 - Integrated logic devices - Google Patents
Integrated logic devicesInfo
- Publication number
- GB8421323D0 GB8421323D0 GB848421323A GB8421323A GB8421323D0 GB 8421323 D0 GB8421323 D0 GB 8421323D0 GB 848421323 A GB848421323 A GB 848421323A GB 8421323 A GB8421323 A GB 8421323A GB 8421323 D0 GB8421323 D0 GB 8421323D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- logic devices
- integrated logic
- integrated
- devices
- logic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/118—Masterslice integrated circuits
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB08421323A GB2168840A (en) | 1984-08-22 | 1984-08-22 | Customerisation of integrated logic devices |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB08421323A GB2168840A (en) | 1984-08-22 | 1984-08-22 | Customerisation of integrated logic devices |
Publications (2)
Publication Number | Publication Date |
---|---|
GB8421323D0 true GB8421323D0 (en) | 1984-09-26 |
GB2168840A GB2168840A (en) | 1986-06-25 |
Family
ID=10565674
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08421323A Withdrawn GB2168840A (en) | 1984-08-22 | 1984-08-22 | Customerisation of integrated logic devices |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2168840A (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2215512A (en) * | 1988-02-24 | 1989-09-20 | Stc Plc | Semiconductor integrated circuits |
NL194182C (en) * | 1988-07-23 | 2001-08-03 | Samsung Electronics Co Ltd | Rimless master disk semiconductor device. |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR1306004A (en) * | 1961-08-01 | 1962-10-13 | Ibm France | Method of manufacturing composite semiconductor elements and logical use of these elements |
US3559855A (en) * | 1969-02-19 | 1971-02-02 | Gen Electric | Shimless scribing |
GB1202137A (en) * | 1969-04-17 | 1970-08-12 | Standard Telephones Cables Ltd | Manufacture of integrated circuit |
US3808475A (en) * | 1972-07-10 | 1974-04-30 | Amdahl Corp | Lsi chip construction and method |
US4006492A (en) * | 1975-06-23 | 1977-02-01 | International Business Machines Corporation | High density semiconductor chip organization |
US4207556A (en) * | 1976-12-14 | 1980-06-10 | Nippon Telegraph And Telephone Public Corporation | Programmable logic array arrangement |
US4138304A (en) * | 1977-11-03 | 1979-02-06 | General Electric Company | Wafer sawing technique |
GB2018021B (en) * | 1978-04-01 | 1982-10-13 | Racal Microelect System | Uncommitted logic cells |
GB2122417B (en) * | 1982-06-01 | 1985-10-09 | Standard Telephones Cables Ltd | Integrated circuits |
-
1984
- 1984-08-22 GB GB08421323A patent/GB2168840A/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
GB2168840A (en) | 1986-06-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |