GB801548A - Demodulator - Google Patents

Demodulator

Info

Publication number
GB801548A
GB801548A GB2358/56A GB235856A GB801548A GB 801548 A GB801548 A GB 801548A GB 2358/56 A GB2358/56 A GB 2358/56A GB 235856 A GB235856 A GB 235856A GB 801548 A GB801548 A GB 801548A
Authority
GB
United Kingdom
Prior art keywords
input signal
winding
load
transistor
terminals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2358/56A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bendix Aviation Corp
Original Assignee
Bendix Aviation Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bendix Aviation Corp filed Critical Bendix Aviation Corp
Publication of GB801548A publication Critical patent/GB801548A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D1/00Demodulation of amplitude-modulated oscillations
    • H03D1/22Homodyne or synchrodyne circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)
  • Measuring Instrument Details And Bridges, And Automatic Balancing Devices (AREA)

Abstract

801,548. Phase-sensitive circuits. BENDIX AVIATION CORPORATION. Jan.24, 1956 [Feb. 10, 1955], No. 2358/56. Class. 38 (4). In a demodulator arrangement, Fig. 2, wherein an input signal, Fig. 7, at terminals 20, 21 produces a differential current flow in output or load windings 35, 36 according to the phase of the input signal compared with a reference voltage, Fig. 6, applied at terminals 38, 39, and its magnitude, the currents through the load windings which are equal during alternate halfcycle, Figs. 11, 12, are rendered unequal as in Figs. 14, 15 by the application of the input signal to a transistor 29. Diodes 32, 33 are rendered conductive alternately during alternate half cycles and the current flow in the corresponding load winding is determined by the input signal and bias network 30, 31. An additional bias network and resistor in a modification, Fig. 3 (not shown), form a voltage divider from the collector circuit whereby the transistor is biased to reduce the no-signal current through the ineffective load winding when the current through the other winding is increased. In further modifications. Figs. 4, 5 (not shown), the reference voltage is applied to the two halves of the bridge circuit through two separate transformers, and in the latter Figure the provision of an artificial centre tap allows a two-terminal output to be taken.
GB2358/56A 1955-02-10 1956-01-24 Demodulator Expired GB801548A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US801548XA 1955-02-10 1955-02-10

Publications (1)

Publication Number Publication Date
GB801548A true GB801548A (en) 1958-09-17

Family

ID=22155607

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2358/56A Expired GB801548A (en) 1955-02-10 1956-01-24 Demodulator

Country Status (1)

Country Link
GB (1) GB801548A (en)

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