GB788583A - Improvements in or relating to bi-stable electric apparatus - Google Patents

Abstract

788,583. Bi-stable circuits. GENERAL ELECTRIC CO., Ltd., ARBON, R. S., and JONES, G. PHYLIP-. Feb. 24, 1956, No. 5828/56. Class 40 (4). A bi-stable circuit is used as an AND, OR, or BUT NOT gate and comprises a saturable inductance in circuit with a capacity and excited by an A.C. source and has a control winding which in response to an interrogating pulse sets the circuit in one stable state or the other in dependence upon the combination of two two-valued input signals. The inductance 21 which is constructed as described in Specification 778,191, [Group XXXV], has a main winding 22 with a capacity 29 of such value that the circuit is approximately in resonance, at the frequency of oscillations applied to a lead 31 and capacity 47, when the core of inductance 21 is saturated. Bias windings 23, .24, in which induced voltages cancel, carry a relatively large standing current such that the circuit has two stable states of oscillation, one of a high and the other of a low voltage. If the circuit is in a high voltage state and the bias is augmented by current in control windings 25, 26, only one stable state of low voltage exists so that when the bias is returned to normal a low voltage state is enforced. If now the bias is depleted by a control current in windings 27, 28, only one stable state of high voltage exists so that the circuit is transferred from the low to the high voltage state. The pairs of windings 25, 26 and 27, 28 are wound so as to cancel out induced voltages and interrogating pulses are applied to their common terminal. If either or both leads 36, 37 carry A.C. signals the rectified voltage across resistance 41 and capacity 42 blocks rectifier 43 and windings 25, 26, so that if an interrogating pulse achieves anything it will transfer the circuit from a low to a high voltage state. In its high voltage state the circuit produces a rectified voltage across resistance 34 and capacity 33 which blocks a rectifier 44 and the windings 27, 28, so that an interrogating pulse will produce no effect until neither lead 36 nor 37 carries an A.C. signal when the pulse can energize windings 25, 26 to transfer the circuit to the low voltage stage. The above arrangement of Fig. 5 constitutes an OR gate. In Fig. 6 the modified input will block the control windings 25, 26, only if both leads 51, 52 carry A.C. signals and so constitutes an AND gate. In Fig. 7, a BUT NOT gate is formed by having leads 60, 61, terminate in a transformer 62 so that a signal on both or neither lead gives no rectified voltage across resistance 64, but a signal on one lead but not the other will block the control winding. The bi-stable circuits may be arranged in cascade with an output on a lead 45, Fig. 5, providing a two-valued input for a following circuit. The frequency of recurrence of interrogating pulses is 17 kc/s. compared with a frequency of 170 kc/s. applied to lead 31. Reference has been directed by the Comptroller to Specifications 740,284 and 749,383.