GB2588511A - Programmable amplitude and phase adjustable power distribution unit and adjustable power distribution network - Google Patents

Programmable amplitude and phase adjustable power distribution unit and adjustable power distribution network Download PDF

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Publication number
GB2588511A
GB2588511A GB2013533.1A GB202013533A GB2588511A GB 2588511 A GB2588511 A GB 2588511A GB 202013533 A GB202013533 A GB 202013533A GB 2588511 A GB2588511 A GB 2588511A
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United Kingdom
Prior art keywords
power distribution
phase
adjustable power
adjustable
distribution unit
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Granted
Application number
GB2013533.1A
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GB2588511B (en
GB202013533D0 (en
Inventor
Ma Jianguo
Zhou Shaohua
Xu Jiangtao
Yang Shenghui
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Tianjin University
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Tianjin University
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/66—Regulating electric power
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/36—Networks for connecting several sources or loads, working on the same frequency band, to a common load or source
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Networks Using Active Elements (AREA)

Abstract

A programmable amplitude and phase adjustable power distribution unit, i.e. an active power divider, comprises first, second and third NMOS transistors M1-M3, each having the same structure; a source of each transistor is grounded through a resistor RL1 and a drain of each transistor is connected to a power source through a resistor RL2. The drain and source of the first transistor are respectively connected to the gates of the second and third transistors, and the source of the second transistor and drain of the third transistor constitute output ends OUT1, OUT2 of the power distribution unit. Further grounding of the second transistor drain and third transistor source is provided through first and second adjustable resistors R1, R2, respectively; adjusting the resistance values adjusts the amplitude and phase of the output ends. Additionally, an adjustable power distribution network, having N cascaded stages, comprises 2N-1 programmable amplitude and phase adjustable power distribution units and provides 2N same outputs (Fig.2). The first and second adjustable resistors are connected via first and second programmable input ports (Fig.2, IN1, IN2) to an external control unit. The power distribution unit and network may be used in a communication system where small chip area is advantageous and high amplitude and phase consistency is required.

Description

PROGRAMMABLE AMPLITUDE AND PHASE ADJUSTABLE POWER DISTRIBUTION UNIT AND ADJUSTABLE POWER DISTRIBUTION NETWORK
Technical field
The present invention relates to a programmable power distribution circuit. In particular, it relates to a programmable amplitude and phase adjustable power distribution unit and an adjustable power distribution network.
Technical background
In a millimeter-wave communication system, a large-scale power distribution network is required to achieve cooperative operations between array elements.
Multiple-Input Multiple-Output (MIMO) antenna array technology also needs large-scale power distribution network support.
The power distribution circuits amplitude and phase consistency are its key indicators. When multiple output signals are inconsistent in the amplitude and phase, two output signals will not be able to maintain synchronization, which will seriously affect the system's operating state. Therefore, maintaining the high amplitude and phase consistency of the power distribution network is a problem that must be overcome urgently. The conventional power distribution structures represented by Wilkinson power dividers rely on layout symmetry and process stability. If there is a mismatch, it will be difficult to continue to use it. Developing a programmable calibrated power distribution network can alleviate this problem and ensure the normal operation of the power distribution network to the greatest extent.
In addition, there is a certain loss in the power distribution network. In passive implementation schemes, this loss is superimposed stage by stage. With the expansion of the array scale, the loss generated by the power distribution network becomes unacceptable and requires additional compensation circuits, which consumes a large amount of energy and increases the system cost. At the same time, the huge chip area cost brought by the passive scheme has also become a major constraint. Therefore, the use of active compact schemes with a low loss and low power consumption can alleviate this problem to a certain extent.
Summary of the invention
The technical problem to be solved by the present invention is to provide a programmable amplitude and phase adjustable power distribution unit and an to adjustable power distribution network that realize high amplitude and phase consistency by means of programming and calibration.
A technical solution adopted by the present invention is: a programmable amplitude and phase adjustable power distribution unit, comprising a first NMOS transistor, a second NMOS transistor and a third NMOS transistor having the same structure, the first NMOS transistor, the second NMOS transistor and the third NMOS transistor each having a source grounded through a source resistor, and each having a drain connected to an external power source through a drain resistor, wherein the drain of the first NMOS transistor is connected to the gate of the second NMOS transistor; the source of the first NMOS transistor is connected to the gate of the third NMOS transistor; the source of the second NMOS transistor constitutes a first output end OUT1 of the programmable amplitude and phase adjustable power distribution unit; the drain of the third NMOS transistor constitutes a second output end OUT2 of the programmable amplitude and phase adjustable power distribution unit; the drain of the second NMOS transistor is further grounded through a first adjustable resistor; the source of the third NMOS transistor is further grounded through a second adjustable resistor; and by adjusting resistance values of the first adjustable resistor and the second adjustable resistor, the amplitude and phase of the first output end OUT1 and the second output end OUT2 is adjusted.
The source resistance and the drain resistance have the same resistance value.
An adjustable power distribution network comprising the programmable amplitude and phase adjustable power distribution unit, comprising 2'7-1 programmable amplitude and phase adjustable power distribution units with the same structure, each programmable amplitude and phase adjustable power distribution unit having one input end and two output ends, and two adjustable resistors for adjusting the amplitude and phase of the two output ends, respectively, characterized in that an input end of a first programmable amplitude and phase adjustable power distribution unit is connected to an external RE signal input IN, and the two output ends of each programmable amplitude and phase adjustable power distribution unit are each connected to an input end of a programmable amplitude and phase adjustable power distribution unit, to form N-stage cascaded adjustable power to distribution network with 2N same outputs OUT; an adjustable end of an adjustable resistor in each programmable amplitude and phase adjustable power distribution unit is connected to an external control unit through a first programmable control input port IN1, and an adjustable end of another adjustable resistor is connected to the external control unit through a second programmable control input port IN2.
The external control unit adjusts the output of the adjustable power distribution network by adjusting resistance values of the two adjustable resistors in each programmable amplitude and phase adjustable power distribution unit.
The programmable amplitude and phase adjustable power distribution unit and the adjustable power distribution network of the present invention can implement a high-amplitude and phase-consistent power distribution network and meet the condition of low cost. The present invention has the characteristics of a simple structure, a small area, and a low loss, and can efficiently realize large-scale expansion applications. The present invention has the following beneficial effects: (1) The introduced programmable amplitude and phase adjustment mechanism can achieve accurate power distribution network amplitude and phase calibration.
Since at least only two bits can be used for control, the present invention can also be applied to large-scale power distribution networks. At the same time, the product can be calibrated at any time after processing, improving the yield and enhancing the practicality (2) The active structure is used to realize power distribution, which reduces the inherent loss of 3dB per stage due to equal division of power, and even brings a certain gain.
(3) The power distribution structure with the active structure as the main body greatly alleviates the chip area problem caused by large-area passive devices and reduces the cost.
(4) The power distribution unit circuit of the present invention is easy to cascade in multiple stages, and the multi-stage connection of the unit circuits can be realized by means of simple coupling, thereby realizing a large-scale power distribution network.
Brief description of the drawings
Fig. 1 is a schematic diagram of circuit configuration of a programmable amplitude and phase adjustable power distribution unit of the present invention; and Fig. 2 is a schematic diagram of circuit configuration of an adjustable power distribution network of the present invention.
Detailed description of the embodiments
The programmable amplitude and phase adjustable power distribution unit and the adjustable power distribution network of the present invention are described in detail below with reference to the embodiments and the accompanying drawings.
As shown in Fig. 1, the programmable amplitude and phase adjustable power distribution unit of the present invention includes a first NMOS transistor Ml, a second NMOS transistor M2, and a third NMOS transistor M3, which have the same structure. The first NMOS transistor Ml, the second NMOS transistor M2 and the third NMOS transistor M3 each have a source grounded through a source resistor RL1, and each have a drain connected to an external power source through a drain resistor RL2. The source resistor RL1 and the drain resistor RL2 have the same resistance value. Among them, the drain of the first NMOS transistor M1 is connected to the gate of the second NMOS transistor M2, and the source of the first NMOS transistor M1 is connected to the gate of the third NMOS transistor M3. The source of the second NMOS transistor M2 constitutes a first output end OUT1 of the programmable amplitude and phase adjustable power distribution unit. The drain of the third NMOS transistor M3 constitutes a second output end OUT2 of the programmable amplitude and phase adjustable power distribution unit. The drain of the second NMOS transistor M2 is further grounded through a first adjustable resistor R1, and the source of the third NMOS transistor M3 is further grounded through a second adjustable resistor R2. By adjusting resistance values of the first adjustable resistor R1 and the second adjustable resistor R2, the amplitude and phase of the first output end OUT1 and the second output end OUT2 is adjusted.
The gain of the programmable amplitude and phase adjustable power distribution unit of the present invention is analyzed (excluding the programmable control part) to obtain two output gains as follows: trout I Vow 1 Avi --Via V2 + (RgoIRL)I2 gra2 (RS( iRL)RD gen(ESIlki.))(1.+ yinRS) 12 (RS AL) 11o:42 ra (RD,/ S Va+RSI3 where A ul and A.v2 are first and second output voltage gains, Vout1 and Vout2 are first and second output voltages, Vin is a total input signal voltage, vim?' and win" are a drain output voltage and a source output voltage of the first transistor Ml, respectively, 12 and 13 are a drain current of the second transistor M2 and a drain current of the third transistor M3, respectively, RD and RS are drain resistance and source resistance of each transistor, V1 and V2 are gate-source voltage differences of the first and second transistors, gm is transconductance of the transistor, and RL is load resistance at an output end.
When the drain and source resistance values of each transistor are the same, the following can be obtained: 2 Rs-mr, (1+ 9:177)(1+ pm!?) where R is equivalent resistance of the drain and source of each transistor Due to the balanced and symmetrical structure of the programmable amplitude and phase adjustable power distribution unit circuit, the two outputs of the circuit have the same amplitude and the same phase.
In addition, in order to ensure the consistency of two operating states, two adjustable resistors for calibration are added to each programmable amplitude and phase adjustable power distribution unit circuit for programmable control of two outputs, respectively. The adjustable resistors can compensate the output mismatch caused by various reasons, and achieve accurate amplitude and phase calibration by analog continuous control.
On the basis of the programmable amplitude and phase adjustable power distribution unit, the programmable amplitude and phase adjustable power distribution unit is continuously cascaded to realize a large-scale multi-channel output. Programmable control can be performed on each adjustable device in a large-scale power distribution network in a case where the conditions permit. In a case where the control bits are limited, only two-bit control can be used to achieve good results. In this case, one bit controls the adjustable resistance of the second transistor in all unit circuits, and the other bit controls the adjustable resistance of the third transistor in all unit circuits.
As shown in Fig. 2, an adjustable power distribution network comprising the programmable amplitude and phase adjustable power distribution unit of the present invention includes 2' programmable amplitude and phase adjustable power distribution units with the same structure, each programmable amplitude and phase adjustable power distribution unit having one input end and two output ends, and two adjustable resistors for adjusting the amplitude and phase of the two output ends, respectively. An input end of a first programmable amplitude and phase adjustable power distribution unit is connected to an external RF signal input IN, and the two output ends of each programmable amplitude and phase adjustable power distribution unit are each connected to an input end of a programmable amplitude and phase adjustable power distribution unit, to form N-stage cascaded adjustable power distribution network with 2k same outputs OUT An adjustable end of an adjustable resistor R1 in each programmable amplitude and phase adjustable power distribution unit is connected to an external control unit through a first programmable control input port IN1, and an adjustable end of another adjustable resistor R2 is connected to the external control unit through a second programmable control input port IN2.
The external control unit adjusts the output of the adjustable power distribution network by adjusting resistance values of the two adjustable resistors in each programmable amplitude and phase adjustable power distribution unit. The first programmable control input port IN1 and the second programmable control input port IN2 provide a control signal for all adjustable devices in the circuit. The control signal is an analog signal. The analog signal can be generated by external programming. Under the control of the two signals, the value of the adjustable resistor in the adjustable power distribution network formed by the programmable amplitude and phase adjustable power distribution unit can be changed, thereby causing the amplitude and phase of each output to change. The signal output by each output port theoretically has the same amplitude and the same phase. However, due to factors such as process deviations, the amplitude and phase of each output port are not completely the same, and thus can be adjusted by the first programmable control input port IN1 and the second programmable control input port IN2.

Claims (5)

  1. Claims 1. A programmable amplitude and phase adjustable power distribution unit, comprising a first NMOS transistor (M1), a second NMOS transistor (M2) and a third NMOS transistor (M3) having the same structure, characterized in that the first NMOS transistor (M1), the second NMOS transistor (M2) and the third NMOS transistor (M3) each have a source grounded through a source resistor (RL1), and each have a drain connected to an external power source through a drain resistor to (RL2), wherein the drain of the first NMOS transistor (M1) is connected to the gate of the second NMOS transistor (M2); the source of the first NMOS transistor (M1) is connected to the gate of the third NMOS transistor (M3); the source of the second NMOS transistor (M2) constitutes a first output end OUT1 of the programmable amplitude and phase adjustable power distribution unit; the drain of the third NMOS transistor (M3) constitutes a second output end OUT2 of the programmable amplitude and phase adjustable power distribution unit; the drain of the second NMOS transistor (M2) is further grounded through a first adjustable resistor (R1); the source of the third NMOS transistor (M3) is further grounded through a second adjustable resistor (R2); and by adjusting resistance values of the first adjustable resistor (R1) and the second adjustable resistor (R2), the amplitude and phase of the first output end OUT1 and the second output end OUT2 is adjusted.
  2. 2. The programmable amplitude and phase adjustable power distribution unit according to claim 1, characterized in that the source resistance (RL1) and the drain resistance (RL2) have the same resistance value.
  3. 3. The programmable amplitude and phase adjustable power distribution unit according to claim 1, characterized in that output voltage gains Apl and 41)2 of the first output end OUT1 and the second output end OUT2 of the programmable amplitude and phase adjustable power distribution unit are as follows: 1?' Aj1 A1,2 I?, where R is equivalent resistance of the drain and source of each transistor, gm-T. and gm is transconductance of the transistor.
  4. 4. An adjustable power distribution network comprising the programmable amplitude and phase adjustable power distribution unit of claim 1, comprising 2N-' programmable amplitude and phase adjustable power distribution units with the same structure, each programmable amplitude and phase adjustable power distribution unit having one input end and two output ends, and two adjustable resistors for adjusting the amplitude and phase of the two output ends, respectively, characterized in that an input end of a first programmable amplitude and phase adjustable power distribution unit is connected to an external RE signal input IN, and the two output ends of each programmable amplitude and phase adjustable power distribution unit are each connected to an input end of a programmable amplitude and phase adjustable power distribution unit, to form N-stage cascaded adjustable power distribution network with 2N same outputs OUT; an adjustable end of an adjustable resistor (R1) in each programmable amplitude and phase adjustable power distribution unit is connected to an external control unit through a first programmable control input port IN1, and an adjustable end of another adjustable resistor (R2) is connected to the external control unit through a second programmable control input port IN2.
  5. 5. The adjustable power distribution network comprising the programmable amplitude and phase adjustable power distribution unit according to claim 4, characterized in that the external control unit adjusts the output of the adjustable power distribution network by adjusting resistance values of the two adjustable resistors in each programmable amplitude and phase adjustable power distribution unit.
GB2013533.1A 2019-09-24 2020-08-28 Programmable amplitude and phase adjustable power distribution unit and adjustable power distribution network Active GB2588511B (en)

Applications Claiming Priority (1)

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CN201910907794.2A CN110687960B (en) 2019-09-24 2019-09-24 Programmable amplitude-phase adjustable power distribution unit and adjustable power distribution network

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GB2588511A true GB2588511A (en) 2021-04-28
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5039891A (en) * 1989-12-20 1991-08-13 Hughes Aircraft Company Planar broadband FET balun
JPH06188611A (en) * 1992-12-22 1994-07-08 A T R Koudenpa Tsushin Kenkyusho:Kk Microwave signal distributing circuit
US20090243728A1 (en) * 2008-03-28 2009-10-01 Nec Electronics Corporation Splitter circuit
CN108599734A (en) * 2018-05-10 2018-09-28 南京信息工程大学 Broadband active power splitter and broadband active power combiner

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009022856A2 (en) * 2007-08-14 2009-02-19 Lg Electronics Inc. Peak to average power ratio reduction
CN102222961B (en) * 2011-06-23 2013-06-26 深圳市英威腾电源有限公司 Method and device for numbering power modules in modular uninterruptable power supply
WO2015196404A1 (en) * 2014-06-26 2015-12-30 华为技术有限公司 Interference cancellation device and method
CN110198156B (en) * 2019-05-27 2022-01-18 华南理工大学 Active feedback broadband low-noise amplifier with composite structure

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5039891A (en) * 1989-12-20 1991-08-13 Hughes Aircraft Company Planar broadband FET balun
JPH06188611A (en) * 1992-12-22 1994-07-08 A T R Koudenpa Tsushin Kenkyusho:Kk Microwave signal distributing circuit
US20090243728A1 (en) * 2008-03-28 2009-10-01 Nec Electronics Corporation Splitter circuit
CN108599734A (en) * 2018-05-10 2018-09-28 南京信息工程大学 Broadband active power splitter and broadband active power combiner

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GB2588511B (en) 2021-11-24
GB202013533D0 (en) 2020-10-14
CN110687960B (en) 2020-08-25
CN110687960A (en) 2020-01-14

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