GB2526018B - Multistage switch - Google Patents

Multistage switch

Info

Publication number
GB2526018B
GB2526018B GB1513909.0A GB201513909A GB2526018B GB 2526018 B GB2526018 B GB 2526018B GB 201513909 A GB201513909 A GB 201513909A GB 2526018 B GB2526018 B GB 2526018B
Authority
GB
United Kingdom
Prior art keywords
multistage switch
multistage
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB1513909.0A
Other languages
English (en)
Other versions
GB201513909D0 (en
GB2526018A (en
Inventor
Metzgen Paul
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SILICON TAILOR Ltd
Original Assignee
SILICON TAILOR Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SILICON TAILOR Ltd filed Critical SILICON TAILOR Ltd
Priority to GB1801471.2A priority Critical patent/GB2555363B/en
Priority to GB1513909.0A priority patent/GB2526018B/en
Publication of GB201513909D0 publication Critical patent/GB201513909D0/en
Publication of GB2526018A publication Critical patent/GB2526018A/en
Application granted granted Critical
Publication of GB2526018B publication Critical patent/GB2526018B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • G06F15/7871—Reconfiguration support, e.g. configuration loading, configuration switching, or hardware OS
    • G06F15/7875—Reconfiguration support, e.g. configuration loading, configuration switching, or hardware OS for multiple contexts
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • G06F15/7871—Reconfiguration support, e.g. configuration loading, configuration switching, or hardware OS
    • G06F15/7878—Reconfiguration support, e.g. configuration loading, configuration switching, or hardware OS for pipeline reconfiguration
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • G06F15/7885—Runtime interface, e.g. data exchange, runtime control
    • G06F15/7892—Reconfigurable logic embedded in CPU, e.g. reconfigurable unit
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3869—Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3873—Variable length pipelines, e.g. elastic pipeline
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3893—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
    • G06F9/3895—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros
    • G06F9/3897—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros with adaptable data path
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/15—Interconnection of switching modules
    • H04L49/1515—Non-blocking multistage, e.g. Clos
    • H04L49/1546—Non-blocking multistage, e.g. Clos using pipelined operation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/10—Packet switching elements characterised by the switching fabric construction
    • H04L49/101—Packet switching elements characterised by the switching fabric construction using crossbar or matrix
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/15—Interconnection of switching modules
    • H04L49/1553—Interconnection of ATM switching modules, e.g. ATM switching fabrics
    • H04L49/1569—Clos switching fabrics

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
GB1513909.0A 2013-10-31 2013-10-31 Multistage switch Active GB2526018B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
GB1801471.2A GB2555363B (en) 2013-10-31 2013-10-31 Multistage switch
GB1513909.0A GB2526018B (en) 2013-10-31 2013-10-31 Multistage switch

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB1319279.4A GB2519813B (en) 2013-10-31 2013-10-31 Pipelined configurable processor
GB1513909.0A GB2526018B (en) 2013-10-31 2013-10-31 Multistage switch

Publications (3)

Publication Number Publication Date
GB201513909D0 GB201513909D0 (en) 2015-09-23
GB2526018A GB2526018A (en) 2015-11-11
GB2526018B true GB2526018B (en) 2018-11-14

Family

ID=49767493

Family Applications (2)

Application Number Title Priority Date Filing Date
GB1513909.0A Active GB2526018B (en) 2013-10-31 2013-10-31 Multistage switch
GB1319279.4A Active GB2519813B (en) 2013-10-31 2013-10-31 Pipelined configurable processor

Family Applications After (1)

Application Number Title Priority Date Filing Date
GB1319279.4A Active GB2519813B (en) 2013-10-31 2013-10-31 Pipelined configurable processor

Country Status (7)

Country Link
US (3) US9658985B2 (enExample)
EP (1) EP3063651A1 (enExample)
JP (1) JP6708552B2 (enExample)
KR (1) KR20160105774A (enExample)
CN (1) CN105830054B (enExample)
GB (2) GB2526018B (enExample)
WO (1) WO2015063466A1 (enExample)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2526018B (en) * 2013-10-31 2018-11-14 Silicon Tailor Ltd Multistage switch
JP6816380B2 (ja) * 2016-04-15 2021-01-20 オムロン株式会社 画像処理装置、画像処理方法、情報処理プログラム、および記録媒体
CN107953330A (zh) * 2016-10-18 2018-04-24 珠海格力智能装备有限公司 机器人及其控制方法和装置
CN107962560B (zh) * 2016-10-18 2020-08-07 珠海格力智能装备有限公司 机器人及其控制方法和装置
US11055807B2 (en) * 2017-06-12 2021-07-06 Apple Inc. Method and system for a transactional based display pipeline to interface with graphics processing units
WO2019089816A2 (en) 2017-10-31 2019-05-09 Micron Technology, Inc. System having a hybrid threading processor, a hybrid threading fabric having configurable computing elements, and a hybrid interconnection network
EP3704595A4 (en) * 2017-10-31 2021-12-22 Micron Technology, Inc. SYSTEM WITH A HYBRID THREADING PROCESSOR, HYBRID THREADING MATRIX WITH CONFIGURABLE COMPUTER ELEMENTS AND HYBRID CONNECTION NETWORK
EP3776241B1 (en) 2018-03-31 2023-06-28 Micron Technology, Inc. Loop thread order execution control of a multi-threaded, self-scheduling reconfigurable computing fabric
US11010161B2 (en) 2018-03-31 2021-05-18 Micron Technology, Inc. Multiple types of thread identifiers for a multi-threaded, self-scheduling reconfigurable computing fabric
WO2019191739A1 (en) * 2018-03-31 2019-10-03 Micron Technology, Inc. Efficient loop execution for a multi-threaded, self-scheduling reconfigurable computing fabric
WO2019191737A1 (en) 2018-03-31 2019-10-03 Micron Technology, Inc. Multi-threaded self-scheduling reconfigurable computing fabric
KR102446709B1 (ko) * 2018-03-31 2022-09-26 마이크론 테크놀로지, 인크. 멀티 스레드, 자체 스케줄링 재구성 가능한 컴퓨팅 패브릭의 실행 제어
US11288074B2 (en) 2018-03-31 2022-03-29 Micron Technology, Inc. Loop execution control for a multi-threaded, self-scheduling reconfigurable computing fabric using a reenter queue
WO2019191743A1 (en) 2018-03-31 2019-10-03 Micron Technology, Inc. Conditional branching control for a multi-threaded, self- scheduling reconfigurable computing fabric
KR102545047B1 (ko) 2018-03-31 2023-06-21 마이크론 테크놀로지, 인크. 멀티 스레드, 자체 스케줄링 재구성 가능한 컴퓨팅 패브릭에 대한 중지 신호를 사용한 역압 제어
US11119972B2 (en) * 2018-05-07 2021-09-14 Micron Technology, Inc. Multi-threaded, self-scheduling processor
US11074213B2 (en) * 2019-06-29 2021-07-27 Intel Corporation Apparatuses, methods, and systems for vector processor architecture having an array of identical circuit blocks
US11573834B2 (en) 2019-08-22 2023-02-07 Micron Technology, Inc. Computational partition for a multi-threaded, self-scheduling reconfigurable computing fabric
US11150900B2 (en) 2019-08-28 2021-10-19 Micron Technology, Inc. Execution or write mask generation for data selection in a multi-threaded, self-scheduling reconfigurable computing fabric
US11886377B2 (en) 2019-09-10 2024-01-30 Cornami, Inc. Reconfigurable arithmetic engine circuit
DE102020131666A1 (de) * 2020-05-05 2021-11-11 Intel Corporation Skalierbare Multiplikationsbeschleunigung dünnbesetzter Matrizen unter Verwendung systolischer Arrays mit Rückkopplungseingaben
US12293093B2 (en) 2021-06-28 2025-05-06 Google Llc Control of deterministic machine learning systems using trigger tables and configuration state registries
US11709796B2 (en) * 2021-08-16 2023-07-25 Micron Technology, Inc. Data input/output operations during loop execution in a reconfigurable compute fabric
KR102571234B1 (ko) 2023-02-21 2023-08-25 메티스엑스 주식회사 매니코어 시스템의 스레드 관리 방법 및 장치
CN116450570B (zh) * 2023-06-19 2023-10-17 先进能源科学与技术广东省实验室 基于fpga的32位risc-v处理器及电子设备

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040150422A1 (en) * 2000-08-04 2004-08-05 Leopard Logic, Inc. Interconnection network for a field programmable gate array
US20090073967A1 (en) * 2007-09-14 2009-03-19 Cswitch Corporation High-bandwidth interconnect network for an integrated circuit
US20100272117A1 (en) * 2009-04-27 2010-10-28 Lsi Corporation Buffered Crossbar Switch System
US20120159062A1 (en) * 2009-03-31 2012-06-21 Juniper Networks, Inc. Methods and apparatus related to a shared memory buffer for variable-sized cells

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6282627B1 (en) 1998-06-29 2001-08-28 Chameleon Systems, Inc. Integrated processor and programmable data path chip for reconfigurable computing
US6349346B1 (en) 1999-09-23 2002-02-19 Chameleon Systems, Inc. Control fabric unit including associated configuration memory and PSOP state machine adapted to provide configuration address to reconfigurable functional unit
US6759869B1 (en) * 2002-06-05 2004-07-06 Xilinx, Inc. Large crossbar switch implemented in FPGA
US6925643B2 (en) * 2002-10-11 2005-08-02 Sandbridge Technologies, Inc. Method and apparatus for thread-based memory access in a multithreaded processor
US7149996B1 (en) * 2003-07-11 2006-12-12 Xilinx, Inc. Reconfigurable multi-stage crossbar
DE602004017879D1 (de) 2003-08-28 2009-01-02 Mips Tech Inc Integrierter mechanismus zum suspendieren und endznem prozessor
US7263599B2 (en) * 2004-02-06 2007-08-28 Infineon Technologies Thread ID in a multithreaded processor
JP4484756B2 (ja) * 2004-06-21 2010-06-16 三洋電機株式会社 リコンフィギュラブル回路および処理装置
US7873776B2 (en) * 2004-06-30 2011-01-18 Oracle America, Inc. Multiple-core processor with support for multiple virtual processors
US7224184B1 (en) * 2004-11-05 2007-05-29 Xilinx, Inc. High bandwidth reconfigurable on-chip network for reconfigurable systems
US7276933B1 (en) 2004-11-08 2007-10-02 Tabula, Inc. Reconfigurable IC that has sections running at different looperness
CN101546255A (zh) * 2005-04-12 2009-09-30 松下电器产业株式会社 处理器
JP4102425B2 (ja) 2005-04-12 2008-06-18 松下電器産業株式会社 プロセッサ
DE602006021001D1 (de) * 2005-04-28 2011-05-12 Univ Edinburgh Umkonfigurierbares anweisungs-zellen-array
US7768301B2 (en) * 2006-01-17 2010-08-03 Abound Logic, S.A.S. Reconfigurable integrated circuits with scalable architecture including a plurality of special function elements
US8868888B2 (en) * 2007-09-06 2014-10-21 Qualcomm Incorporated System and method of executing instructions in a multi-stage data processing pipeline
EP2201569A4 (en) * 2007-09-06 2011-07-13 Tabula Inc CONFIGURATION CONTEXT CHANGER
US8006073B1 (en) * 2007-09-28 2011-08-23 Oracle America, Inc. Simultaneous speculative threading light mode
US8078833B2 (en) * 2008-05-29 2011-12-13 Axis Semiconductor, Inc. Microprocessor with highly configurable pipeline and executional unit internal hierarchal structures, optimizable for different types of computational functions
JP2010146102A (ja) * 2008-12-16 2010-07-01 Sanyo Electric Co Ltd 演算処理装置および記憶領域割当方法
US8006075B2 (en) * 2009-05-21 2011-08-23 Oracle America, Inc. Dynamically allocated store queue for a multithreaded processor
WO2011125174A1 (ja) * 2010-04-06 2011-10-13 トヨタ自動車株式会社 動的再構成プロセッサ及びその動作方法
US20110276760A1 (en) * 2010-05-06 2011-11-10 Chou Yuan C Non-committing store instructions
US7982497B1 (en) 2010-06-21 2011-07-19 Xilinx, Inc. Multiplexer-based interconnection network
WO2012154612A1 (en) * 2011-05-06 2012-11-15 Xcelemor, Inc. Computing system with hardware scheduled reconfiguration mechanism and method of operation thereof
US9166928B2 (en) * 2011-09-30 2015-10-20 The Hong Kong University Of Science And Technology Scalable 3-stage crossbar switch
GB2526018B (en) * 2013-10-31 2018-11-14 Silicon Tailor Ltd Multistage switch

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040150422A1 (en) * 2000-08-04 2004-08-05 Leopard Logic, Inc. Interconnection network for a field programmable gate array
US20090073967A1 (en) * 2007-09-14 2009-03-19 Cswitch Corporation High-bandwidth interconnect network for an integrated circuit
US20120159062A1 (en) * 2009-03-31 2012-06-21 Juniper Networks, Inc. Methods and apparatus related to a shared memory buffer for variable-sized cells
US20100272117A1 (en) * 2009-04-27 2010-10-28 Lsi Corporation Buffered Crossbar Switch System

Also Published As

Publication number Publication date
CN105830054B (zh) 2019-03-08
US20180089140A1 (en) 2018-03-29
GB2519813B (en) 2016-03-30
EP3063651A1 (en) 2016-09-07
GB201319279D0 (en) 2013-12-18
US20160259757A1 (en) 2016-09-08
KR20160105774A (ko) 2016-09-07
GB2519813A (en) 2015-05-06
US10275390B2 (en) 2019-04-30
US9658985B2 (en) 2017-05-23
GB201513909D0 (en) 2015-09-23
US20200026685A1 (en) 2020-01-23
CN105830054A (zh) 2016-08-03
WO2015063466A1 (en) 2015-05-07
WO2015063466A4 (en) 2015-07-30
JP6708552B2 (ja) 2020-06-10
JP2016535913A (ja) 2016-11-17
GB2526018A (en) 2015-11-11

Similar Documents

Publication Publication Date Title
GB2526018B (en) Multistage switch
GB2512586B (en) Switch arrangement
GB2524422B (en) Compressor
AU355447S (en) Case
AU354443S (en) Case
AU354395S (en) Case
GB2513665B (en) Compressor
GB2513663B (en) Compressor
SG10201404153PA (en) Switchgear
GB2513666B (en) Compressor
GB201312883D0 (en) Keypad
AU353575S (en) Stamphousing
EP2991090A4 (en) SWITCH
GB2555363B (en) Multistage switch
GB201308187D0 (en) Switch
GB201308200D0 (en) Switch assembly
AU2013064V (en) Flat Out Adenanthos cuneatus
IL225409A (en) Opening-closing switch
AU353327S (en) Kettlebell
AU353325S (en) Kettlebell
AU353330S (en) Kettlebell
AU353331S (en) Kettlebell
AU353329S (en) Kettlebell
AU353328S (en) Kettlebell
AU353326S (en) Kettlebell

Legal Events

Date Code Title Description
R108 Alteration of time limits (patents rules 1995)

Free format text: EXTENSION APPLICATION

Effective date: 20180702

Free format text: EXTENSION ALLOWED

Effective date: 20180709

R108 Alteration of time limits (patents rules 1995)

Free format text: EXTENSION APPLICATION

Effective date: 20180830

Free format text: EXTENSION ALLOWED

Effective date: 20180904