GB2348399A - Reactive ion etching with control of etch gas flow rate, pressure and rf power - Google Patents

Reactive ion etching with control of etch gas flow rate, pressure and rf power Download PDF

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Publication number
GB2348399A
GB2348399A GB9907302A GB9907302A GB2348399A GB 2348399 A GB2348399 A GB 2348399A GB 9907302 A GB9907302 A GB 9907302A GB 9907302 A GB9907302 A GB 9907302A GB 2348399 A GB2348399 A GB 2348399A
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waveguide
rie
sccm
gas
fabricating
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GB9907302D0 (en
Inventor
Jesus Miguel Ruano-Lopez
James Ronald Bonar
Andrew James Mclaughlin
Silva Marques Paulo Vicente Da
Christopher D W Wilkinson
Michael George Jubber
James Stewart Aitchison
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University of Glasgow
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University of Glasgow
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Priority to GB9907302A priority Critical patent/GB2348399A/en
Publication of GB9907302D0 publication Critical patent/GB9907302D0/en
Priority to EP00914290A priority patent/EP1166341A1/en
Priority to AU35685/00A priority patent/AU3568500A/en
Priority to PCT/GB2000/001231 priority patent/WO2000059020A1/en
Priority to GB0118719A priority patent/GB2363361B/en
Publication of GB2348399A publication Critical patent/GB2348399A/en
Withdrawn legal-status Critical Current

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    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/13Integrated optical circuits characterised by the manufacturing method
    • G02B6/136Integrated optical circuits characterised by the manufacturing method by etching

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Optical Integrated Circuits (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

The reactive ion etching process (RIE) includes control of etchant gas flow rate and pressure, and radio frequency (r.f.) power to provide an etch rate and/or level of material re-deposition that reduces the surface and sidewall roughness in the manufacture of optical waveguides to 5-100 nm having an etch depth greater than 10žm. The etchant gas may be fluorine based eg CHF<SB>3</SB>, C<SB>2</SB>F<SB>6,</SB> SF<SB>6,</SB> CF<SB>4</SB> or CBrF<SB>5</SB> used together with a process gas eg O<SB>2</SB>, Ar, CH<SB>3,</SB> CH<SB>4</SB> or C<SB>2</SB>H<SB>4</SB>, with flow rates of 5-75 sccm and 0-15 sccm respectively with an etchant gas pressure of 5-120 mTorr. The power density range may be 0.16-0.95 Wcm<SP>-2</SP>.

Description

1 2348399 1 2 A REACTIVE ION ETCHING PROCESS 3
4 FIELD OF THE INVENT10
6 The invention relates to a reactive ion etching (RIE) 7 process, in particular to a RIE process which can be 8 used in the fabrication of an optical waveguide with 9 low surface and sidewall roughness and which has low levels of material re-deposition.
11 12 BACKGROUND OF THE iNVENTION
13 14 There is an increasing demand in industries such as is telecommunications and bioelectronics for planar 16 lightwave circuit components. Such components include 17 large scale silica glass film waveguides whose planar 18 dimensions are normally in the range 4gm to 8 gm but 19 which can exceed 10pm. This differs from devices which are fabricated for the semiconductor industry, where 21 etch depths are small (<2gm) and where the amount of 22 etched material is typically less than 5%, such that 23 the,loading effect", or amount of material 24 redeposition, is reduced. The deep etching of the silica glass films during the fabrication of such 2 1 waveguides by dry etch mask techniques has several 2 known disadvantages. 3 4 Large scale silica waveguides can alternatively be 5 fabricated using a combination of flame hydrolysis 6 deposition (FHD) and RIE processes. It is desirable 7 for the RIE process to have a high FHD glass etch rate, 8 high mask selectivity and to cause minimal damage to 9 the waveguide core side walls during the etching 10 process. 11 12 RIE processes have several disadvantages known in the 13 prior art. RIE generally depends on ion assisted 14 chemical reactions forming volatile species which are 15 subsequently removed during the waveguide fabrication 16 process. However, it is desirable in certain 17 applications for the waveguides to be doped with rare 18 earth or heavy metal species which form involatile 19 products during the RIE process. These involatile 20 products enable surface imperfections or "grass" to 21 develop on the etched surfaces surrounding the 22 waveguide. 23 24 By combining the RIE and FHD processes, it is possible 25 to fabricate rare earth channel waveguides with 26 relatively smooth etched surfaces. In particular, the 27 RIE process can be controlled so that certain 28 parameters directly or indirectly affect the etchant 29 speed and the amount of ion re-deposition which occurs 30 during the RIE processing stage of fabricating an 31 optical waveguide. 32 33 In particular, in the deep etching of flame hydrolysis 34 deposited silica glass, for example when 4 gm or more 35 of material is to be removed, it is highly desirable to 36 achieve a fast etch speed. A problem arises in that
1 3 1 such fast etch speeds are known in the prior art to
2 affect the integrity of the mask used to define the 3 waveguide core area. Moreover, fast etch speeds often 4 result in damage to the etched side walls of the waveguide.
6 7 The invention seeks to provide an RIE process which 8 achieves a fast etch speed which preserves the 9 integrity of the mask used to define the waveguide core area and which also provides high quality waveguide 11 core side walls. It is known that the choice of etchant 12 gas, which may be a mixture of actively etching gas(es) 13 with dilutant or process gas(es), can accelerate the 14 rate at which material is etched but may at the same is time exacerbate the amount the etchant gas undercuts 16 the mask.
17 18 Suitable ranges of values for the RIE process 19 parameters are provided according to the invention to enable the RIE process to produce heavy metal or rare 21 earth doped channel waveguides. The waveguide cores 22 are formed with a desirably low level of surface 23 roughness and are etched at a desirable speed with 24 minimal damage to the waveguide side walls. A range of values for the pressure of an etchant gas, the rate at 26 which the etchant gas is supplied, and the radio 27 frequency (r.f) power density used in the RIE process 28 are given.
29 SUMMARY OF THE INVtNTION
31 32 In accordance with the invention, there is provided a 33 reactive ion etching process comprising the steps of:
34 controlling the flow rate of at least one etchant gas used in said reactive ion etching process; 36 controlling the pressure of said at least one 4 1 etchant gas; and 2 controlling the r.f. power density used in said 3 reactive ion etching process, wherein the parameters of 4 flow rate, pressure and r.f. power are selected to obtain a desired etch rate and/or to reduce the level 6 of ion dopant material redeposited in the reactive ion 7 etching process.
8 9 DESCRIPTION OF THE DRAWINGS
11 Embodiments of the present invention will now be 12 described, by way of example only, with reference to 13 the accompanying drawings, in which:
14 Figs. 1A to 1C show scanned electron micrographs of a 16 erbium doped phosphosilicate waveguide with varying 17 levels of surface roughness.
18 19 DETAILED DESCRIPTION OF THE INVENTION
21 22 Referring now to the drawings, Figs.1A to 1C illustrate 23 scanned electron microscope images of erbium. doped 24 phosphosilicate waveguides formed by a method of fabricating an optical waveguide which incorporates the 26 method of optimising the reactive ion etching (RIE) 27 process to achieve a desired etch rate and/or level of 28 etched surface roughness.
29 Referring now to Fig. 1A, an optical waveguide 1 is 31 shown which displays a moderate number of surface 32 defects 2. The RIE process in the fabrication of the 33 optical waveguide has been controlled to ensure a rapid 34 etch rate to the detriment of the smoothness of the waveguide surface.
36 1 1 Referring now to Fig. 1B, an optical waveguide 3 is 2 shown which displays a fewer surface defects 4, than 3 shown in Fig. 1A. The RIE process in the fabrication 4 of the optical waveguide has been controlled to slightly compromise the rapidity of the etch rate to 6 give a lower degree of roughness of the waveguide 7 surface.
8 9 Referring now to Fig. 1C, an optical waveguide 5 is shown which displays a minimal number of surface 11 defects 6. The RIE process in the fabrication of the 12 optical waveguide has been controlled to ensure the 13 roughness of the waveguide surface is been reduced to a 14 minimum to the detriment of the etch rate.
16 In a preferred embodiment of the invention, a method of 17 fabricating an optical waveguide includes the following 18 stages:
19 (1) Forming at least one intermediate layer on an 21 underlying substrate and optionally doping said 22 layer; 23 24 (2) Forming at least one core layer on the underlying intermediate layer and optionally doping said core 26 layer; 27 28 (3) Forming a waveguide core from the core layer(s) by 29 masking the uppermost said core layer and by using a reactive ion etching (RIE) process to remove the 31 unwanted portions of said core layer(s).
32 33 (4) Forming at least one cladding layer to embed the 34 waveguide core and optionally doping said cladding layer.
36 6 1 In the preferred embodiment, any suitably appropriate 2 process can be used to perform each of stages one, two 3 and four. The masking step of stage three can be 4 performed conventionally but the reactive ion etching 5 process step of stage three is performed according to 6 the invention. 7 8 The preferred embodiment will now be described in more 9 detail. An intermediate layer, for example a buffer 10 layer and an upper intermediate layer deposited 11 thereon, is deposited on a substrate, for example a 12 silicon substrate using, for example, a flame 13 hydrolysis deposition (FHD) process. 14 15 The buffer layer comprises silica, but can be any 16 thermally oxidised layer of the substrate. The upper 17 intermediate layer comprises silica, and is doped with 18 selected dopant ions which induce certain desired 19 properties in the upper intermediate layer. The upper 20 intermediate layer is then consolidated, for example, 21 in an electrical furnace or by an FHD burner, before 22 any subsequent layers are deposited. 23 24 In the method of fabricating the optical waveguide, 25 after the upper intermediate layer is consolidated, a 26 core layer is subsequently deposited using an FHD 27 process. The core layer comprises silica, and is doped 28 with dopant ions which induce certain desired 29 properties in the core layer. The core layer is then 30 consolidated, for example in an electrical furnace or 31 by an FHD burner, at least partially before any 32 subsequent layers are deposited. 33 34 The normal FHD apparatus is modified so that the core 35 layer can be aerosol doped. An additional feed is 36 provided on the FHD apparatus supplies aerosol droplets 1 7 1 of the dopant ions. High concentrations of core layer 2 dopant ions, for example concentrations exceeding 3 0.5wto-., but more typically in the range 0.2wto-. to 2 4 wt%, of rare earth ions or heavy metal ions can be 5 introduced during the deposition of the core layers by 6 using such an aerosol doping technique. 7 8 The waveguide core is then formed from the core layer 9 by masking the core layer and etching away the unwanted 10 portion of the core layer. Subsequently, another 11 cladding layer is deposited and consolidated similarly 12 to the first cladding layer. 13 14 Many variations in the stages of fabricating an optical 15 waveguide are possible which differ from those 16 described in the preferred embodiment. For example, 17 more than one intermediate, core and/or cladding layers 18 can be deposited at each stage. The intermediate,-core 19 and cladding layers may be only partially consolidated 20 after they are deposited and full consolidation can be 21 achieved by subsequent thermal treatment, for example, 22 when a subsequently deposited layer is being 23 consolidated. Obviously, the choice of fabrication 24 process depends to an extent on the deposition and 25 consolidation temperatures of each layer. 26 27 The waveguide core is formed from the core layers by 28 performing a suitable masking process on the uppermost 29 core layer so that a mask portion covers the waveguide 30 area to be retained during the RIE process. The RIE 31 process parameters are selected to enable the desired 32 etch rate to be achieved with a minimal amount of 33 erosion of the mask portion and with a minimal amount 34 of undercut under the mask portion. The RIE etchant 35 gas is thus selected to exhibit a high degree of 36 selectivity between the mask layer and the waveguide 8 layers to be etched.
2 3 The mask used is preferably metal, for example, 4 nichrome (NiCr) or alternatively is Ni, Ti:Ni, or Ti:NiCr. Other suitable masks include amorphous 6 silicon and polysilicon. The mask is formed by 7 depositing a mask layer, i.e. a layer of masking 8 material, on the uppermost core layer. The metal masks 9 may be deposited, for example, by thermal evaporation, electron beam evaporation or sputtering. Amorphous 11 silicon masks may be deposited, for example, by plasma 12 enhanced chemical vapour deposition (PECVD), and 13 silicon masks may be deposited, for example, by low 14 pressure chemical vapour deposition (LPCVD).
is 16 A layer of resist, for example, photo-resist, is then 17 formed on top of the mask layer and is patterned using 18 standard photo-lithographic techniques which remove the 19 resist. The exposed unwanted mask areas are then etched away and the wanted mask portion defining the 21 waveguide is finally left covered by the mask and 22 resist layers.
23 24 Preferably, the metal mask is deposited by using an evaporator. To prevent mask erosion during the etchant 26 process, a mask thickness of 100 nm was used which lies 27 in a suitable range of 10m to 800m. A suitable 28 photoresist is SHIPLEYTm S1818 which was postbaked at 29 1200C. Alternatively, a 1.8gm thick photoresist can be alone as a dry etch mask.
31 32 To achieve the desired etch rates and waveguide wall 33 surface roughness, the method of controlling the RIE 34 process selectively controls certain selected parameters, for example, the pressures of the etchant 36 gases used, the flow rate of the etchant gas, and the 1 9 1 r.f. power density used. It is desirable for the 2 etchant gas to offer a high etch rate yet be highly 3 selective between the mask and core material. If the 4 selectivity is low, the side wall quality is reduced.
6 The etchant gas is a ideally a fluorine based etch gas 7 and/or at least one other gas, for example, a dilutant 8 or a process gas, e.g. 02' Fluorine based gases can be 9 used, for example, to etch both metal and silicon based masks or alternatively, chlorine bases gases can be 11 used to etch siliicon-based masks. The process gas is 12 selected, for example, so that the amount of polymer 13 formation during the RIE process stage of fabricating a 14 waveguide is increased, which increases the anisotropy of the etching process and so improves the vertical 16 orientation of the side-walls of the waveguide channel 17 which are etched.
18 19 These selected RIE parameters affect the etch rate of the RIE process and the amount of material which is 21 redeposited during the RIE processing stage. The 22 amount of re-deposition which occurs during the RIE 23 processing stage directly and/or indirectly determines 24 the level of surface roughness of the etched surfaces formed.
26 27 In the preferred embodiment, the etchant gas includes a 28 process gas, for example 0., and a fluorine based 29 chemical, for example, CHF3. Selecting suitable values for the RIE parameters with this etchant gas enables 31 the RIE process to form waveguide cores which possess a 32 desirably low level of surface roughness and/or which 33 are formed at a desirable etch rate. The parameters 34 varied are the fluorine based etchant gas flow rate, the process gas flow rate, the etchant gas pressure and 36 the r.f. power density. Selected values of these RIE 1 parameters and the RIE etchant speeds and levels of 2 waveguide core surface roughness obtained by the RIE 3 process using these parameters are detailed in Table 1A 4 shown overleaf. 5 6 A level setting for the RIE process combines selected 7 values of the RIE parameters. Three level settings are 8 given in Table 1B shown below:9 11 12 13 14 is - 16 Table 1B The values set for each of the RIE parameters 17 for each level setting of the RIE process.
18 19 The etch rate average for an CHF3 flow of 5 sccm (runs 1,2, and 3) is given by the average of E1 (1.85gm/hr), 21 E2 (5.42gm/hr) and E3 (13.11pm/hr). This is denoted as 22 Ecl, and is 6.79 gm/hr. Similarly, the etch rate average 23 for CHF3 flow setting 2, 25 sccm, is given by the Level CH3 Flow 02 Flow Etch Rf Settings Rate rate Pressure Power (scCM) (scCM) (mTorr) (W/CM2) 1 5 0 20 0.16 2 20 5 60 0.38 1 3 45 10 100 0.6 ---1 2 3 4 6 7 8 9 11 12 13 14 Table 1 The CHF3 gas flow rate, the 02 gas flow rate, etchant gas pressure and r.f.
16 power density and the resulting etch rate of the RIE process and the roughness 17 of the waveguide surface etched by the RIE process.
Selected Values of parameters Resultant Features of governing the RIE process the RIE process Run CHP, Flow 02 Flow Rate Etch Pressure RF Power Etch Rate Roughness Number Rate (seem) (seem) (mTorr) Density (gm/hr) 1 WCM2) (nm) 1 5 0 20 0.16 E1 1.85 R1 13.30 2 5 5 60 0.38 E2 5.42 R2 56.80 3 5 10 100 0.6 E3 13.11 R3 147.40 4 25 0 60 0.6 E4 7.62 R4 137.90 25 5 100 0.16 E5 1.84 R5 11.80 6 25 10 20 0.38 E6 3.02 R6 19.00 7 45 0 100 0.38 E7 4.68 R7 61.20 8 45 5 20 0.6 E8 6.02 R8 19.00 9 45 10 60 0.16 E9 3.00 R9 40.00,11 12 1 average of the etch rates of experiments 4, 5 and 6 and 2 is 4.16 gm/hr. The etch rate average for CHF3 flow level 3 setting 3 'S EC3 = 4.57 gm/hr. 4 5 The average etch rates obtained by the RIE process for 6 each level setting of the RIE process are shown 7 overleaf in Table 2A, and the average surface roughness 8 of the waveguides formed by each level setting are 9 shown in Table 2B. 10 11 Each of the first three rows in Table 2A corresponds to 12 a different level setting, i.e., to a different set of 13 parameters selected to control the RIE process. The 14 final row gives the difference between the maximum and 15 minimum etch rates in each column. 16 17 In table 2A, the etch rate difference for the CHF3 flow 18 parameter values selected, AEc, is Ec,-EC2 for 2.63 19 gm/hr. Similarly, the etch rate difference for the 20 pressure parameter values selected is given by EPr3 21 EPrif or 2.91 1Am/hr. 22 23 The maximum etch rate for each of the RIE parameter 24 values selected occurs at the smallest CHF3 flow value, 25 greatest 02 flow value, highest pressure value and 26 highest power value, i.e., by the values Ec, E03, EPr31 27 EP.3. The RIE process is optimized for maximum etch rate 28 by setting the RIE parameters to these values. 29 30 Table 2B shows the average surface roughness of the 31 optical waveguide formed by the RIE process. Each of 32 the first three rows corresponds to a different level 33 setting: i.e., to a different set of parameters 34 selected to control the RIE process. The final row 35 gives the difference between the maximum and minimum 36 surface roughness obtained in each column.
1 13 1 2 3 4 6 7 Table 2A 8 9 10 11 12 13 14 15 Average Glass Etch Rate (Am/hr) Level CHF3 02 Pressure Power Density 1 Ecl 6.79 Eol 4.72 EPrl 3.63 Epol 2.23 2 EC2 4.16 E02 4.43 EPr2 5.35 EPo2 4.37 3 EC3 4.57 E03 6.38 EPr3 6.54 EPo3 8.92 I Max.Diff. IF AEc 1 2.63 IF AEO 1.9 1 2.91 1 6.69 Ell AEPr -11 AEp, 1 I Roughness (nm) I Level CHF3 02 Pressure Power Density 1 RC, 72.50 Rol 70.80 Rprl 17.10 Rp., 21.70 2 RC2 56.23 R02 29.20 RPr2 78.23 RP,,2 45.67 3 RC3 40.07 R,, 68.80 RT'r3 73.47 RPo3 101.43 Max. Diff. IL ARC 1 32.43 11 ARO 41.60 ARpr 6 1. ARp,, 79.73 14 1 Table 2B shows that RIE process produces minimal 2 roughness for the greatest CHF3 flow, medium 02 f'OW 3 smallest pressure and smallest power (Ec:3, E02, Epri, 4 E,,j 5 6 The following settings for the RIE parameters: a CHF3 7 flow rate of 25 sccm, an 02 flow rate of 5 sccm, a 8 pressure of 20 mTorr, and a r.f. power density of 9 0.6W/CM2 give an etch rate of 5.2 pm/hr. These 10 settings give a desirably low level of re- deposition 11 and a desirably low level of surface roughness. Fig. 12 1C displays a scanned electron microscope image of an 13 erbium doped phosphosilicate waveguide 5 fabricated 14 using these RIE parameter values. 15 16 To achieve a desirably smooth waveguide surface the 17 following ranges of RIE parameter values are suitable: 18 a CHF, flow rate of 5 to 75 sccm; an 02 f low rate of 0 19 to 15 sccm, a pressure of 5 to 30 mTorr, and a r.f. 20 power density of 0.06 to 0.64 WCM-2. The selection of 21 parameter values in these ranges gives RIE etch rates 22 of between 1.8 and 1.3 gm/hr and surface roughness 23 levels of between 5 and 100 nm. 24 25 In another embodiment, the RIE process is controlled to 26 give an optimum etch rate which depends strongly on the 27 pressure and power by selecting the following parameter 28 values: a CHF3 carrier gas flow rate of 45 sccm, an 02 29 flow rate of 5 sccm, a pressure of 20 mTorr, and a r.f. 30 power density of 0.6 WCM-2. Fig. 1B illustrates a 31 scanned electron microscope image of an erbium doped 32 phosphosilicate waveguide 5 formed according to this 33 embodiment. 34 35 To achieve a desirably high etch rate the following 36 ranges of parameter values are suitable: a CHF3 flow 1 1 rate of 5 to 45 sccm; an 02 flow rate of 5 to 15 sccm, a 2 pressure of 80 to 120 mTorr, and a r.f. power density 3 of 0.54 to 0.95 W/CM2. The selection of parameter 4 values in these ranges gives RIE etch rates of between 8ym and 13gm/hr and surface roughness levels of between 6 100 and 200 nm.
7 8 Although 02 and CHF3-form the etchant gas used in the 9 RIE process in the preferred embodiment of the invention, other fluoride based etchant gases can be 11 used for etching silica type material such as CF4. C2F6.
12 SF6, etc. Process gases such as Ar, CH4, etc can also 13 be incorporated into the etchant. The RIE processing 14 stage can be generally tailored for each etchant gas mix to produce optimal etch rates by using high flow 16 rate, low pressure and high power parameters.
17 18 Alternatively, the RIE processing stage can be tailored 19 to reduce the amount of ion deposition and thus the level of surface roughness of the optical waveguide 21 formed by the method. Desirably low levels of surface 22 roughness of silicon based waveguides of between 5 nm 23 to 100 nm can be achieved.
24 Waveguides which are fabricated using the invention 26 display further desired properties, for example 27 substantially vertical (901) sidewalls.
28 29 By the selection of appropriate values for the pressure and flow rates of the etchant gases, the RIE rate can 31 exceed 115 nm/min. An etch rate in excess of 115 32 nm/min was achieved using an etchant gas flow rate of 33 -45sccm, a low etchant gas pressure of -20 mTorr and by 34 using a high r.f. power density of 0. 6 WCM-2. The resulting waveguide has a side wall anisotropy of >890 36 and a relatively low surface roughness of 19nm.
16 1 While several embodiments of the present invention have 2 been described and illustrated, it will be apparent to 3 those skilled in the art once given this disclosure 4 that various modifications, changes, improvements and 5 variations may be made without departing from the 6 spirit or scope of this invention. 7 8 The text of the accompanying claims and abstract are 9 hereby declared to be incorporated into the text of the 10 description.
1 17

Claims (25)

1 Claims: -
2 3 1. A reactive ion etching (RIE) process comprising 4 the steps of:
controlling the flow rate of at least one etchant 6 gas used in said reactive ion etching process; 7 controlling the pressure of said at least one 8 etchant gas; and 9 controlling the r.f. power density used in said reactive ion etching process, wherein the parameters of 11 flow rate, pressure and r.f. power density are selected 12 to obtain a desired etch rate and/or a desired level of 13 material re-deposition in the reactive ion etching 14 process.
16
2. A RIE process as claimed in Claim 1, wherein the 17 etchant gas comprises a first etchant gas and at least 18 one other etchant gas and/or process gas.
19
3. A RIE process as claimed in either Claim 1 or 21 Claim 2, wherein the flow rate of the first etchant gas 22 is controlled such that its parameter ranges from 5 23 sccm to 45 sccm.
24
4. A RIE process as claimed in any either Claim 2 or 26 Claim 3, wherein the etchant gas further includes a 27 process gas whose - flow rate is controlled such that its 28 parameter ranges from 0 sccm to 10 sccm.
29
5. A RIE process as claimed in any preceding claim, 31 wherein the pressure of the etchant gas is controlled 32 such that its parameter ranges from 20 mTorr to 100 33 mTorr.
34
6. A RIE process as claimed in any preceding claim, 36 wherein the r.f. power density is controlled such that 18 1 its parameter ranges from 0.16 WCM-2 to 0.6 WCM-2.
2 3
7. A RIE process as claimed in any preceding claim, 4 wherein the etchant gas is a fluorine based gas.
6
8. A RIE process as claimed in Claim 7, wherein the 7 fluorine based gas is CHF3 and/or C2F6 and/or SF, and/or 8 CF4 and/or CBrF5 9
9. A RIE process as claimed in any of claims 2 to 8, 11 wherein the said process gas is 02, and/or Ar, and/or 12 CH3, and/or CH, and/or C,H4.
13 14
10. A RIE process as claimed in any one of claims 2 to 9, wherein the first etchant gas flow rate ranges from 16 5 sccm to 75 sccm; the process gas flow rate ranges 17 from 0 sccm to 15 sccm; the etchant gas pressure ranges 18 from 5 mTorr to 30 mTorr; and the r.f. power density 19 ranges from 0.06 WCM-2 to 0.64 WCM-2.
21
11. A RIE process as claimed in any preceding claim, 22 wherein the etchant rate of the RIE process is greater 23 than 115 nm/min.
24
12. A RIE process as claimed in any one of claims 2 to 26 9, wherein the first etchant gas flow rate ranges from 27 S sccm to 45 sccm; the second process gas flow rate 28 ranges from 5 sccm to 15 sccm; the etchant gas pressure 29 ranges from 80 mTorr to 120 mTorr; and the r.f. power density ranges from 0.54 WCM-2 to 0.95 WCM-2.
31 32
13. A method of fabricating a waveguide comprising the 33 steps of:
34 forming an intermediate layer upon a substrate; forming a core layer on the intermediate layer; 36 forming a waveguide core from the core layer; and 19 1 forming a cladding layer to embed the waveguide 2 core; 3 wherein the step of forming the waveguide core 4 comprises the steps of:
forming a mask on the core layer; and 6 removing an unwanted portion of the core layer 7 leaving the waveguide core using a reactive ion etching 8 process as claimed in any preceding claim.
9
14. A method of fabricating a waveguide as claimed in 11 claim 13, wherein the RIE process etches material to a 12 depth greater than 4 ym.
13 14
15. A method of fabricating a waveguide as claimed in is either Claim 13 or Claim 14, wherein the RIE process 16 fabricates a waveguide core with a planar dimension 17 greater than 20pm.
18 19
16. A method of fabricating a waveguide as claimed in any of Claims 13 to 15, wherein the etched surfaces of 21 the waveguide core have a surface roughness of 5 nm to 22 100nm.
23 24
17. A method of fabricating a waveguide as claimed in any of claims 13 to 16, wherein the RIE etchant and/or 26 process gas is selected to optimise the selectivity 27 between the mask and the core layer, and the range of 28 values for the RIE parameters are selected accordingly.
29
18. A method of fabricating a waveguide as claimed in 31 claim 14, wherein the RIE process etches material to a 32 depth greater than 10 um.
33 34
19. A method of fabricating a waveguide as claimed in any of Claims 13 to 18 wherein the mask used is formed 36 by depositing a layer of Ni, Ti:Ni, Ti:NiCr, amorphous silicon and/or polysilicon.
2 3
20. A method of fabricating a waveguide as claimed in 4 claim 19, wherein the mask layer is formed by either thermal evaporation, or electron beam evaporation, or 6 sputtering, or plasma enhanced chemical vapour 7 deposition, or low pressure chemical vapour deposition.
8 9
21. A method of fabricating a waveguide as claimed in any of Claims 13 to 20, wherein at least one layer of 11 the waveguide is doped with rare earth ions.
12 13
22. A method of fabricating a waveguide as claimed in 14 claim 21, wherein the dopant concentration of the rare earth ions is substantially greater than or equal to 16 0.5 wt%.
17 18
23. A method of fabricating a waveguide as claimed in 19 any of Claims 13 to 22, wherein the amount of polymer formation undergone by the etchant gas during the 21 reactive ion etching process increases the anisotropy 22 of the etching process such that substantially vertical 23 waveguide side-walls are etched by the etching process.
24
24. A reactive ion etching process substantially as 26 described herein and with reference to the accompanying 27 drawings.
28 29
25. A method of fabricating a waveguide substantially as described herein and with reference to the 31 accompanying drawings.
32 33 34
GB9907302A 1999-03-31 1999-03-31 Reactive ion etching with control of etch gas flow rate, pressure and rf power Withdrawn GB2348399A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
GB9907302A GB2348399A (en) 1999-03-31 1999-03-31 Reactive ion etching with control of etch gas flow rate, pressure and rf power
EP00914290A EP1166341A1 (en) 1999-03-31 2000-03-30 A reactive ion etching process
AU35685/00A AU3568500A (en) 1999-03-31 2000-03-30 A reactive ion etching process
PCT/GB2000/001231 WO2000059020A1 (en) 1999-03-31 2000-03-30 A reactive ion etching process
GB0118719A GB2363361B (en) 1999-03-31 2000-03-30 A reactive ion etching process

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Application Number Priority Date Filing Date Title
GB9907302A GB2348399A (en) 1999-03-31 1999-03-31 Reactive ion etching with control of etch gas flow rate, pressure and rf power

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GB9907302D0 GB9907302D0 (en) 1999-05-26
GB2348399A true GB2348399A (en) 2000-10-04

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US9304035B2 (en) 2008-09-04 2016-04-05 Zena Technologies, Inc. Vertical waveguides with various functionality on integrated circuits
US9429723B2 (en) 2008-09-04 2016-08-30 Zena Technologies, Inc. Optical waveguides in image sensors
US9601529B2 (en) 2008-09-04 2017-03-21 Zena Technologies, Inc. Light absorption and filtering properties of vertically oriented semiconductor nano wires
US8810808B2 (en) 2009-05-26 2014-08-19 Zena Technologies, Inc. Determination of optimal diameters for nanowires
US9177985B2 (en) 2009-06-04 2015-11-03 Zena Technologies, Inc. Array of nanowires in a single cavity with anti-reflective coating on substrate
US8791470B2 (en) 2009-10-05 2014-07-29 Zena Technologies, Inc. Nano structured LEDs
US9082673B2 (en) 2009-10-05 2015-07-14 Zena Technologies, Inc. Passivated upstanding nanostructures and methods of making the same
US9490283B2 (en) 2009-11-19 2016-11-08 Zena Technologies, Inc. Active pixel sensor with nanowire structured photodetectors
US8710488B2 (en) 2009-12-08 2014-04-29 Zena Technologies, Inc. Nanowire structured photodiode with a surrounding epitaxially grown P or N layer
US9263613B2 (en) 2009-12-08 2016-02-16 Zena Technologies, Inc. Nanowire photo-detector grown on a back-side illuminated image sensor
US8754359B2 (en) 2009-12-08 2014-06-17 Zena Technologies, Inc. Nanowire photo-detector grown on a back-side illuminated image sensor
US8766272B2 (en) 2009-12-08 2014-07-01 Zena Technologies, Inc. Active pixel sensor with nanowire structured photodetectors
US8889455B2 (en) 2009-12-08 2014-11-18 Zena Technologies, Inc. Manufacturing nanowire photo-detector grown on a back-side illuminated image sensor
US8735797B2 (en) 2009-12-08 2014-05-27 Zena Technologies, Inc. Nanowire photo-detector grown on a back-side illuminated image sensor
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US8835831B2 (en) 2010-06-22 2014-09-16 Zena Technologies, Inc. Polarized light detecting device and fabrication methods of the same
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US8835905B2 (en) 2010-06-22 2014-09-16 Zena Technologies, Inc. Solar blind ultra violet (UV) detector and fabrication methods of the same
US8890271B2 (en) 2010-06-30 2014-11-18 Zena Technologies, Inc. Silicon nitride light pipes for image sensors
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US9543458B2 (en) 2010-12-14 2017-01-10 Zena Technologies, Inc. Full color single pixel including doublet or quadruplet Si nanowires for image sensors
US8748799B2 (en) 2010-12-14 2014-06-10 Zena Technologies, Inc. Full color single pixel including doublet or quadruplet si nanowires for image sensors
US9299866B2 (en) 2010-12-30 2016-03-29 Zena Technologies, Inc. Nanowire array based solar energy harvesting device
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