GB2300375A - Bonding method for electric element - Google Patents

Bonding method for electric element Download PDF

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Publication number
GB2300375A
GB2300375A GB9610304A GB9610304A GB2300375A GB 2300375 A GB2300375 A GB 2300375A GB 9610304 A GB9610304 A GB 9610304A GB 9610304 A GB9610304 A GB 9610304A GB 2300375 A GB2300375 A GB 2300375A
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GB
United Kingdom
Prior art keywords
layer
electric element
bonding
forming
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB9610304A
Other versions
GB2300375B (en
GB9610304D0 (en
Inventor
Yuji Kimura
Kinya Atsumi
Katsunori Abe
Noriyuki Matsushita
Michiyo Mizutani
Tetsuo Toyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
NipponDenso Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP14017595A external-priority patent/JP3271475B2/en
Application filed by NipponDenso Co Ltd filed Critical NipponDenso Co Ltd
Publication of GB9610304D0 publication Critical patent/GB9610304D0/en
Publication of GB2300375A publication Critical patent/GB2300375A/en
Application granted granted Critical
Publication of GB2300375B publication Critical patent/GB2300375B/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/001—Interlayers, transition pieces for metallurgical bonding of workpieces
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    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492—Bases or plates or solder therefor
    • H01L23/4924—Bases or plates or solder therefor characterised by the materials
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    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
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    • B23K35/004—Interlayers, transition pieces for metallurgical bonding of workpieces at least one of the workpieces being of a metal of the iron group
    • B—PERFORMING OPERATIONS; TRANSPORTING
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    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
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    • B23K35/007—Interlayers, transition pieces for metallurgical bonding of workpieces at least one of the workpieces being of copper or another noble metal
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
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  • Semiconductor Lasers (AREA)
  • Die Bonding (AREA)

Abstract

A method for bonding a semiconductor device to a pedestal, which can obtain a sufficient bonding strength and stable electric contact, are disclosed. On an n-type electrode constituting an ohmic electrode for a semiconductor laser device are formed a Ni layer and a Sn-containing solder layer. Then, the solder layer is melted and bonded to a heat sink provided with Au-plating. The film thickness of the Ni layer is set to approximately 500Ñ or more. When the solder layer is melted, Ni in the Ni layer diffuses into the solder layer and Sn in the solder layer diffuses into the Ni layer. By this mutual diffusion, bonding strength and wettability between the semiconductor device and pedestal can be improved.

Description

BONDING MATERIAL AND BONDING METHOD FOR ELECTRIC ELEMENT The present invention relates to a bonding material and a bonding method for electric elements (devices), such as semiconductor laser devices, to be sdldered to a pedestal.
In soldering a semiconductor device, such as semiconductor laser device, to a pedestal plated with Au, such as heat sink, stem and circuit board, formed pellets of eutectic solder, such as Au-Sn and Pb-Sn, have conventionally been used. For the formed pellets, for the reason of .ufacturing method and handling convenience, the individual size thereof should be hundreds pm x hundreds from and the film thickness thereof should be at least tens pm.
To satisfy these requirements, the volume of the solder layer may be excessively large. Consequently, when soldering a semiconductor device to a pedestal, the position of the semiconductor device may slide or protuberance may be formed in the periphery of the semiconductor device. When a semiconductor laser device is used as the semiconductor device to be bonded, there is a problem that the protuberant solder layer may disturb the laser light.
A technique developed to solve this problem is disclosed in the European Patent Publication No. 0119691A2.
This technique does not use any formed pellet but provides on the semiconductor laser device a barrier layer consisting of Pd or Pt, a comparatively thick Au electrode and a Sn layer formed by means of evaporation to thereby form an eutectic layer of Sn and Au in preparation for mounting. Another technique similar to this is disclosed in the United States Patent No. 5,197,654.
However, even if the solder layer is formed to be thinner, there is a problem that, if wettability between the solder layer and the mounting surface is poor, partial connection may be caused due to a small volume of solder and therefore a sufficiently high bonding strength and a sufficiently low resistance in connection can not be obtained.
In view of the above problem, the present invention has an object to bond a semiconductor device to a pedestal so that a sufficient bonding strength and a stable electric connection can be obtained.
The inventors of the present invention paid attention to the fact that Sn and Ni are highly compatible with each other and can form an intermetallic compound.
As an ohmic electrode for a GaAs substrate, a stack of Ni and Au on an alloy of Au and Ge (hereinafter this type structure will be expressed as Au-Ge/Ni/Au) has been well known. In this structure, it is said that when the film thickness of Ni is increased, contact resistance thereof increases, and therefore, Ni is used with a thickness of approximately 200A. In this case, Ni is used as a barrier electrode for preventing the diffusion of the surface Au.
For this reason, the inventors of the present invention considered using this metal system and tried to deposit by means of evaporation a solder containing Sn thereon and solder the same to a pedestal such as heat sink.
However, there was a problem caused that Au on Ni had diffused into the solder layer and the bonding strength and wettability of the solder were aggravated.
To counter this problem, the inventors of the present invention tried soldering without providing the Au layer and found that the wettability had been improved and table soldering with a high bonding strength had been achieved. This was achieved by the fact that Ni had diffused into the solder layer and Sn in the solder layer had diffused into-Ni, i.e., mutual diffusion occurred, and as a result, the bonding strength and wettability of the solder had been improved.
Furthermore, in bonding the semiconductor laser device, it is preferable to select a bonding material which can lower the bonding temperature to thereby alleviate heat damage to the semiconductor laser device. The inventors of the present invention studied with this respect from various aspects and discovered, as described later, that if the Au-Sn solder is used, Ni diffuses into the Au-Sn layer to form an Au-Sn-Ni alloy and thereby lower the bonding temperature.
The present invention is based on the above various trials and discoveries. Specifically, the present invention is characterized by the following: A mounting method for an electric element according to the present invention is characterized by a mounting method comprising the steps of: forming an electrode layer on an electric element; forming a Ni layer on the electrode layer; forming a solder layer containing Sn directly on the Ni layer; and heating the solder layer to obtain a mutually diffusion between the solder layer and the Ni layer and an ohmic contact of the electrode layer with respect to the electric element as well to bond the electric element to a pedestal.
According to the present invention, the bonding material is composed of an alloy of Au-Sn-Ni with Au as the main component and the composition ratio of Ni is set to 1.3wt% or more and under 10wt%. Therefore, bonding with a high strength can be made at a low melting point and at the same time the increase in contact resistance can be restrained.
Furthermore, according to the bonding method of the present invention, the Ni layer and the solder layer containing Sn are formed on the electrode of the electric element, and the solder layer is melted to be bonded to the pedestal.
Here, mutual diffusion, i.e., Ni in the Ni layer diffuses into the solder layer and Sn in the solder layer diffuses into the Ni layer, occurs during the melting of the solder layer. By this mutual diffusion, the Au-Sn-Ni alloy can be obtained, and the bonding strength and wettability of the solder can be improved without using any formed pellet of eutectic solder.
These and other objects, features and characteristics of the present invention will be appreciated from a study of the following detailed description, the appended claims, and drawings, all of which form a part of this application. In the drawings: FIG. 1 is a perspective view illustrating a semiconductor laser device of an embodiment where the present invention is applied to the semiconductor laser device; FIG. 2 is a perspective view illustrating the state that the semiconductor laser device has been die-bonded to a heat sink; FIG. 3 is a schematic view illustrating the construction when an n-GaAs substrate with an n-type electrode, Ni layer and solder layer formed on the back side thereof is bonded to a pedestal such as a heat sink;; FIG. 4 is a characteristic diagram indicating the relationship between the thickness of the Ni layer and the bonding strength measured on a vibration test; FIG. 5 is a graph indicating the relationship between the thickness and the bonding strength of the solder layer; FIG. 6 is a graph indicating the variation in the melting point when the composition ratio of Ni thermally diffused into an Au80wt%-Sn20wt% layer was varied; FIG. 7 is a graph indicating the relationship between the composition ratio of Ni in the Au80wt%-Sn20wt% layer-and the bonding strength; FIGS. 8A, 8B and 8C are views showing the construction where a driving IC for a display device has been mounted on a glass substrate; and FIG. 9 is a view showing the construction where a semiconductor laser device has been mounted on a Si substrate provided with a SiNX optical guide.
A detailed description will now be given of the presently preferred exemplary embodiments of the present invention applied to a semiconductor laser device.
A semiconductor laser device is a structure in which each working region is provided in a crystal formed by means of epitaxial growth on a GaAs or InP substrate.
Generally, an n-type substrate is used in this application.
As a material system, GaAs-AlGaAs system, InGaAsP-InP system, InGaP-InGaAlP system, etc. can be used. As an epitaxial growth method, liquid phase epitaxy, molecular beam epitaxy (MBE), metal organic chemical vapor deposition (MOCVD), etc.
can be used. As an active layer, a double hetero structure, a quantum well structure, etc. can be used.
FIG. 1 is a perspective view of a semiconductor laser device before being bonded to a pedestal, to which this embodiment is applied.
On an n-GaAs substrate 1 are stacked an n-GaAs buffer layer 2, an n-AlGaAs clad layer 3, an active layer 4 having an AlGaAs/GaAs multiquantum well structure, a p-AlGaAs clad layer 5 and a P-GaAs layer 6 in this order. The active layer 4 through the p-GaAs layer 6 are formed to be of mesa shape. On the top of the n-AlGaAs clad layer 3 and the mesa part is formed an insulating film 7 of SiO2 or the like with a window part therein. On the insulating film 7 is formed a p-type electrode (upper electrode) 8.
The p-type electrode 8 is made of a film formed by making a film to a specified thickness by electron beam evaporation, sputtering or the like. For the p-type electrode 8, Au-Zn/Au, Cr/Au, Mo/Au, Ti/Pt/Au, etc. can be used. Other materials can also be used as long as ohmic contact is attained.
On the back of the n-GaAs substrate 1 is formed an n-type electrode (lower electrode) 9 of Au-Ge. On the surface of the n-type electrode 9 is formed a bonding material comprising an Ni layer 10 and a solder layer 11.
The semiconductor laser device so constructed as described above is bonded to a heat sink, another semiconductor substrate, a circuit board, etc. The method of these mountings will now be described.
A plurality of the semiconductor laser devices illustrated in FIG. 1 are stacked and disposed on a heat sink 21 as shown in FIG. 2. The stacked laser structure is indicated by numeral 22 in FIG. 2. In this case, the bonding material of the upper semiconductor laser device is positioned on the p-type electrode of the lower semiconductor laser device.
The heat sink 21 is made of Cu, Fe or the like, and the surface thereof is provided with a highly conductive metal, such as Ni and Au, formed by means of plating, evaporation, sputtering or the like. A plurality of semiconductor laser devices are positioned to each other and stacked on the heat sink 21. At this time, vacuum tweezers are used for carrying chips, and it is preferable to use the vacuum tweezers which also function as a pressurizing part when the devices are heated by a heater because the use of such vacuum tweezers makes it easier to obtain the required positional accuracy.
The semiconductor laser devices stacked on the heat sink 21 are pressurized while being held not to move, and then heated to melt the respective solder layer 11 for bonding. After the temperature has reached the level that can melt the solder layers 11, the semiconductor laser devices are left at this temperature for the duration from seconds to minutes and then cooled. There are some methods of heating all the semiconductor laser device while the heat sink and the semiconductor laser chips are fixed not to move.
For example, heating is applied in a thermostatic bath, or =ating is applied from the back side of the heat sink by a heater or the like. The latter method is preferable for easier handling of the equipment.
After the above die bonding, the upper electrode and a driving circuit wiring are bonded to each other with a wire 23 made of Au, Pt or the like to attain electric contact to the semiconductor laser. Then, the whole unit is sealed in a can, if necessary, to complete the semiconductor laser.
Now, description will be given to the forming of the above n-type electrode 9, Ni layer 10 and solder layer 11 and the bonding thereof to the heat sink 21. The composition of this portion is illustrated in FIG. 3.
On the back surface of the n-GaAs substrate 1 is formed an Au-Ge layer as the n-type electrode 9. Instead of Au-Ge, other materials can be used for the n-type electrode 9 as long as an ohmic electrode can be formed, such as Au-Zn/Au, Cr/Au, Ti/Pt/Au, Au-Ge/Ni/Au, Au-Sn/Au, and an alloy layer thereof. Such materials are formed on the back surface of the n-GaAs substrate I to a specified thickness by means of electron beam evaporation (vacuum deposition), resistance heating evaporation, sputtering or the like.
Next, the Ni layer 10 is formed on the n-type electrode 9 in the same way. Then, as the solder layer 11, an alloy containing Sn, such as Au-Sn and Pb-Sn, is formed on the Ni layer 10. The method of forming the solder layer 11 will be described later.
The electrode 9/Ni layer 10/solder layer 11 containing Sn formed as described above are laid on the heat sink 21 provided with plating 21a of Ni, Au or the like as illustrated in FIG. 3, then pressurized and heated to mutually melt the solder layer 11 and the Ni layer 10, and then cooled, so that the semiconductor laser device is mounted on the heat sink 21. As a result of this heat treatment, the electrode 9 is sintered and ohmic contact with the substrate 1 is attained.
It is also acceptable that the formed electrode 9/Ni layer 10/solder layer 11 containing Sn are heated to approximately 360"C to attain the ohmic contact of the electrode 9 and concurrently form an eutectic layer of the Ni layer 10 and the solder layer 11 containing Sn. Then, the substrate 1 with the eutectic layer is laid on the heat sink 21 provided with the plating 21a of Ni, Au or the like, then pressurized and heated to a temperature higher than the melting point of the eutectic layer to melt the eutectic layer, and then cooled, so that the semiconductor laser device is mounted on the heat sink 21.
As soldering materials, Au-Sn, Au-Si, In, In-Pb, Pb-Sn, Au-Pb, Au-Ge, etc. are available. Among these materials, a good wettability of the solder and a high bonding strength can be attained by stacking the Ni layer and the solder layer containing Sn, such as Au-Sn and Pb-Sn.
Particularly, this effect is conspicuous when Au-Sn is used as the solder layer.
The Ni layer 10 has a role of barrier electrode 1=eventing a mutual diffusion of the soldering material and the electrode and a role of improving the wettability of the solder by diffusing into the solder layer 11. In particular, when Au is used on the top layer of the electrode 9, the stability of contact is degrade as Au is active and diffuses at a low temperature into the solder layer for soldering.
Therefore, a barrier electrode is necessary, and particularly when the electrode is made of Au or an alloy containing Au, the barrier electrode is effective.
The film thickness of Ni as a barrier electrode should be at least 200A. If the Ni layer is thinner than 200A, the Ni layer will be islandish losing the role of the barrier metal.
FIG. 4 illustrates the dependence of the strength of the bonding layer on the thickness of the Ni layer in a case where a film of Au-Ge electrode was formed to a thickness of 1,000A on an n-GaAs substrate of 0.5mm x 0.5mm in size and Ni/Au-Sn (Au and Sn are eutectic) were stacked on the electrode and subjected to a vibration test. The vibration test was conducted under Condition D of JIS C7022A-10 within a frequency range of 10Hz to 2,000Hz with an acceleration of 20G in 3 directions for 48 minutes. The thickness of the Au-Sn solder layer 11 was fixed to 1.5yam.
As the film thickness of the Ni layer 10 increased, the bonding strength increased, and no difference was seen in the bonding strength when the thickness of Ni is 1,000A or more. When the film thickness was 1, oooA or more, the substrate was broken during the test, and therefore, the bonding strength is supposed to be more than that shown in the figure. When the film thickness was 20or, the layer was peeled and a sufficient bonding strength was not obtained.
As the bonding strength of 500gf or more ensures so sufficient bonding as to clear various reliability tests, the Ni layer must be thickened to 50 or or more.
Now, how to form the solder layer 11 will be described.
To form the solder layer 11, stacking of the composing materials of the alloy, such as Au-Sn was tried.
In this case, the composition ratio can freely be designed and the materials to be evaporated can easily be controlled.
In this case, however, if the film thickness of each layer varies, the composition variation will occur.
Generally, it is customary that eutectic composition is used for designing the composition ratio of the solder.
Therefore, if the composition variation occurs, the melting point rises. If the melting point changes in this way, the mounting conditions must be changed accordingly. If the same conditions are applied, the solder may not melt, or even if the solder melts, the solder will not completely melt. As a result, a constant bonding strength can not be obtained after mounting.
To solve the problem, a study was made to form a film of the alloy, such as Au-Sn, Pb-Sn, In, In-Pb, Au-Si and Au-Pb, as the solder layer 11 by vapor growth, that is, to crm the solder layer 11 by means of physical vapor growth using the above alloy as an evaporation source.
The physical vapor growth referred to herein, which is called "physical vapor deposition (PVD)," is a method which does not use any chemical reaction but uses only the physical reactions, such as evaporation, sputtering and ion-plating, for forming thin film. The physical vapor deposition may be paraphrased as a phenomenon that the material itself to be formed on a substrate reaches the substrate in the state of vapor or cluster and forms a thin film. On the other hand, the methods using chemical reactions includes "chemical vapor deposition (CVD)." In this method, the source material is decomposably reacted within a vapor phase using energy, such as heat, plasma and light, to form a thin film through chemical reaction. The CvD is different in the principle of film formation from the PVD.
By forming the solder layer 11 in this way, even if the film thickness varied from layer to layer, almost no change was seen all the time in the melting point, and the above problem could be solved.
As film-forming methods by means of vapor phase growth, electron beam evaporation, resistance heating evaporation, sputtering, etc. can be used. Among these, in the electron beam evaporation and the resistance heating evaporation, the composition ratio in the product slightly varies from the composition ratio in the source material due to difference in the vapor pressure of the alloy. Therefore, it is preferable to use the sputtering method for film formation. When the electron beam evaporation or the resistance heating evaporation is used, if almost all the source material is completely evaporated, there is no change in the composition ratio between the source material and the deposited film. In addition, even if all the material is not evaporated, as the composition ratio depends on the vapor pressure, the composition ratio of the film does not vary from batch to batch.
A conventional technique using formed pellets as a soldering material has a problem that protuberances caused by excessive solder may cover the light emitting layer and disturb the tight output therefrom. However, by forming a thin film for the solder layer 11 by means of vapor growth, there is no excessive overflow of the solder, and a solder layer having a highly reproducible composition ratio can be obtained, whereby a stable bonding with a high bonding strength can be achieved.
The film thickness of the above solder layer 11 will now be described.
By using vapor growth for forming a thin film for a solder layer, excessive overflow of solder can now be prevented. However, when a plurality of semiconductor laser devices are stacked as described above, there is a problem that if the solder layer is comparative thick, the solder overflow covers the light emitting layer. In addition, the same problem occurs when the electrode on the side near the light emitting layer is soldered (in such a case as the second example described herein later). Reversely, if the solder layer is thin, there is a problem that bonding strength is low.
FIG. 5 illustrates the relation between the thickness and bonding strength of the solder layer when a semiconductor laser device of 0.5mm x O.5mm in size is mounted on a copper heat sink plated with Au.
The bonding strength increases as the film thickness of the solder layer increases, and no difference is seen in the bonding strength when the film thickness is 1pm or more. As the substrate was broken when the film thickness is 1pm or more, the strength is supposed to be more than that shown in the figure. It has been found that a bonding strength of 500gf or more is sufficient and can pass various reliability tests. Therefore, there is no such problem if the solder layer has a thickness of 3,000A or more.
The thickness of the solder layer has a relation with the surface roughness (Ra) of the bonding surface, which was 1,000A in this measurement. Generally, the film thickness of the solder layer should be thicker than the surface roughness, and it is found from the results of this test that the solder layer should be approximately three times as thick as the surface roughness. In mounting, a stem with a bonding surface having a surface roughness (Ra) of 500A to 2,500A was used. Usually as the stem having a surface roughness of 1, oooA are used, the thickness of the solder layer should be at least 3,000A, and preferably be 5,000A or more.
The bonding strength increases as the film thickness of the solder layer increases. However, when the solder layer becomes thicker, there is a problem of the overflow of the soldering material. Particularly, when a plurality of semiconductor laser devices are stacked, the overflow of the soldering material covers the light emitting layer. Furthermore, to form a thicker solder layer, longer time and more material to be evaporated are required. There is little overflow of the soldering material when the solder layer is under 1pm. However, when the thickness thereof is over 1pm, the soldering material overflows from the back surface of the chip.When the solder layer has a thickness of over 3pom, the soldering material sticks to the light emitting surface side, and when the solder layer has a thickness of over 4pom, the soldering material partly covers the light emitting layer. From these results, it is advisable that the film thickness of the solder layer be under 3pom.
Therefore, by setting the film thickness of the solder layer 11 to 0.3pm (3,000A) to 3pom, a bonding with a high bonding strength can be obtained. In addition, when a plurality of semiconductor laser devices are stacked, the soldering material of the stack part does not cover the light emitting layer, whereby a stable light output with a high bonding strength can be obtained.
Examples of the fabrication of a semiconductor device using the above solder layer 11 will now be described.
(First Example) A semiconductor laser device of a GaAs/AlGaAs system was made on an n-GaAs substrate, and the side of the n-type electrode thereof was soldered to a copper heat sink plated with Au. At this time, three semiconductor laser devices were stacked up. As an n-type electrode, a layer composed of 88wt% of Au and 12wit% of Ge was formed to a thickness of 1,000A. On this n-type electrode were provided Ni layer of 1,o00A thick and Au-Sn solder layer of 1pm thick.
At this time, the film of Au-Ge/Ni was formed by means of electron beam evaporation, and the solder layer was formed by means of sputtering. The size of the semiconductor laser device was 500pm x 600pm x 110pom. Three semiconductor devices were stacked up on the copper heat sink plated with Au and mounted thereon at a heating temperature of 340"C and a pressure of 60g. The devices mounted had no overflow of the soldering material thereof and no covering on the light emitting layer by the soldering material thereof. When a test was conducted on this example at a variable frequency of 10Hz to 2,000Hz and 20G/sec2 for 48 minutes in three directions, no change was recognized.The bonding strength of the device was measured on a shear tester, and found to be over lkgf.
(Second Example) A semiconductor laser device of an InGaP-InGaAlP system was made on an n-GaAs substrate, and the side of the p-type electrode thereof was soldered to the copper heat sink plated with Au. As a p-type electrode, films of Ti of 1,000A thick, Pt of 2,000A thick and Au of 3,000A thick were formed respectively, and on these films were provided Ni layer of 800A thick and Au-Sn solder layer of 0.8pm thick. At this time, the films were formed by means of electron beam evaporation. The size of the semiconductor laser device was 600from x 700pom x 110pom. The p-type electrode was soldered.
However, the soldering material did not cover the active layer, and therefore, a good light emission could be obtained. In addition, a bonding strength of lkgf or more was obtained, whereby a stable contact was achieved.
(Third Example) A GaAs electric field effect transistor was made on a semi-insulating GaAs substrate and soldered to a printed circuit board plated with Au. On the back surface of the semi-insulating GaAs substrate were provided Ni layer of i,oooA thick and Au-Sn solder layer of 2pm thick. The films were formed by means of sputtering. The size of the device was 500pm x 600pm x 180pom. The device was mounted at a heating temperature of 3600C and a pressure of 100g. The bonding strength of the device was measured on a shear tester, and found to be lkgf or more.
Now, description will be given to the bonding materials using solder.
When the above semiconductor laser device is bonded to a heat sink, it is effective to set the temperature, pressure, pressurizing time, etc. for bonding to larger values, for improving the wettability or the bonding strength. However, As out of GaAs used as a material of the semiconductor laser device has a low sublimating temperature, and therefore, a high bonding temperature aggravates the thermal damage to the device. In addition, a high pressure and a long pressurizing time also aggravate the mechanical damage to the light emitting layer.
Therefore, in bonding semiconductor laser devices, a bonding material which lowers the bonding temperature and alleviates the thermal damage to the semiconductor laser device should be selected.
The inventors of the present invention made studies on the above problem from various aspects and found that a melting point lower than that of the pellet composed of 80wt% of Au and 20wt% of Sn could be obtained when a Au-Sn system solder was used as the solder layer 11 and a stacked structure of Ni/(Au80wt%-Sn20wt%) was employed. The reason for this is that Ni diffuses into the Au-Sn layer and composes an Au-Sn-Ni alloy.
Based on the above, the film thickness of Ni was varied to change the concentration of Ni thermally diffusing into the Au80wt%-Sn20wt% layer and a state diagram was drawn.
The results are illustrated in FIG. 6.
In FIG. 6, letters L and S denote the liquid phase and the solid phase, respectively, and and ss denote the solid solution of Au-Sn-Ni, respectively. Therefore, letters (L+a) and (L+B) indicate the mixed state of the liquid phase and solid phase, respectively. The upper axis of abscissa indicates the film thickness of Ni layer when the thickness of the Au80wt%-Sn20wt% layer is set to 1.5pm in the Ni/ (Au80wt%-Sn20wt%) multilayer structure.
In this state diagram, the melting point of the (Au80wt%-Sn20wt%)-Ni alloy becomes lower than that of Au80wt%-Sn20wt% pellet as the amount of Ni increases. When the composition ratio of Ni (the weight ratio of Ni to the total weight of the bonding material) is 1.3wt%, the melting point lowers by approximately 100C.
Furthermore, when the amount of Ni is increased to have a composition ratio of approximately 3wt%, the lowest melting point is obtained, and the melting point lowers by 250C or more down from that of the Au80wt%-Sn20wt% pellet.
Therefore, the bonding temperature can be lowered by 250C or more down from that of the conventional bonding performed at the melting point of the Au8Owt%-Sn20wt%, whereby the thermal damage to the devices can be reduced.
The above effect and the effect described later are obtained by the diffusion of Ni into the Au-Sn layer and the composition of a Au-Sn-Ni alloy. Therefore, the effect can be obtained not only by the stacked structure of Ni/(Au80wt%-Sn20wt%) and but also by an layer of (Au80wt% Sn20wt%)-Ni alloy.
FIG. 7 illustrates the relation between the composition ratio of Ni in an Au80wt%-Sn20wt% layer and the bonding strength thereof. From this figure, it is understood that the bonding strength increases as the composition ratio of Ni increases but saturates when the composition ratio is 2.5wt% or more. In the experiment, the bonding strength was measured for the composition ratio up to 9.5wt% and a sufficient of bonding strength was confirmed.
In the bonding strength test, in a structure with a Ni composition ratio of 0.7wt%, peeling occurs at the bonding surface between the solder layer and the heat sink, but in a Ni composition ratio of 1.3wt% or more, there was no peeling on the above bonding surface but the bonded device part was fractured. As it has been confirmed that, if the bonding strength was 500gf or more, the devices could sufficiently withstand various reliability tests, the Ni composition ratio of 1.3wt% or more results in a stable bonding strength.
In FIG. 7, when the Ni composition ratios were 1.3wt% and 1.7wt%, a pressure of 50g was applied, and when the ratio was 2.5wt% or more, no pressure was applied but the bonding was performed with the self-weight of the device alone. Therefore, it is understood that when the Ni composition ratio is set to 2.5wt% or more, a sufficient bonding strength can be obtained with the self-weight of the device alone.
From these results, it is understood that by the addition of Ni to the Au80wt%-Sn2Owt% layer, the melting point of the solder can be lowered and consequently the bonding strength can be improved. The composition ratio of Ni be 1 wt% to 10wt% at which the melting point lowers by 100C or more. However taking the wettability and the bonding strength into consideration, it is preferable that the composition ratio of Ni should be 1.3wt% or more.
Furthermore, it is particularly preferable that the Ni composition ratio should be around 3wt%, say, 2wt% to 5wt%, in a ternary alloy because a ternary eutectic alloy is formed to obtain the lowest melting point and the composition after the solder solidifies can be kept constant for a long time within this composition ratio range.
If the Ni composition ratio is controlled to be increased by thickening the Ni layer on the Au-Ge layer and the Ni composition ratio exceeds 10wit%, an intermetallic compound between Sn and Ni is produced, and as such intermetallic compound is an insulator, the resistance value of the bonded part increases. Therefore, taking into consideration the increase in the resistance value of the bonded portion, it is preferable that the Ni composition ratio should be under 10wt%.
As described above, in bonding a semiconductor laser device to a pedestal, etc., as a bonding material is a soldering material containing a constant amount of Ni in Au-Sn eutectic solder and by using a pedestal having a surface of Au layer, bonding with a good wettability and a high bonding strength can stably be obtained.
Here, also for an element of the above Ni/(Au80%-Sn20wt%) stacked structure, it is preferable that the thickness of the Ni layer should be 500A or more as described above and the film thickness of the Au-Sn alloy solder layer should be within a range of 0.3pm to 3pm.
Furthermore, as can been seen from FIG. 6, it is preferable that the thickness of the Ni layer should be around 90nm, i.e., 70nm to 120nm, to make the Ni composition ratio around 3wt% which obtains a three component eutectic point in case the Au-Sn eutectic alloy layer is 1.5pom in thickness. In this case, for restraining the increase in the resistance value of the bonded portion, it is preferable that the thickness of the Ni layer should be under 300nm.
Examples of fabrication using the above bonding material will be now described.
(Fourth Example) A semiconductor laser device of a GaAs/AlGaAs system was made on an n-GaAs substrate, and the n-type electrode thereof was soldered to a copper heat sink plated with Au. As the n-type electrode, an Au88wt$-Ge12wt% layer of 0.lem thick was formed, and on the n-type electrode were provided Ni of 0.lem thick and Au-Sn solder of 1.5pm thick.
At this time, the (Au-Ge)/Ni layers were formed by means of electron beam evaporation, and the solder layer was formed by means of sputtering. The size of the semiconductor laser device was set to 500pm x 600pom x 110pom. The device was laid on the copper heat sink plated with Au and mounted thereon at a heating temperature of 340"C without applying any pressure.
When the device was subjected to a vibration test conducted at a variable frequency of 10Hz to 2,000Hz and 20G for 48 minutes in three directions, no change was recognized in comparison with the state before the test. The bonding strength of the device was measured on a tester and found to be approximately 1keg. The composition ratio of the bonding material at this measurement was Au77 .3wt%-Snl9 .3wt%-Ni3 .4wt%.
(Fifth Example) A semiconductor laser device of an InGaP-InGaAlP system was made on an n-GaAs substrate, and the p-type electrode thereof was soldered to a copper heat sink plated with Au. As the p-type electrode, layers of Ti of 0.1pom thick, Pt of 0.2pom thick and Au of 0.3pm were formed, and on the p-type electrode were provided Ni layer of 0.lem thick and Au-Sn solder of 1.0pom thick. At this time, the films were formed by means of electron beam evaporation. The size of the semiconductor laser device was set to 600pm x 700pm 110pom. The p-type electrode was soldered at a heating temperature of 3400C and a pressure of 30g. As a result, the soldering material did not cover the active layer, and therefore, a good light emission could be obtained.
Moreover, a bonding strength of lkgf or more was obtained, whereby a stable contact could be achieved. The composition ratio of the bonding material at this measurement was Au76wt%-Snl9wt%-Ni5wt%.
(Sixth Example) To the top surface of the p-type electrode of a semiconductor laser device was soldered the n-type electrode side of the upper semiconductor laser device to have a stacked structure. As the p-type electrode, layers of Cr of 0.04pm thick, Pt of 0.lem thick and Au of 0.5pm were formed.
As the n-type electrode, an Au88wt%-Gel2wt% layer of 0.1pom thick was formed, and on the n-type electrode were provided Ni layer of 0.1pm thick and Au-Sn solder layer of 1.5pm thick. At this time, the (Au-Ge)/Ni layers were formed by means of electron beam evaporation, and the solder layer was formed by means of sputtering. The size of the semiconductor laser device was set to 600pm x 700pom x 110pom. The n-type electrode was soldered to the p-type electrode at a heating temperature of 340"C and a pressure of 30g.The bonding strength between the devices was measured on a shear tester and found to be over 500kgf. At this time, the soldering material did not cover the active layer, and therefore, a good light emission could be obtained. In addition, by stacking the semiconductor laser devices, the light output could be increased. The composition ratio of the soldering material for bonding at this measurement was Au77.3wt%-Snl9.3wt%-Ni3.4wt%.
In the above embodiments, heat sinks plated with Au, Ni, etc., were used as pedestals. However, the semiconductor laser device may also be soldered to a pedestal made of Fe, Cu or the like.
In the above, description was made as to semiconductor laser devices as semiconductor devices.
However, the present invention may also be applied to other types of semiconductor devices. In this case, the present invention may also be applied to those using Schottky electrodes, as well as to those using ohmic electrodes.
Among the materials which can be used for the Schottky electrode are Al, Pt, Au, Ta, Cr, W, Mo, Ti, Cu, Ag and Al-Si.
Furthermore, the present invention may also be applied to electric elements, such as a chip resistor and a chip capacitor, as well as the other semiconductor devices.
Another example of application of the above Au-Sn-Ni bonding material will now be described.
(Seventh Example) When a driving IC 30 for a liquid crystal display device, an electroluminescence (hereinafter referred to as EL) display device, etc. is mounted on a glass substrate 31 -nd connected to conductors (electrodes) 32, the compositions illustrated in FIGS. 8A, 8B and 8C can be used. FIG. 8A illustrates an application using a mount pad 33 and wires 34, FIG. 8B illustrates an application using bumps 36, and FIG.
8C illustrates an application using beam leads 37. The above Au-Sn-Ni bonding material is used as a bonding material for bonding the mount pad 33 to a mount part 35 in FIG. 8A, as the bump 36 in FIG. 8B, and as the beam lead 37 in FIG. 8C.
An example of mounting the driving IC 30 on an EL display panel by using the structure illustrated in FIG. 8A will now be described.
To make the EL display panel, a film of ITO (indium tin oxide), which is not shown, was formed to a thickness of 0.lem as the transparent electrode on the glass substrate 31 and processed to have a striped configuration. In a region where an EL device (not shown) is disposed, the EL device was formed on the glass substrate 31 as follows: a CaS:Eu layer was formed to a thickness of 1pm as a luminescent layer by means of electron beam evaporation; a SiO2 layer of 0.3pm in thickness was formed as an insulating layer by means of RF plasma enhanced CVD; and an Al layer was formed to a thickness of 0.15pom and patterned to the specified pattern as a back electrode 32.Then, in a region where the driving IC 30 is located on the glass substrate 31, Ni film was formed to a thickness of 0.1mum, and then an Au layer was formed to a thickness of 0.5pom, and these films were patterned to the specified patterns to thereby provide the mount pad 35 and the wire-bonding pad of the electrode 32. The films for the mount pad 35 and the wire-bonding pad were formed by means of sputtering. Then, another glass substrate was located over the EL device forming region of the substrate 31 to interpose the EL device therebetween and bonded with epoxy resin, and silicon oil was sealed therein to form a protecting layer for the EL device, so that the fabrication of the EL display panel was completed.
Next, a Ni layer was formed to a thickness of 0.2pom on the back surface of the driving IC 30 to bond the driving IC 30 to the glass substrate 31, and then an Au80wt%-Sn20wt% layer was formed to a thickness of 2pm thereon. Both the layers were formed by means of sputtering. The driving IC 30 was bonded to the mount pad 35 at a heating temperature of 350"C and a pressure of 80g. On the other hand, the pad for leading the EL panel wiring 32 was connected to the pad for leading the driving IC 30 with Au wires 34. In this way, the driving IC 30 was mounted on the glass substrate 31 with a constant bonding strength. The composition ratio of the bonding material 33 at the mounting was Au7 6wt%-Sn1 9wt%-Ni5wt%.
(Eighth Example) FIG. 9 illustrates the application where semiconductor laser device 40 of a GaAs/AlGaAs system was bonded to a Si substrate 42 provided with a SiNx optical guide by using bumps 44. For the bumps 44, an -.78wt%-Snl9.5wt%-Ni2.5wt% bonding material was nosed, and the semiconductor laser device 40 was mounted on the Si substrate 42 by using four bumps each diameter of which is +40pom. The bumps 44 were formed on the Au pad 43 on the Si substrate 42.
For the back surface electrode 41 of the semiconductor laser device 40, Au-Ge/Ni/Au layers were used with a thickness of 0.1pm, 0.02pom and 0.4 m, respectively. The semiconductor laser device 40 was laid on the bumps 44, and the entire substrate 42 was loaded within a thermostatic bath to cause the bumps 44 reflowing, thereby soldering the device 40 to substrate 42. In this way, the semiconductor laser device 40 was mounted on the Si substrate 42.
While the present invention has been shown and described with reference to the foregoing preferred embodiments, it will be apparent to those skilled in the art that changes in form and detail may be made therein without departing from the scope of the invention as defined in the appended claims.

Claims (18)

1, A mounting method of mounting an electric element, comprising the steps of: forming an electrode layer on an electric element; forming a Ni layer on said electrode layer; forming a solder layer containing Sn directly on said Ni layer; and heating said electric element so astro cause said solder layer and said Ni layer to mutually diffuse as well as to cause said electrode to ohmically contact said electric element, thereby bonding said electric element to a pedestal.
2. A mounting method of mounting an electric element according to claim 1, wherein said step of forming said Ni layer includes forming said Ni layer to a thickness of 500A or more.
3. A mounting method of mounting an electric element according to claim 1 or 2, wherein said step of forming said solder layer includes forming an Au-Sn alloy layer.
4. A mounting method of mounting an electric element according to claim 3, wherein said step of forming said Au-Sn alloy layer includes forming said Au-Sn alloy layer by means of physical vapor growth.
5. A mounting method of mounting an electric element according to claim 3 or claim 4, wherein said step of forming said Au-Sn alloy layer includes forming said Au-Sn alloy layer to a thickness of 0.3um to 3pm.
6. A mounting method of mounting an electric element according to claim 3, 4 or 5, wherein said step of forming said Au-Sn alloy layer includes the step of forming an eutectic Au-Sn alloy layer.
7. A mounting method of mounting an electric element according to claim 6, wherein said step of forming said Ni layer includes forming said Ni layer to a thickness of 70nm to 120nm, and said step of forming said eutectic Au-Sn alloy layer includes the step of forming said eutectic Au-Sn alloy layer to a thickness of approximately 1.5cm.
8. A mounting method of mounting an electric element according to any preceding claim, wherein said electric element is composed of compound semiconductor substance, and said step of forming said electrode layer includes forming an Au containing film on said electric element.
9. A method of bonding an electric element to a pedestal, comprising the steps of: forming a Ni layer and a solder layer containing Sn successively on a mounting surface of an electric element; and bonding said electric element to a pedestal by heating and melting said solder layer to mutually diffuse Ni in said Ni layer and Sn in said solder layer.
10. A method of bonding an electric element to a pedestal according to claim 9, wherein said step of bonding said electric element includes the step of heating said solder layer to form an alloy layer containing Ni and Sn, the step of disposing said electric element on said pedestal interposing said alloy layer therebetween, the step of heating said electric element to a temperature higher than the melting point of said alloy layer, and the step of cooling said electric element to bond said electric element to said pedestal.
11. A method of bonding an electric element according to claim 9 or 10, wherein said Ni layer is formed to a film thickness of 500A or more.
12. A method of bonding an electric element according to any of claims 9, 10 or 11, wherein said solder layer is formed by means of physical vapor growth using an alloy as an evaporation source.
13. A method of bonding an electric element according to any of claims 9 to 12, wherein said solder layer is formed to a film thickness of 0.3um to 3pm.
14. A method of bonding an electric element according to any of claims 9 to 13, wherein said solder layer is composed of an Au-Sn alloy with Au as the main component and said step of bonding said electric element includes the step of forming an Au Sn-Ni alloy containing Ni at l.3wt% to lOwt% by heating and melting said solder layer.
i5. A method of bonding an electric element according to any of claims 9 to 14, wherein the surface of said pedestal to which said electric element is to be bonded is composed of a material selected from the group consisting of Au, Ni, Fe and Cu.
16. A method of bonding an electric element according to any of claims 9 to 15, wherein said electric element is a semiconductor laser device.
17. A mounting method substantially as described herein with reference to the accompanying drawings.
18. A bonding method substantially as described herein with reference to the accompanying drawings.
GB9610304A 1994-08-01 1995-07-31 Bonding method for electric element Expired - Lifetime GB2300375B (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP17993594 1994-08-01
JP26471994 1994-10-28
JP14017595A JP3271475B2 (en) 1994-08-01 1995-06-07 Electrical element joining material and joining method
GB9515696A GB2291886B (en) 1994-08-01 1995-07-31 Bonding material for electric element.

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GB9610304D0 GB9610304D0 (en) 1996-07-24
GB2300375A true GB2300375A (en) 1996-11-06
GB2300375B GB2300375B (en) 1998-02-25

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Cited By (8)

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EP1039596A2 (en) * 1999-03-19 2000-09-27 Fuji Photo Film Co., Ltd. Semiconductor light emitting device and method for manufacturing the same
EP1575089A1 (en) * 2004-03-09 2005-09-14 Infineon Technologies AG Highly reliable, cost effective and thermally enhanced AuSn die-attach technology
EP1655099A2 (en) * 2004-11-05 2006-05-10 General Electric Company Method for repairing a hole in a metallic workpiece
WO2009133105A1 (en) * 2008-04-28 2009-11-05 Siemens Aktiengesellschaft Method for producing a hermetically sealed, electrical feedthrough using exothermic nanofilm
EP2372755A1 (en) * 2010-03-31 2011-10-05 EV Group E. Thallner GmbH Method for permanently connecting two metal surfaces
WO2018158341A1 (en) * 2017-03-01 2018-09-07 Osram Opto Semiconductors Gmbh Method for fastening a semiconductor chip on a lead frame, and electronic component
US20220037852A1 (en) * 2018-09-13 2022-02-03 Suzhou Lekin Semiconductor Co., Ltd. Surface emitting laser device and surface emitting laser apparatus having the same
US12003075B2 (en) * 2018-09-13 2024-06-04 Suzhou Lekin Semiconductor Co., Ltd. Surface emitting laser device and surface emitting laser apparatus having the same

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1297467A (en) * 1970-07-02 1972-11-22
GB1548755A (en) * 1975-04-05 1979-07-18 Semikron Gleichrichterbau Semicondutor device
GB2049522A (en) * 1979-04-04 1980-12-31 Elliott Brothers London Ltd Process for bonding germanium to metal

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1297467A (en) * 1970-07-02 1972-11-22
GB1548755A (en) * 1975-04-05 1979-07-18 Semikron Gleichrichterbau Semicondutor device
GB2049522A (en) * 1979-04-04 1980-12-31 Elliott Brothers London Ltd Process for bonding germanium to metal

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EP1039596A3 (en) * 1999-03-19 2004-02-18 Fuji Photo Film Co., Ltd. Semiconductor light emitting device and method for manufacturing the same
EP1039596A2 (en) * 1999-03-19 2000-09-27 Fuji Photo Film Co., Ltd. Semiconductor light emitting device and method for manufacturing the same
EP1575089A1 (en) * 2004-03-09 2005-09-14 Infineon Technologies AG Highly reliable, cost effective and thermally enhanced AuSn die-attach technology
US7608485B2 (en) 2004-03-09 2009-10-27 Infineon Technologies Ag Highly reliable, cost effective and thermally enhanced AuSn die-attach technology
EP1655099A2 (en) * 2004-11-05 2006-05-10 General Electric Company Method for repairing a hole in a metallic workpiece
EP1655099A3 (en) * 2004-11-05 2007-03-21 General Electric Company Method for repairing a hole in a metallic workpiece
US8227297B2 (en) 2008-04-28 2012-07-24 Siemens Aktiengesellschaft Method for producing a hermetically sealed, electrical feedthrough using exothermic nanofilm
WO2009133105A1 (en) * 2008-04-28 2009-11-05 Siemens Aktiengesellschaft Method for producing a hermetically sealed, electrical feedthrough using exothermic nanofilm
EP2597670A3 (en) * 2010-03-31 2013-09-11 EV Group E. Thallner GmbH Method for permanently connecting two metal surfaces
US9478518B2 (en) 2010-03-31 2016-10-25 Ev Group E. Thallner Gmbh Method for permanent connection of two metal surfaces
EP2372755A1 (en) * 2010-03-31 2011-10-05 EV Group E. Thallner GmbH Method for permanently connecting two metal surfaces
EP2597671A3 (en) * 2010-03-31 2013-09-25 EV Group E. Thallner GmbH Method for permanently connecting two metal surfaces
KR101388715B1 (en) 2010-03-31 2014-04-25 에베 그룹 에. 탈너 게엠베하 Method for permanently connecting two metal surfaces
EP2654075A3 (en) * 2010-03-31 2014-08-20 EV Group E. Thallner GmbH Method for permanently connecting two metal surfaces
EP2654074A3 (en) * 2010-03-31 2014-08-27 EV Group E. Thallner GmbH Method for permanently connecting two metal surfaces
WO2011120611A1 (en) * 2010-03-31 2011-10-06 Ev Group E. Thallner Gmbh Method for permanently connecting two metal surfaces
US11282801B2 (en) 2010-03-31 2022-03-22 Ev Group E. Thallner Gmbh Method for permanent connection of two metal surfaces
CN110352502A (en) * 2017-03-01 2019-10-18 欧司朗光电半导体有限公司 Method and electronic device for being fixed on semiconductor chip on lead frame
DE102017104276B4 (en) 2017-03-01 2020-01-16 Osram Opto Semiconductors Gmbh Method for fastening a semiconductor chip on a lead frame and electronic component
US11127602B2 (en) 2017-03-01 2021-09-21 Osram Oled Gmbh Method of fastening a semiconductor chip on a lead frame, and electronic component
WO2018158341A1 (en) * 2017-03-01 2018-09-07 Osram Opto Semiconductors Gmbh Method for fastening a semiconductor chip on a lead frame, and electronic component
US20220037852A1 (en) * 2018-09-13 2022-02-03 Suzhou Lekin Semiconductor Co., Ltd. Surface emitting laser device and surface emitting laser apparatus having the same
US12003075B2 (en) * 2018-09-13 2024-06-04 Suzhou Lekin Semiconductor Co., Ltd. Surface emitting laser device and surface emitting laser apparatus having the same

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GB9610304D0 (en) 1996-07-24

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