GB2299895A

GB2299895A - Semiconductor wafer polishing

Info

Publication number: GB2299895A
Application number: GB9611070A
Authority: GB
Inventors: Masako Kodera; Atsushi Shigeta; Hiromi Yajima; Hiroyuki Yano; Riichirou Aoki; Haruo Okano
Original assignee: Toshiba Corp
Current assignee: Toshiba Corp
Priority date: 1992-05-26
Filing date: 1993-05-26
Publication date: 1996-10-16
Anticipated expiration: 2013-05-26
Also published as: GB2298961A; GB9611090D0; GB2298960B; GB9611070D0; GB2298960A; GB2298961B; GB9611104D0; GB2299895B

Description

2299895 "POLISHING APPARATUS AND METHOD FOR PLANARIZING LAYER ON A

SEMICONDUCTOR WAFER" is This invention relates to a polishing apparatus and a method for planarizing a layer on a semiconductor wafer.

Conventionally, colloidal silica is popularly used as a polishing slurry for polishing and planarizing the surface of insulating films or the like in the process of manufacturing semiconductor devices.

There are used colloidal silica granules of a diameter as large as tens of several nanometers. The granules are normally obtained by growing sodium silicate in water. Obtained granulous silica is then mixed with water to form a suspension or colloidal silica, to which KOH or NaOH is added to regulate the hydrogen -ion concentration of the susmension and at the same time achieve an enhanced polishing efficiency for the slurry.

Compol-OC marketed by Fujimi Corporation is one of commercially available polishing slurries of the above described type containing an alkali metal. When a sili con oxide film is polished or scraped by using the slurry, the allkali metal contained in the slurry is at least partly dispersed into the silicon oxide fim or the semiconductor device. When the device is a mOS device, the dispersed metal fluctuates the thresncid voltage level of the device.to significantly reduce --.-e I.N BAD ORIGINAL.0 2 - is reliability of the semiconductor device.

In order to avoid this problem, some preventive measures need to be taken such as additionally forming a protective film layer under the silicon oxide film to block dispersion of alkali metal, making the overall process of manufacturing semiconductor devices rather cumbersome and complicated.

Now, how a prior art semiconductor device is produced will be briefly described by referring to illus- trations showing its sectional views in various stages of preparation. Fig. 1A of the accompanying drawings illustrates a conventional semiconductor device comprising a semiconductor substrate 1 and electrode or wire patterns designated by reference numeral 2. To protect the patterns, a protective film 3 is firstly formed on the entire surface area of the semiconductor structure, and subsequently a resist 4 is applied onto the film 3 and then the resist 4 is subjected to a patterning operation by using a lithographic technique, as illustrated in Fig. 1B. Thereafter, the protective fiim 3 is selectively removed as the resist 4 is used as masks. Thereafter, the resist 4 is removed to produce a patterned protective film as shown in Fig. 1C. Thereafter as illustrated in Fig.!D, a silicon oxide film 5 is formed on the semiconductor structure, and then its su face is planarized using a polishing method to produce a planar surface, as shown in Fig. 1E. However, tre BAu kihi.2tilqAL 0 OP.9 is above conventional method additionally requires the steps of Figs. 1A through 1C, thus complicating the entire manufacturing process.

There is also used another polishing slurry of the colloidal silica series containing no alkali metal. The slurry is obtained by performing pyrolysis of silicic acid tetrachloride or hydrolysis of organic silane to grow silica particles, and regulating the hydrogen ion concentration of the produced silica by means of ammonia or an amine. This type of polishing slurry is, however, accompanied by a problem of an unpractically low polishing speed if used for silicon oxide films.

on the other hand, a well known method of polishing the surface of glass photo-masks comprises steps of primary polishing using a suspension of aluminum oxide and finish polishing using another suspension containing cerium oxide particles having an average particle size of several micrometers. However, such a two-step polishing operation involved in the process of manufacturing semiconductor devices is not recommendable by any means, considering the fact that an insulating film needs to be polished to reduce its thickness by -he process only several micrometers. Furt.1lermore, in t of manufacturing semiconductor devices, an -insulatIng film layer is often formed on the surface of a semiconductor substrate that carries raised portions 13g) OPIGINAL 4 - is (conductive layers) having a height of several hundreds to thousands nanometers. Such differences in height of the surface of a semiconductor device will be clearly reflected onto the profile of the insulating film formed thereon. The step configuration of the surface of the insulating film need to be planarized by polishing. However, it has not at all been known for sure if cerium oxide particles having an average size of several micrometers can successfully polish and planarize the surface that has a configuration of different.heights of several hundreds to thousands nanometers and if the insulating film will be contaminated by the alkali metal as in the case where colloidal silica is used. All in all, the above described method of polishing the surface of a glass layer operating as a photo-mask has been developed without taking into consideration if it can be applied to the operation of polishing semiconductor devices during the manufacturing process.

The above conventional methods of polishing semiconductor devices, using colloidal silica or the like as a polishing slurry, are accompanied by the problem of contamination by alkali metal and that of a slow polishing rate.

while a method of using a suspension that does not contain cerium oxide Particles is a'-so known in t!-ie technology of polishing tre surface of glass photo-masks, it is not certain at all if such a metlt-od BAD ORIGINAL 4000 1 1 - 5 can polish and planarize a surface having a profile of steps of several hundreds to thousands nanometers high and if it is not accompanied by a problem of metal contamination. Again, it is a method that has been developed without taking into consideration if it can be applied to the operation of polishing semiconductor devices during the manufacturing process.

Now, a typical known polishing and planarizing technique of the category under consideration will be described by referring to Figs. 2A through 2C of the accompanying drawings. As illustrated in Fig. 2A, a semiconductor device is prepared by forming an Si02 film 12 on an Si semiconductor device I and then a metal wires 13 having a thickness of 1.1 wm are appropriately formed on the Si02 film 12 to produce a given pattern off metal wires.

T film 14 is formed on tne hereafter, another Si02 he above intermediate product.

entire surface of 1 Consequently, the surface of the second Si02 layer shows raised portions and recessed portions, reflecting the pattern of metal wires. Then, the surface of the second Si02 layer 14 is polished to remove the raised and recessed portions. The operation of polishing or scraping the surface of the second Si02 layer 14 will be carried out by using a polishi.-g apparatus as illustrated in Fig. 3.

more specifically, an Si substrate I havi 9 BAD ORIGiNAL 6 - a configuration as described above is set in position on the turntable the apparatus under a holder 501. A polishing slurry feed pipe 503 is disposed above the turntable 502 to feed a polishing slurry onto the truntable during the operation of polishing the substrate. A polishing cloth 504 is disposed between the surface to be polished of the Si substrate 1 and the turntable 502 so that the raised and recessed portions on the surface of the semiconductor substrate are removed by particles of the polishing slurry and the polishing cloth 504 to provide a planarized surface of the semiconductor substrate.

The holder 501 is subjected to a load of 40 kfg and rotated at a rate of 100 rpm. 7te turntable is rotated at the same rotation speed.

while the above described polishing method using a polishing apparatus can significantly reduce the raised portions on the surface of the second SiC2 fi-',.-n 14, it also dishes the portions of the second 3102 film - ween adjacent metal wires 1.3.

14 that are located bet This is a phenomenon nor,7ally referred to as "dishing".

Fig. 4 is a graph showing the result of an analysis of the "dishing" phenomenon observed in a case where each of the metal wires 13 is 500 jm wide and separated from any adjacent wires by!,000 m. in tne graph of Fig. 4, the abscissa represents the polishing time BAD C)fileiiimAL 4M407) 7 is expressed in seconds, and the coordinate represents the distance between the surface of the first S102 film 12 and the that of the second Si02 film 14.

Before starting the polishing operation, the dis tance (solid line in Fig. 4) between the areas (raised portions) of the surface of the Si02 film 12 carrying a metal wire 13 and the surface of the Si02 film 14 and the distance (broken line in Fig. 4) between the areas (recessed portions) of the surface of the Si02 12 film carrying no metal wire and the surface of the Si02 film 14 show a difference of 1.1 wm which is equal to the height of the metal wires 43.

As the polishing operation proceeds, the difference between the distance separating the surface of the S102 film 12 and that of the Si02 film 14 at the raised portions and the corresponding distance at the recessed portions is reduced because the speed at which the Si02 film 14 is polished off for the raised portions is greater than the speed at which it is polished off for the recessed portions. The reason for the difference in speed is that the S102 film 14 is subjected to a greater load at the raised portions.

However, the rate at which the difference between the distance separating the surface of the Si02 12 and that of --.-e SiC'.) -4 at the raised oortion and the corresponding distance at the recessed portions is -he polishing reduced is actually very low. If 11 2 S 13AD COGINAL 8 operation is conducted for 70 seconds and the S102 film 14 is polished off by approximately 1.0 wm at the raised portions, the thickness of the Si02 film 14 will be reduced by approximately 0.65 wm by polishing so that consequently there will remain a difference of approximately 0.35 wm between the distance separating the surface of the Si02 film 1.2 and that of the Si02 film 14 at the raised portions and the corresponding distance at the recessed portions.

The surface of the S102 film 14 can be almost completely and satisfactorily planarized by forming a rather thick Si02 film and polishing the film to a large extent.

Such a method of forming a thick film and polishing off the film is, however, very time consuming and hence 7acturing cost. Moreover, the more increases the manul. the film is polished, the greater becomes the fluctuations in the polishing speed on the film, a phenomenon by no means favorable for the polishing operation.

The above described dishing phenomenon for t,e or recessed portions can be prevented by forming, 11 instance, a silicon nitride film as a "polish stopper" for the recessed portions in order to suppress the rate of polishing the S102 film 14 at tte recessed portions and increase the rate at whicn tne difference in.fte thickness of the 3102 film 14 at the raised and recessed BAD J0 L__ portions is reduced.

This technique is schematically illustrated in Figs. 5A through 50, which show a semiconductor structure in cross section. Referring firstly to Fig. 5A, an Si02 film 12 is formed on an Si substrate and (1.1 wm thick) metal wires 13 are formed thereon in a manner as described before.

Thereafter, another Si02 film 14 is formed on the entire surface of the intermediate product as shown in Fig. 5B.

Then, a silicon nitride film 15 is formed on the Si02 film 14 and subsequently is subjected to a patterning operation, in which, as shown in Fig. 5C, the silicon nitride film 15 is removed except at the recessed portions where no metal wires are formed under the Si02 film 14.

Finally, the surface of the Si02 film 14 IS polished by using a polishing apparatus as illustrated in Fig. 3 in a manner same as the one described above.

With this technique, the hight difference significantly disappears from the surface of the Si02 film 14 as shown in Fig. 5D, and the dishing of the Si02 film 14 is also reduced. However, the Si02 film 14 shows slight upward bulges in areas of the metal wires 13 to provide small increased and recessed portions that are reversals of those of the Si02 fIlM 14 before the Si02 film 14 JS polished.

The result of an analysis looking into this phenomenon is summarized in Fig. 6. The object of the analysis is a device comprising metal wires 13 have a width of 500 wm and arranged with a distance of 1,ooo wm separating adjacent wires. The abscissa of the graph of Fig. 6 represents the polishing time (seconds) in the processing step of Fig. 5D, while the coordinate repre sents the distance between the surface of the first Si02 film 12 and the that of the second Si02 film 14.

Before the start of the operation of polishing the device, the distance (solid line in Fig. 6) between the areas (raised portions) of the surface of the Si02 f-4- rn 12 carrying a metal wire 13 and the surface of the Si02 film 14 and the distance (broken 'line in Fig. 6) between the areas (recessed portions) of the surface of the S102 12 film carrying no metal wire and the surface of the S102 film 14 show a difference of 1.1 Wm which is equal to the height of the metal wires 13.

AS the polishing operation proceeds, the difference between the distance separating the surface of the S102 film 12 and that of the Si(D2 film 14 at the raised portions and the corresponding distance at the recessed portions is reduced because the speed at which the -5102 film 14 is polished off- -Icr the raised portions is greater than the speed at which it is polished off fc).the recessed portions. The-reason for the difference in BAD L_ -4 is 11 speed is that the Si02 film 14 is subjected to a greater load at the raised portions. Additionally with this technique, the speed at which the Si02 film 14 is polished is very low at the recessed portions when compared with the speed at which it is polished at the raised portions because of the silicon nitride films 15 formed an the recessed portions and consequently the difference between the distance separating the surface of the Si02 film 12 and that of the Si02 film 14 at the raised por- tions and the corresponding distance at the recessed portions is further reduced because the higher speed at which the Si02 film 14 is polished off for the raised portions.

Approximately 70 seconds after the start of the polishing operation, the difference between the distance separating the surface of the Si02 film 12 and that of the Si02 film 14 at the raised portions and the corresponding distance at the recessed, portions is reduced to almost nil to make the surface of the Si02 film 14 flat. However, since the polishing operation is continued after the surface of the 5i02 film 14 has become flat, the areas of the surface of the Si02 film 1.4 not covered by a silicon nitride film 15, or the original raised portions, are further polished to make the film even thinner.

Thus, the difference between the distance separating the su.-fa--e of t.,. e S102 fil.m 12 Ind that of BAD Ohiuil.4-- W, - 1 2 - the SiC)2 film 14 at the raised portions becomes smaller than the corresponding distance at the recessed portions to provide small raised and recessed portions that are reversals of those of the Si02 film 14 before the Si02 filM 14 is polished.

Such reversals of raised and recessed portions on the surface of the Si02 film 14 can be prevented from occurring by optim-,zing the thickness of the silicon nitride film 15 in such a manner that it may disappear when the surface of the Si02 film 14 is made completely flat. However, such a method of optimization of the silicon nitride film thickness will not be feasible for industrial applications, because of the narrow range of the optimum thickness. Furthermore, the formation of a is stopper film, a silicon nitride film in particular, and the operation of patterning the film which are indispensable for the technique under consideration are:7ather complicated and involve a high additional cost.

Therefore, the known technique of using an insulating film as an aid to the operation of pol.s.Iiing and planarizing the surface of a semiconductor device is also accompanied by the phenomenon of "d-Jshing" that appears on the recessed portions to make the operation quite unsatisfactory.

There has bee- 2rcposed a technique to suppress the occurrence of "disr. ing" by selectively forming a stopper film, a silicon n-zride film in particular, only on the 1 1 BAD ORIGINAL J0 1.3 recessed portions.

With this technique, however, "dishing', appears on the raised portions that carry no stopper film immediately after the insulating film is planarized so that again it is practically impossible to achieve a satisfactorily planar surface for the semiconductor device.

Figs. 7A and 7B of the accompanying drawings illustrate the process of polishing and planarizing the surface of a semiconductor device by using still another known technique.

Fig. 7A shows a conventional semiconductor device comprising a semiconductor substrate 1 and a finely designed patterns 32 of various elements including muitilayered wires, semiconductor polycrystall.,ne -rodes realized in the form layers, capacitors and elect of a combination of fine proections selectively formed on the substrate 1. The patterns 32 are separated fr-, m one another by spaces, or recessed areas 33, 34, Cf which each of the recesses 33 represents a space separating two adjacent elements that are located close to each other whereas each of t-e recesses 34 separates --wo adjacent elements with a large distance. The serniconductor device further ccmprlses an insulati-.g fil.-i 35 formed to cover the pattern 32 and a resist layer 36 formed on the insulating film 35 by apply-4ng a resist material. Thus, the resist.layer 36 has a varying BAD ORIGINAL L__ A0 1 14 - thickness which is greater on the relatively wide recesses 34 than on the narrower recesses 33. Subsequently, this resist 36 is etched back to expose the insulating film 35 by, -for instance, reactive ion etching (RIE) as illustrated.1n. Fig. 7B, where 36a denotes those areas of the insulating film 35 located on the recesses 33 whereas 36b denotes the areas found on the recesses 34. As seen from Fig. 7B, the surface of the insulating film 35 is undulated because, as the etch back operation proceeds on the resist 36, the insulating film 35 comes to be quickly exposed and etched at locations above the recesses 33 where the resist 36 is reiatively thin.

Figs. 8A and 8B of the accompanying drawings illustrate the process of polishing and planarizing the surface of a semiconductor device by using still another known technique. This process is normally carried out before a multilayer structure is produced in the device.

Referring to Fig. BA, the semiconductor device comprises a semiconductor substrate 1 and a polysilicon high melting point metal silicide layer 42 selectively formed as capacitors or electrodes on the semiconductor substrate 1 to provide a number of elements of the layer. Spaces deff-ned ty ad]acent elements of the polysilicon high melt.,ng point metal silicide layer 42 provides so many recesses, of which those having 1 BAD 0HIUIN^L 1J10 -VA r.

- Is - a relatively small width are denoted by reference numeral 43, whereas reference numeral 44 denotes those recesses having a relatively layer width. The semiconductor device further comprises an insulating film 45 formed to cover the entire surface of the device, said insulating film 45 being typically made of boron phosphorous silicon glass (BPSG). When the BPSC film is caused to reflow by using a phosphor dispersion melt technique as illustrated in Fig. 8B, the BPSG film 45 comes to show a remarkably undulated surface which is higher at locations above the wider recesses 42 separating elements of the polysilicon high melting point metal silicide layer 42 than at locations above the narrower recessed 43 that also separates elements of the layer 42.

As may be understood from the above description, known techniques for polishing and planarizing the surface of a semiconductor device are, in most cases, required to deal with surface layers having a number of projections formed typically by electrodes, capacitors and wires and also with surface layers having a number of recesses produced normally by trenches and contact holes. The surface of a semiconductor device having such an uneven surface layer is then planarized by forming an insulating film thereon and etching the film back or causing the film to reflow.

However, the cperation.of etch back or reflow BAD ORIUiiqr%L_ V L - 40 16 - cannot satisfactorily planarize the surface of an insulating film because the recesses on the surface of a semiconductor device of the type under consideration have widely different widths. That is, the undulated surface of such an insulating film cannot be completely planarized.

Obviously, the undulations remaining on the insulation film of a semiconductor device can have disadvantages on the following steps in the manufacturing process.

Assume, for example, that a wiring material is laid on the surface of a semiconductor device having remaining undulations thereon and then subjected to a patterning operation. Then, rays of light emitted on the layer of the material for the patterning operation may not be accurately focused on the layer and the produced wiring may exhibit a disturbed pattern. in view of the recen trend of producing highly -ntegr,ted devices requiring a precision level of submicrons and having a relat-vely large difference in the height between centrai and peripheral areas and a very narrowed space between any adjacent wires of the chip, such undulations on the surface can adversely affect not only the make of the Qatterned wiring but also the electric characteristics of the device.

Additionally, whie '=e technique of RIEE is pcpu- -he etcting back operation, it can give larly used for +1 1 BAD ORIGINAL JO rise to a loading effect which is specific to anisotropic etching and attributable to the difference in the size of the openings and the pattern to space ratio of the device so that the rate and shape of etching may be adversely affected by that effect to degrade the controllability of the technique.

Thus, there have been observed problems of broken wires and sort circuits on semiconductor devices of the type under consideration that can significantly reduce the yield of manufacturing devices and reduces the reliability of produced devices.

Figs. 9A through 9C of the accompanying drawings illustrate in cross section a known semiconductor device in three different steps of polishing and planarizing the insulating film.

Referring firstly to Fig. 9A, an Si02 film 52 is formed in an Si semiconductor substrate I and thereafter a lower wiring layer 53 is formed on the SiC2 film 52.

Then, as shown in Fig. 9B, another Si02 film 54 is formed by deposition to cover the entire surface of the semiconductor substrate I including the areas occupied by the lower wiring layer 53. Thereafter, the Si02 film 54 is partly removed by polishing as shown in Fig. 9C.

T on is carried out to remove Lhe polishing operatthe undulations on the surface of the Si02 fi-M 54 as BAD ORIGNAL is - shown in Fig. 9B and make the surface flat.

However, as Fig. 9C suggests, while it is relatively easy to partly flatten the surface of the Si02 film 54, the entire surface of the film 54 cannot be made completely planar without difficulty because the extent to which the Si02 film 54 is polished off varies depending on the position on the Si substrate 1. it is also not an easy task to control the extent of polishing the film 54.

A conceivable method of controlling the extent of polishing the Si02 film 54 is to form an additional layer of silicon nitride film and use the layer as a stopper. Figs. 10A through 10D of the accompanying drawings illustrate how this method is put to actual use.

Referring firstly to Fig. 10A, an Si(D2 film 62 is formed in an Si semiconductor substrate I and thereafter a lower wiring layer 63 is formed on tfte Si02 film 62.

Then, as shown in Fig. 10B, a silicon nitride film 64 is formed as a stopper layer on the lower wiring layer 63 by deposition and subsequently another Si(D2 film 65 is formed on the silicon nitride film 64 also cy deposition as shown in Fig. 10C. Thereafter, the S102 film 65 is partly removed by polishing as shown in Fig. 10D.

However, as Fig. in suggests, the effect of te BAD ORIGINAL 03 polishing operation varies depending on the position on the surface of the Si substrate 51. while there are areas where the silicon nitride film 64 operate effectively as a stopper layer against the polishing operation, it is totally removed and the lower wiring layer 63 is polished to a certain extent in some other areas on the Si substrate 1.

Figs. 11A through 11C and Figs. 12A through 12E of the accompanying drawings respectively illustrates two different known processes for preparing a thin film semiconductor device, where a silicon substrate is thinned by polishing.

Referring firstly to Fig. 11A, an Si02 film 72 is formed in an Si substrate 71.

Then, as shown in Fig. 11B, another Si substrate 73 is applied to the Si substrate 71 with the Si02 film 72 interposed therebetween and subsequently the Si substrate 73 is thinned by polishing as illustrated in Fig. 11C.

Consequently, as Fig. 11C clearly shows, the thickness of the silicon thin film 73 varies greatly depending on the position of the Si substrate and is totally removed in some areas.

A conceivable method of controlling the extent of polishing the silicon ti-n f-J-1m 73 is to form an addi- tional layer Of S_' for instance, and use the 02 f'1m, layer as a stopper. Figs. 12A through 12E of the 1 1 BAD ORIGINAL J0 is accompanying drawings illustrate how this method is put to actual use.

Referring firstly to Fig. 12A, an Si02 film 82 is formed in an Si substrate 81.

Then, as shown in Fig. 12B, another Si substrate 83 is applied to the Si substrate 81 with the S102 film 82 interposed therebetween. Subsequently, openings are formed in the Si substrate 83 until the openings reach the surface of the 5i02 film 82 as illustrated in Fig. 12C. Thereafter, as shown in Fig. 12D, another S102 film 84 is selectively formed in those openings to a desired thickness by deposition and then the Si substrate 83 is partly removed by polishing.

Here again, the effect of the polishing operation varies depending on the position on the Si substrate. while the polishing operation proceeds as far as somewhere in the middle of the Si02 film 84 in some areas on the Si substrate, it is totally removed and along with the silicon thin film 83 in other areas.

-uring semiconductor Any known methods of manu'fact devices involving steps of polishing the devices are accompanied by the above identified problems, which can be summarized as follows.

One of the most significant problems is that, with any known methods, tie extent of pollshing the device can hardly be controlled. Here, control of the extent oil polishing the device means absolute control of the i BAD 0Htuitcri,- v, --- - A polishing rate and that of the evenness of the device surface. Any technology of manufacturing semiconductor devices will not and cannot be feasible for practical applications unless it is capable of controlling these two aspects. One known technique of controlling the extent of polishing is, as already described, to use a silicon nitride or Si02 film as a stopper layer.

However, the use of a silicon nitride or Si02 film as a stopper layer is not practical because they do not offer a sufficiently wide range of selectable ratios of the rate of polishing the proper object to that of polishing the stopper. Moreover, the range of selectable ratios of the rate of polishing the proper object to that of polishing the stopper varies greatly depending on the polishing slurry used in the polishing operation. For instance, the rate of polishing a SiC2 film will be very high if polishing slurry used for.Iie polishing operation contains sodiumhydroxide to a relatively large concentration. In other words, the material to be used for the stopper layer should be selected by considering the type of polishing slurry involved.

Thus, any conventional process of polishing semiconductor devices is accompanied by the problem of difficulty of controlling the extent of polishing the device and hence tardly feasible for practical applications.

It is also a common practice in any conventional 1 BAD ORIGINAL LI.

n - 22 process of polishing semiconductor devices that a test piece (specimen) of the product is polished to collect data for determining an optimum rate of polishing the device and then devices are polished at that determined optimum rate. However, the rate of polishing the device varies as a function of the time consumed for the polishing operation as typically illustrated in Fig. 13 and, therefore, the optimum polishing rate determined on the test piece does not necessarily reflect the actual polishing rate observed on the manufacturing line.

The manner in which the polishing rate changes with time is then greatly affected by the amount of polishing slurry held in the polishing cloth and the condition under which the polishing slurry is held in the polishing cloth. This influence of the amount of polishing slurry and the condition for the polishing of holding the slurry is so diverse that it is practically beyond control.

In an attempt to bring the rate of polishing the test piece closer to the actual rate of polishing devices on the manufacturing line, more than one and preferably a considerably large number of test pieces are used to determine an optimum polishing rate. Such a measure, however, en"lai.'.s an increase in the manufacturing cost due to a higher material cost for test pieces and a reduction in the operating hours of the manufacturing fac-J--J1-ies, making it even more BAD ORIGINAL J0 L 4 is impractical.

Another proposed technique for accurately controlling the extent of polishing the device comprises preliminarily polishing the device to a relatively small extent, measuring the extent to which the device has been actually polished and then repeating the above procedures until the device is polished to a desired extent. while this method does not involve any increase in the material cost for the test piece, it is time consuming and significantly reduce the operating hours of the manufacturing facilities. Furthermore, in view of the fact that a semiconductor device is polished by merely 1 wm in the manufacturing process, this method is by no means recommendable.

Thus, it should be stressed again that any known process of manufacturing semiconductor devices involving steps of polishing the devices is accompanied by the problem of difficulty of controlling the extent of polishing the device.

While there have been proposed techniques to overcome this problem including the one that uses test pieces to determine the rate of polishing the device and the one with which the device is polished in a plurality of steps and the extent to which the device has been polished is determined at each step, any of these techniques are not recommendable because they can not satisfactorily control the extent of polishing and involve BAD ORiGINAL is an increase in the manufacturing cost.

There is also known a method of polishing and planarizing semiconductor devices as disclosed in u.s. Patent No. 5,036,015 "Method of Endpoint Detection during Chemical/Mechanical Planarization of Semiconductor Wafers". According to this method, the turntable of a planarizing apparatus is driven to rotate by an electric motor and changes in the friction between the wafer held by a wafer holding device on the turntable and the polishing cloth for polishing the wafer are detected as changes in the electric current flowing through the electric motor.

For planarizing a silicon oxide film, a layer made of a material harder than the silicon oxide film is arranged under the silicon oxide film in advance and the planarizing operation is terminated when the polishing plane of the polishing cloth reaches the hard layer to -ely increase the friction of the plane after complet removing the silicon oxide film by polishing.

This known tecnnique is also not without problems as described below by referring to Figs. 14 through 16.

Fig. 14 schematically illustrates a polishing apparatus of the above described type, which detects changes in the frIction between the wafer 1 and the polishing cloth 504 held on the turntable 502 for polishing the wafer as changes.in the electric currents BAD L,---- 11 11 A-A is respectively flowing through the electric motors 511 and 512 and displayed on the corresponding ampere-meters 513 and 514.

Referring now to Fig. 15, each of the electric currents flowing through the respective electric motors 511 or 512 varies as a quadratic function of the voltage of the corresponding power supply 515 or 516 and the reading for the current is affected by changes in the voltage. As seen from Fig. 16, however, since no load current Io flows through each of the electric motors when no load is applied thereto, it is difficult to accu rately detect the level of friction taking place on the turntable.

Referring back to Fig. 14, the shafts 517 and 518 of the turntable and holding device of the polishing apparatus are connected to the respective shafts of the corresponding motors 511 and 512 by respective belts 519 and 520 in order to eliminate any adverse effects of pulsation of the motors to which the polishing plane of the polishing cloth may be subjected to. However, the belts 519 and 520 can slip around the respective shafts 511 and 512 while they are driven to run to change the loads of the motors 511 and 512 so that the ampere- r and 514 may not correctly reflect the level meters 513 of friction taking place on the turn table. meanwhile, according to another known method of polishing and planarizing a. semiconductor device, the BAD ORIGINAL.0 L_.

is rate of polishing the device is determined from the number of rotations of the turntable per unit period of time and the load applied the polishing apparatus by the object of polishing in order to establish an optimum polishing time on the basis of the determined polishing rate and the required extent of polishing.

In a polishing apparatus designed to practice this method, a polishing cloth is arranged on a turntable which is driven to rotate by a drive motor and a holding device for holding an object of polishing is disposed on the polishing cloth. The holding device is also driven to rotate by another drive motor.

Then, a semiconductor wafer to be polished by this apparatus is put on the holder opposite to the turntable. The wafer comprises a wiring layer arranged on a silicon substrate with a first insulating film disposed therebetween and a second insulating film disposed on the first insulating film. The holdqr device and the turn- -ate for predetermined respective table are driven to rot rotations per unit period of time by the respective drive motors and the polishing cloth which is rotating with the turntable is fed with a polishing slurry. Then, the holder device is moved down until the wafer comes to contact with the polishing cloth. Under this condition, a predetermined load is applied to the wafer and the holder device is moved horizontally along the surface of the turntab-e to.polish the wafer for BAD L-- 4.104 is a predetermined period of time to planarize the surface of the second insulating film of the wafer that carries undulations thereon.

After the operation of planarizing the wafer is over, it is replaced by a new one and the above described procedures are repeated for each untreated wafer. when the polishing apparatus has been used for a predetermined service time, the polishing cloth is redressed to recover its original condition by using a brush. After experiencing a number of cycles of polishing and redressing, the polishing cloth is replaced by a new one.

According to the above described known polishing method, the rate of polishing the wafer is calculated from given polishing conditions or the rotations per unit period of time of the wafer holder device, that of the turntable and the load applied to the wafer and an optimum polishing time is selected from the polishing rate and the required extent of polishing. In other words, the polishing rate is assumed to be constant unless either or both of the polishing rate and the load are altered. In reality, however, the polishing rate changes as the level of friction between the wafer and the polishing cloth varies as a function of the time consumed for polishing the wafer even if the rotations per unlt t1me and the load are not altered.

BAD Unj,.Aligo- L_ Fig. 17 of the accompanying drawings illustrate the relationship between the total service time of the polishing cloth and the polishing rate. The first So minutes in the total service time of the polishing cloth are defined as an initial stage, which moves into a working stage when the first 50 minutes have passed.

Fig. 17 shows that the polishing rate varies also with time in the working stage. This may be attributa- ble to the changes in the surface condition of the polishing cloth that take place as the cloth is choked by particles of the polishing slurry and the cloth is worn out and by turn reduce the efficiency of feeding particles of the polishing slurry to and discharging them from the surface of the polishing cloth and hence the efficiency of polishing the wafer. more specifically, the surface of the polishing cloth 504 has a huge number of tissues suspended therefrom and pores separating them as illustrated in Fig. 18 and particles of the polishing are retained in those pores. Then, as the polishing cloth is pressed against the wafer, the particles of the polishing slurry retained in the pores are discharged onto the wafer. The efficiency of this polishing slurry feeding and discharging mechanism is o reduced with time as the polishing cloth is worn out t vary the polishing rate with time. As the surface condition of the polishing cloth is further aggravated, -t BAD ORIGINAL A0 is - 29 can give rise to scars on the polished surface of tne wafer and degrade the planar condition of the polished surface.

A polishing cloth choked with particles of tIne polishing slurry can be redressed by means of a brush at an appropriate time. While the operation of redressing is an effective way of deterring the wear of the polishing cloth, the clztn -eq...,:-es replacement if its surface condition is not recovered by redressing as such a situ- ation suggests that the service life of the cloth is over.

with the above described known polishing method, the timing or redressing the polishing cloth is selected on the basis of the experience of the operator and that of replacing the polishing cloth is determined on the basis of the polishing rate calculated from the:7easured the extent of nolish-ing the wafer per jniz value of t period of time. ThIs -eans that in most cases -,e polishing cloth is not timely redressed nor replaced and consequently the rate of polishing the wafer is not <ept to a constant level n:r accurately c.-n--rolled.

in view of tne ci:cur-.stances, it is.lere-7.,re an object of the present invention to provide a process of polishing semiconduczcr devices that keeps -,'-e --e,j-,ze free from zy alka-i -,etals, -Ices not duce scars on tne s,_rfa=e z,. tne -,-.sulating cf: =e device, can ef,-;ective-,. planarize the surface zf::e BAD ORIGiNAL device having undulations that are several hundreds to thousand nanometers high and can be easily and appropri ately incorporated into a process of manufacturing semi conductor devices.

According to the present invention, the above object is achieved by providing a method of manufacturing semiconductor devices comprising steps of forming an insulating f-41m on a semiconductor substrate and polishing at 'Least partly the insulating film by using a polishing slurry containing cerium oxide to partly remove the insulating film. According to the present invention, there is also provided a method of manufacturing semiconductor devices comprising steps of forming an insulating film on the surface of a semicon ductor substrate carrying proections and recesses and polishing and planarizing the insulating film by using a polishing slurry containing cerium oxide.

with either of the above metods according to the invention, the insulating film can be polished at an enhanced rate as the insulating film which is a silicon oxide film or a silicon nitride film is polished by using a polishing slurry containing cerium oxide.

it has been proved that the inside of the insulat ing film is not contaminated by alkali metals when it is polished. Additionally, it nas also neen proved that an 4, 'm carrying ', ndulations 1--hat are several insulating fi- hundreds to thousands high on the surface can be 1 1 BAD ORIGINAL Con) 31 - is polished and at the same time planarized without producing scars on the surface of the film.

A polishing slurry that can be used in the step of polishing and planarizing the semiconductor device according to the present invention may contain elernen:s other than the principal ingredients, or impuritles, to a concentration of less than 100 ppm. Preferably, the principal ingredients are Si02 and H2 or Ce02 and H2 and the impurities are selected from Na, K, other alkali metals and compounds of these metals.

By using a highly pure polishing slurry containing impurities only to a very low concentration, semiconductor devices can remain uncontaminated by the impurities contained in the polishing slurry if the slurry is brought to contact the wafer during the polishing operation and remain an the surface of the wafer.

It is another object of the present invention to provide a process of manufacturing semiconductor devices comprising steps capable of completely planarLzing tne -he device.

surface layer of t According to the invention, the above object is achieved by providing a method of manufacturing semiczn ductor devices comprising steps of forming a stopper film on the entire surface of a film to be polished, "1-.e surface of the f-i-n:c --e -.,c-.,shed havi-g u,---lulaticns, the stopper '-aving a polishing rate -cwer than a polishing of rate said Ce polished, and 13AD ORIG1114AL iQ 32 - polishing the surface of the substrate carrying the stopper film formed thereon to planarize the film to be polished.

According to a series of research activities conducted by the inventors of tte present invention, ---e phenomenon of "dishing" can be avoided when a stopper film having a polisling rate lower than a pollshing of rate the film to be pollshed is formed on the entire area of the undulated surface of the film to be polished -he stopper film and the film to be polished are and 1. - subjected to polishing, and consequently the undulations of the film to be polished can be effectively removed to planarize the surface of the film. A possible explana tion for the effect of providing a stopper film for planarization will be as follows.

Since proecting areas on an undulated surtface are normally subjected to a load greater than the load applied to recessed areas of the surface, the former will be polished at a rate greater than the rate at which the latter are polished.

Therefore, in the initial stages of the polsning operation, the stopper will be polished mainly a::

areas that are located on the projections. However, tfte "he film to be polished are not reduc undulations of t -ed during these stages.

1,, - - ished ani eventu- As the stopper fi-7, -,s --fter polally removed at the areas on the project-icns, the f_,'m E3AD ORIGINAL L_ AP 3 3 is which is the object of polishing begins to be polished at the projections to reduce the undulations of its surface.

Now, as the undulations of the film to be polisned is further reduced, the stopper film will be polished at areas on the recesses until it is completely removed at a certain point of time. The film to he polished is considered to be completely planarized in this Instance. Thereafter, the film will be polished further, keeping its planar surface without allowing "dishing" to appear.

The research carried out by the inventors of the present invention has also proved that the advantage of the above described polishing technique does not depend on and is remarkable regardless of the thickness of the stopper film.

It is still another object of the present invention to provide a process of planarizing the surface of serni conductor devices at a nigh yield regardless of -..-e size of the undulations an the surface so that highly rella ble semiconductor devices may be produced.

According to the invention, the above object is achieved by providing a method of polishing semicondi-ctor devices comprising steps of forming a conductive film on a semiconductor substrates, producing recesses J' in the conductive f---mby selectively and partly 1 ing the conductive fi.,,n, forming an insulating film cn the conductive film to a height at least greater than the depth of the recesses and polishing the insulating film with a polishing slurry containing cerium cxi--Ie, using the conductive film as a stopper, to planar-,ze the surface of the conductive film and the insulating film.

According to the invent-,on, there is also provided a method of polishing semiconductor devices comprising steps of forming a wiring pattern on a semiconductor substrate, forming an insulating film on the semiconductor substrate and the wiring pattern, forming a conductive film on the insulating film, producing recesses in the insulating film and the conductive film to expose the wiring pattern by selectively removing the films, laying a wiring material on the conductive film having recesses to a height at least greater than --',,e depth of the recesses and polishing the wiring material with a polishing slurry containing cerium oxide, using the conductive film as a stopper, to planarize the surface of the insu.Lating fllm and the wir,. ng material.

is also provid According to the invention, t Jed a method of polishing semiconductor devices comprising steps of forming first insulating film on a semic-onduc- tor substrate, forming 3 wiring pattern on tne firs:

insulating film, forming an amorpnous silicon:o make a second insulating film on the wiring pattern and BAD OHiUI1ML - the first insulating film, forming a third insulating film on the amorphous silicon film to a height at least greater than that of the wiring pattern, polishing and removing the third insulating film with a polishing slurry containing cerium oxide to planarize the surface of the third insulating film and the amorphous silicon film and transforming the amorphous silicon film into a second insulating The conductive film to be used as a stopper is preferably made of a material selected from polysilicon, amorphous silicon, titanium nitride, a silicide film or carbon.

Since the above described methods do not use a technique of etch back or reflow for planarization, the recesses and projections of the semiconductor device can be planarized regardless of their height.

Additionally, the use of a polishing slurry containing cerium oxide allows the polishing operation to be satisfactorily conducted under an neutral condition.

So, no dissolution will occur if the lower wiring layer contains highly materials that can easily be corroded.

Still additionally, since no RIE is used for etc',, back, there will appear no 'cading effect on the etching rate and pattern due to:-e difference in tne size and pattern of the openings of the device specific to tne technique of anisotropic etching so that consequent-y 1 BAD ORUNAL _--- - -- AO 36 - -tie device will be the etching operation conducted on highly controllable.

Thus, with any of the above described methods, the surface of semiconductor devices can be planarized at a high yield regardless of the size of the undulations on the surface so that ?,-ghly reliable semiconductor devices may be produced.

it is st-i-11 anotner cb,,ect of the present invention to provide a method of manufacturing semiconductor devices that solves t,',ie above identified problems of the prior art and makes the control of the extent of polish ing the device easy I by using a stopper that effectively works regardless of the polishing slurry involved, allowing a wide range of selectable ratios of the rate of Polishing the proper object to be polished to that of polishing the stopper.

he present invention, the above According to -hod of object is achieved by providing 5--net manufacturing semiconductor devices incorporating a rate of process of polishing an layer formed on the subst :I the device and comprising a step of forming a carbon film as a stopper for tne polishing operation prior to the process of polishing -..te layer.

Since a carbon layer is polished at a very low rate, the use of a carcon layer provides a large r3tio of the rate of pclis.n.ing tne proper ob]ect to ce polished to that of polisn-,ng the stopper. When a carton 1 1 5 i BAD ORIGINAL L.

37 film is formed at least partly under, inside, on and/or adjacent to the target layer of the polishing operation as a stopper allowing a low polishing rate, the extent to which the target layer is polished can be controlled with greater ease. Additionally, since a carbon film is highly resistive to chemicals, it can be used regardless of the type of polishing slurry involved.

it is still another obect of the present invention to provide a method of manufacturing semiconductor devices that can easily and accurately control the extent to which the device is polished as well as a polishing apparatus that can be appropriately used with the method.

According to the invention, the above object is achieved by providing a method of manufacturing semiconductor devices incorporating a process of polishing an layer formed on the substrate of the device and compris-ion caused between the ing steps of measuring tne frict layer being polished and a turntable carrying a pol- ishing slurry during -ne polishing operation, determining the rate of polishing the layer from the measured friction, determining the extent of polishing of the -ayer by integrating the polishing rate with time and terminating the polishIng --peratlon upon coincidence of tte extent of pol-sting cf:'-e layer and a predetermined value.

According to the invention, the above ob]ect is BAD ORIGINAL also achieved by providing a polishing apparatus comprising means for measuring the friction caused between the layer being polished and a turntable carrying a polishing slurry during the polishing operation, determining the rate of polishing the layer from the measured friction and determining the extent of polishing of the layer by integrating tne polishing rate with time.

Upon examining the results of a series of research activities conducted by the inventors of the present invention that provide the basis of the invention, it was found that the friction between the layer being polished and the turntable carrying a polishing slurry and the rate of polishing the layer show a relationship of one-to-one correspondence.

By utilizing this relationship, it is now possi b I e to measure the friction caused between the layer being polished and a turntable carrying a polishing slurry during the polishing operation, determine the rate of polishing the layer frcm the measured friction, deter- mine the extent of polishing of the layer by integrating -ime and terminate the pollsning the polishing rate with 1. operation upon coincidence of the extent of polishing of the layer and a predetermined value. Therefore, i is possible to provide a method of easily and acc,,.i rately ccntrc_1_'_,g t:e extent t) whicft the tevIce Qolished.

It is still anctl,.er ob3ect of the present _=,,/en,::.on 4BAD ORIGINAL J0 A - 39 to provide an apparatus capable of accurately planarizing the surface of the wiring and the insulating layer of a semiconductor integrated circuit without requiring additional steps.

According to the invention, the above object is achieved by providing a polishing apparatus for chemi cally and mechanically polishing the wiring and the insulating layer of a semiconductor device to planarize the surface thereof, comprising a system of measuring the distortion of the shaft connected to the polishing turntable to determine the load due to friction caused at the turntable, converting the measured value into an electric signal to control the operation of the electric motor for driving the turntable.

It is still another object of the present invention to provide a polishing apparatus capable of accurately controlling the extent to which the target object is polished as well as a method of controlling the extent of polishing the object.

According to the invention, the above object is achieved by providing a polishing apparatus for polish ing semiconductor devices comprising a turntable pro vided with a polishing plane thereon, a holder device disposed opposite to the polishing plane for holding an facing target object with te s,,.rface to be polished 1.

the polishing plane, first 4r'j -st means for measuring a fir level of friction generated-between the polishing plane - 1 BAD ORIG'A j - -he holder device and the surface of said object when '. is rotated relative to the turntable under pressure to polish the object and a second level of friction generated between the polishing plane and the surface of the object after a predetermined period of time, an ariithmetic unit for calculating the ratio of the first level to the second level of friction and second means for determining the timing for redressing or replacing the polishing plane.

According to the invention the above object is also achieved by providing a method of polishing semiconduc tor devices comprising steps of providing a turntable equipped with a polishing plane disposed thereon and a holdex device disposed opposite to the polishing plane is and holding an target object with the surface to be pol ished facing the polishing plane, rotating the turn table and the holder device, feeding the polishing plane with a polishing slurry to polish the object under -ion while the polishing plane a first polishing ccndit. frictionally and slidingly moves on the surface of the object under pressure, measuring a first level of tion generated between the polishing plane and the surface of the object, measuring a second level of friction generated between the polishing plane and the surface of t ir he ob- -er a Predetermined period of time, -4eterect aft mining by calcuIaticn:-e ratio of the first level --o the second level of friction and determining by BAD ORIGINAL P0 L_ 41 - calculation a second polishing condition from the ratio to produce an extent of polishing the surface equal to the extent achieved under said first 'Level of friction.

With the above described method of the invention, a first level of friction is measured between the polishing plane and the surface of the object as the turntable and the holder device are rotated relative to each other under pressure and a polishing slurry is fed to the surface of the polishing plane so that the polishing plane frictionally slides on the surface of the object and then, after a predetermined period of time, a second level of friction is measured to determine the ratio,f the first level to the second level of friction. A -he polishing plane and change in the friction between 4. - the surface of the object can be detected from this ratio and the condition of the polishing plane can be ror appreciated from this change so ttiat the timing 4. redressing or replacing the polishing plane can be ccrrectly determined. when a target ob]ect is polished under a first polishing condition, a first level of friction is measured between the polishing plane and the surface of the object at a point of time and then a second level of friction is measured also between the pol-shing plane and the surface of te ob-,ect after a given period oftime since the point- of time to calculate the ratic of BAD ORIGINAL 000 42 the first level to the second level of friction, which ratio is then used to determine a second condition under which the rate of polishing the object is made equal to that of polishing the object under the first condition.

Thus, the rate of polishing the object can be kept con -he polishing condition from the first stant by shifting 1. to second condition if the state of the polishing plane has undergone changes.

-ill anotner object of the present invention It is st to provide a method capable of maintaining the surface condition of the polishing plane of a polishing apparatus for semiconductor devices to a desired constant level by effectively removing particles of the polishing slurry contained in the polishing plane to choke the polishing plane without relying on the experience of a skilled operator.

above object is According to the invention, t achieved by providing a method of using a surface active agent to redress a degraded condition of the pc!-,shing plane of a polishing apparatus choked with particles of a polishing slurry in ot-der to consistently maintaining the polishing plane to a desired state, the apparatus comprising the polishing pliane disposed on a turntable, a holder device for folding a target object to be pol shed with its surface facing z-.e polishing plane and means for feeding a slurry between the polishing plane and the surface of the target object, BAD ORIGINAL M30 4 is - 4.3 - the polishing plane being frictionally rotated relative to the surface of the target object under pressure to polish the surface.

This invention can be more fully understood from the following detailed description when taken in conjunction with the accompanying drawings, in which:

Figs. 1A to IE show cross section views of semiconductor structures at respective steps of a conventional manufacturing method; Figs. 2A to 2C show cross section views of semiconductor structures at respective steps of another conventional manufacturing method; Fig. 3 shows a perspective view of a conventional polishing apparatus; Fig. 4 shows characteristic curves between polishing time to distance, obtained by a conventional method described with reference to 2A to 2C; Figs. SA to 50 show cross section views of 7 r - semiconductor structures at respective steps of a ther conventional manufacturing method; Fig. 6 shows characteristic curves between pols.1ing time to distance, obtained by another conventional method described with reference to Fig. 5A to K); Figs. 7A to 7B show cross section views of semiconductor structures at respective steps of sti-L' another conventional manuffacturing method; Figs. 8A to 8B stow cr.-Ss section views of 0 semiconductor structures at respective steps of a still further conventional manufacturing method; Figs. 9A to 9C show cross section views of semiconductor structures at respective steps of a further conventional manufacturing method; Figs. IOA to 10D show cross section views of semiconductor structures at respective steps of a yet further conventional manufacturing method; Figs. 11A to 11C show cross section views of semiconductor structures at respective steps of a further conventional manufacturing method; Figs. 12A to 12E show cross section views of semiconductor structures at respective steps of a still conventional manufacturing method; Fig. 13 shows enlarged schematic sectional view of a polishing cloth; Fig. 14 shows a perspective view of a conventional polishing apparatus; Fig. 15 shows a characteristic curve between power supply voltage and current through motor, of the polishing apparatus of Fig. 14; Fig. 16 shows a characteristic curve between load and current through motor, of the polishing apparatus of Fig. 14; Fig. 17 shows a characteristic curve between ti7ne of using of polishing cloth and polishing rate; Fig. 18 shows characteristic curves between BAC) OBIGINAL JO 1 L_ - - 45 polishing time and polishing rate; Figs. 19A to 19F show cross section views of semiconductor structures at respective steps of a manufacturing method of an embodiment according to the present invention; Figs. 20A to 20C show cross section views of semiconductor structures at respective steps of a manufacturing method of another embodiment according to the present invention; Figs. 21A to 21E show cross section views of semiconductor structures at respective steps of a manufacturing method of a further embodiment according to the present invention; Figs. 22 to 27 each show characteristic curves between polishing time to distance, obtained by the manufacturing method described with reference to Figs. 21A to 21E; Fig. 28 shows a cross sectional view of a semicon- ductor structure obtained by a still further embodiment according to the present invention; Figs. 29A to 29C show cross section views of semiconductor structures at respective steps of a method of manufacturing the semiconductor structure as shown in Fig. 28; Figs. 30A to 30C show cross section views of semiconductor structures at respective steps of a manufacturing method of a yet further embodiment according to i BAD ONU104ML 46 the present invention; Figs. 31A to 31B show cross section views of semiconductor structures at respective steps of a manufacturing method of a further embodiment according to the present invention; Figs. 32A to 32C show cross section views of semiconductor structures at respective steps of a manufacturing method of a further embodiment according to the present invention; Figs. 33A to 33J show cross section views of semiconductor structures at respective steps of a manufacturing method of a still further embodiment according to the present invention; Figs. 34A to 341 show cross section views of semiconductor structures at respective steps of a manufacturing method of a yet further embodiment according to the present invention; Fig. 35 shows a perspective-view of a polishing apparatus of an embodiment according to the present invention; Fig. 36 shows characteristic curves between polishing time and polishing rate, and characteristic curves between polishing time and current through motor; Fig. 37 shows a characteristic curve between current through motor and pol.-,.shing -ate; Fig. 38 shows a cha.-acter-,st-iC curve between fr:.ction between to-be- pol-ished.layer and turntable, on one i i BAD ORIGINAL JO 47 hand, and polishing rate, on the other hand; Fig. 39 shows a characteristic curve between the number of rotation of turntable and holding device and polishing rate; Fig. 40 shows a perspective view of a polishing apparatus of an embodiment according to the present invention; Fig. 41 shows a characteristic curve between load and distortion; Figs. 42 and 43 show cross section views of semiconductor structures at a step of a manufacturing method; Fig. 44 shows a perspective view of a polishing apparatus of an embodiment according to the present invention; Fig. 45 shows a flow chart performed in the controller of the polishing apparatus as shown in Fig. 44; Fig. 46 shows characteristic curves between current through motor and polishing rate; Fig. 47 shows a characteristic curve between time of using of polishing cloth and polishing rate, and a characteristic curve between time of using of polishing cloth and polishing amount; Fig. 48 shows a characteristic curve between time of using of polishing clo:h and polishing rate, and a characteristic curve between time of using of polishing cloth and current through motor; 1 BAD ORIGINAL 48 - Fig.

apparatus invention; Fig.

apparatus invention; 49 shows a perspective view of a polishing of an embodiment according to the present shows a perspective view of a polishing of an embodiment according to the present and Fig. 51 shows a cnaracteristIc curve between time of using of polishing cloth and polishing rate.

Now, the present invention will be described in greater detail by way of examples and reference will be made to the accompanying drawings that illustrate some of the best modes of carrying out the invention.

Figs. 19A through 19F schematically illustrate a semiconductor device in cross section in a number of different steps of planarizing its insulating film interlayer in a mode of carrying out the invention.

As shown in Fig. 19A, an Si02 film 202 is formed to a thickness of I pm on an Si substrate 201 carrying certain elements (not shown) on the surface. Thereafter, a 500 pm thick polysilicon film 2C3 is formed on tne S.JC, film 202.

Then, as shown in Fig. 19B, a photoresist (photosensitive resin containing agent) is applied to the polysilicon film 203 to form a layer having a tnickness of 1.5;m and:-,e formed pnctores:.st layer is exposed to light with a mask pattern (not shown) arranged thereon. Then, a photoresist pattern 204 will be i BAD ORIGINAL Alp - 49 produced by developing the layer.

Subsequently, as shown in Fig. 19, the polysilicon film 203 is subjected to a patterning operation, using the photoresist pattern 204 as a mask and also using an RIE technique and CF4 gas.

Thereafter, as illustrated in Fig. 19D, the photoresist pattern 204 is removed and reduced to ash in a down flow type asher, where microwaves are discharged into a gaseous mixture of CF4 and 02 to which the photoresist is exposed. Then, as illustrated in Fig. 19E, an Si02 film 205 is formed on the entire surface of the processed substrate to a thickness of 1 pm to produce an insulating film interlayer. The Si02 fl.

Jlm 205 showed projections and recesses on the surface reflecting the pattern of the polysilicon wiring 203.

Subsequently, the Si02 film 205 is polished or scraped until it shows a cross section as illustrated in Fig. 19F. A polishing apparatus as shown in Fig. 3 is normally used for the polishing operation. This apparatus comprises a turntable 502, a polishing cloth 504 and a polishing slurry feeding pipe 503 whose front end is located at the center of the polishing cloth 504. As the turntable 502 is rotated counterclockwise around its axis as indicated by an arrow at a rate of 100 rpm, the polishing slurry -'s fed onto the polishing cloth 5C,4 from the front end of tte pipe 503. A wafer I is pressed against the polishing cloth 504 by a load of BAD ORIGINAL L_.

- so kgf while it is rotated with the turntable in the sense as indicated by the arrow also at a rate of 100 rpm. The polishing slurry is a suspension prepared by dispersing powder containing particulate cerium oxide into water, the particles having an average diameter of 1.2 pm and a maximum diameter of 4.0 pm and being obtained by crushing and sintering bastnaesite. The powder contains cerium oxide by about 5Cwt% and oxides of other rare earth metals by about 37wt%. Table 1 below lists the contents of the powder used in an example.

Particulate Ce02 Table 1 (ICP Mass/emission spectrochemical analysi Impurity 100,000_concentration Ce, La 10,000-100,00( 1,000-10,000 Pr Ca,P,S,Fe,Sr,Nd, Sm,Eu,Gd,Th Al,Si,Mn,Y,Nb,Tb, Dy,Pb Na,Li,Cr,Zr,Sb,U Ba,Co,Ni,Mo,W 3,Ru,Pd,Ag,Cd,In, Sn,Te,I,Cs,Re,Os, Ir,Pt,Au,Hg,T1,3i 100-1,000 10-100 1-10 - 1 ppm After polishing the surface of the insulating film with a polishing sljrry conta-ining cerium oxide, it. was found to have been completely planarized. 1Ahen observed BAD ORIGINAL Lthrough a differential interference type microscope, it showed no scars on the surface.

In another example where a polishing slurry of suspension prepared by dispersing a powdery material into water by I wt% was used, the powdery material containing cerium oxide particles with an average diameter of 2. 5 wm and a maximum diameter of 12.0 Wm by 1 wt% into water, tie surface of the insulating film was found to have been completely planarized, although it showed four scars per 10 cm3 when observed through a. differential interference type microscope.

in still another example where a polishing slurry of aqueous suspension prepared by dispersing a powdery material into water by 1 wt% was used, the powdery material containing cerium oxide particles having an average diameter of 2.5 wm and a maximum diameter of 12.0 jm and produced by crushing and sintering bastnaesite in a manner as described above, the surfaae of the insulating film showed a scar per 10 cm3 when observed through a differential interference type microscope.

From the above examples, it will be understood that an insulating film of a semiconductor device can be completely planarized by polishing its surface with a polishing slurry containing cerium oxide and that appearance of scars on the surface can be effectively prevented if the pclishing slurry contains only small particles preferably havlng.a maximum diameter of less BAD ORIGINAL -1, - 52 than 4 pm and by using soft particles obtained by appropriately adjusting the condition where the raw material is sintered.

Table 2 below shows the result of an impurity analysis carried out by using the technique of atomic absorption spectrometry in an example where a silicon oxide film having a film thickness of I wm and prepared by oxidizing silicon by heat and a silicon oxide film having a film thickness of I Wm and containing phosphor and boron to a high concentration (hereinafter referred to as BPSG) were polished to reduce the thickness by 0.5 pm with a polishing slurry of aqueous suspension prepared by dispersing particles into water by I wt%, the particles containing cerium oxide and having an average particle diameter of 2.5w and a maximum particle diiameter of 12.0 pm. For reference, the result of a poilishing operation using Compol-80 is also shown.

i9A4) 00,01, v It JP 53 Table 2

Polished Polishing Na K Fe Ce film slurry Thermally not polished 2.0 2.0 0.5 - oxidized (ref) film Compol-80 36.0 6.0 24.5 - cerium oxide 2.0 2.0 0.5 1 or less BPSG not polished 6.5 3.0 9.0 - (ref) Compol-80 1000 or 9.0 35.0 - above cerium oxid 7.0 3.0 11.0 1 or 71 less is As it is clear from Table 2 above, the thermally oxidized silicon film polished by Compoi-80 shows a level of sodium contamination higher than that of tle unpolished silicon film tested for reference (or the levels normally quoted in reference books) by an order of magnitude and the BPSG film polished by Compol-80 shows a level of sodium contamination higher than that of unpolished silicon film by two order of magnitude.

To the contrary, both the thermally oxidized si-.,con film and BPSG film polished by the cerium oxide --ontaining polishing slurry are not contaminated by scdi,,.;,m any more than the unpolished silicon films (showing the levels of contamination normally quoted in reference BAD ORIGINAL 0 j) books). This holds true for the other contaminant elements. As for cerium, the cerium contamination levels of the films treated by the cerium oxide containing polishing slurry were less than 1. 1010 atorns/cm2. Although the cerium oxide containing polishing slurry was prepared by crushing and sintering bastnaesite and not treated to remove alkali metals, the insulating -er films were not contaminated by alkali metals aft having been polished by the slurry, proving that the use of such a polishing slurry does not adversely affect the semiconductor devices polished by such a slurry.

Table 3 below shows the rates of polishing a silicon oxide film obtained by thermally oxidizing silicon, is a silicon nitride film and a BPSG film with a polishing slurry of aqueous suspension prepared by dispersing particles into water by 1 wt%, the particles containing cerium oxide and having an average particle diameter of 2.5p and a maximum par-.-ic-le diameter of 1-2.0 _For reference, the results obtained by polishing identical specimens with Compol-80, a basic polishing slurry of aqueous suspension prepared by dispersing silica particles having a diameter of 12 nm by 5 wt% into water, a slurry obtained by adding ammonia by 10 wt% to the basic polishing slurry and another slurry obtained by adding sodium hydroxide by 0.2 wt% to the basic polishing slurry are also llsted in A-able 3.

BAt) OFOGINAL Table 3

Polishing slurry/ Si02 film SiN film BPSG film polished film cerium oxide 1,000 300 1,200- 1, 300 Compol-80 110 40 200 012rim Si02 Swt96 6 suspension 012= Si02 Swts 18 plus NH3 lOwt% suspension 012= Si02 Swt% so plus NaOH 0.2wt% suspensicn Unit of polishing rate [nm/min] As listed an Table 3, the rate of polishing with Compol-80 a silicon oxide film obtained by oxidizing silicon by heat was 110 nm/min, whereas that of polishing an identical silicon oxide film with the basic polishing slurry of aqueous suspension containing silica particles having a diameter of 12 nm by 5 wt% was as low Jshing slurry as 6 nm/min. The polishing rate of the pol.

obtained by adding sodium hydroxide by 0.2 wt% to the basic slurry was as high as 50 nm/min, while that of another polishing slurry obtained by adding ammonia by 10 wt% to the basic slurry was 18 nm/min, showing that the effect of adding ammonia was not as remarkable as that of adding sodium hydroxide. The rates of scraping or polishing a silicon nitride film and a BPSG fil.m with Compol-80 were respectively 40 nm/min and BAD ORIGifNAL- L_ --- 40) 56 - rim/min.

Thus, for instance, it takes approximately 5 minutes to remove a silicon oxide film obtained by thermally oxidizing silicon and having a thickness of 500 nm from the surface of a semiconductor device by polishing with Compol-80 and approximately ten minutes to remove the silicon oxide film with the polishing -aining silica particles slurry of aqueous suspension cont having a diameter of 12 nm by 5 wt% and sodium hydroxide by 0.2 wt%, while it takes approximately 30 minutes to remove the silicon oxide film with the polishing slurry containing ammonia by 10 wt%, proving that the polishing technique involving the use of any of these polishing slurries is a rather time consuming one.

Contrary to this, when a polishing slurry of aqueous suspension containing cerium oxide particles having an average diameter of 2.5 wm and a maximum diameter of 12.0 Wm by 1 wt% is used, remarkably high polishing rates of 300 nm/min and 1,200 to 1,300 nm/min are achieved respectively for a silicon nitride film and a BPSG film so that these films can ce removed in 0.5 and 2 minutes respectively if they have a thickness of 500 nm. Thus, this polishing slurry is very promising from the view point of industrial applications in terms of film scrapi.-g/polishing rate.

While the polishing slurry used in the above -lie purpose of the invent-lon examples was prepared for t BAD 0141GINAL JOA 57 by crushing and sintering bastnaesite to produce a powdery material containing cerium oxide and disperse the powdery material in water and contained cerium oxide by So wt% and oxides of other alkali metals by 37 wt%, for the purpose of the present invention, a polishing slurry containing cerium oxide may be prepared from any other appropriate materials by using any other appropriate technique and the suspension may contain those ingredients to different concentrations. while the insulating films polished by the above polishing slurry were silicon oxide films obtained by thermally oxidizing silicon, the polishing slurry may also be effectively used for insulating films of other types such as silicon oxide films obtained by chemical vapor phase expitaxy and silicon nitride films as well as insulating films comprising a conductive film as part thereof.

As is obvious from the above examples, insulating films such as silicon oxide films and silicon nitride films can be scraped and polished at an enhanced rate by a cerium oxide containing polishing slurry.

Advantageously, the use of such a polishing slurry does not contaminate the inside of the film with alkali metals. Still advantageously, an insulating f-,-Im having undulations on the surface can be effectively polished to become planar wit'-out producing scars on tne surface when such a polis-in,g slurry is used. Thus, the -:se of such a polishing slurry is feasible for practical !BAD ORIGINiAL I A) 58 - i 5 applications in the field of polishing insulating films in the process of manufacturing semiconductor devices as it solves the problems identified in the above description of this specification.

Figs. 20A through 20C schematically illustrate a semiconductor device in cross section in different stecs of planarizing its insulating film interlayer in a mcde of carrying out the present Invent-lon which is different ter forming an 9F I rom that of Figs. 19 t-rough I - Aft insulating film 212 on a semiconductor device 210 comprising a semiconductor substrate 201 to cover tne entire surface of the substrate, the insulating film i polished or scraped on a polishing apparatus having a configuration as illustrated in Fig. 3 to produce a planar surface as shown in Fig. 20C. The polishing slurry used for this operation in an example contained Ce02 and H20 as maor ingredients along with impurities sucn as Na, Mg, Ai, K, Ca, Ti, Cr, Fe, Ni, Zr, W, Pb, T.11. a.-J 'to a concentration less than 1'.0 ppm. 71,, e Ccncent,razicn.

of each ingredient was determined by 7-CP mass spectroscopy.

It was proved that, by using a highly pure polishing slurry containing impurities only to a negligible extent, the semiconductor Jevice can be effectively prevented from ccntami,!aticn cy s,,.icn -Mpurities if t-e wafer of the device is crc,..ght in touch witt the colisiing slurry during the polishing operation or the latter r 13AE) uniGINAL 03 A 59 is partly left on the surface of the wiring layer after the polishing operation. Table 4 below shows the levels of contamination of a silicon oxide film by impurities determined by atomic absorption spectrometry when it is polished by a method of the invention and a conventional method. AS is apparent from Table 3, the concentrations of K, Al, Cr and Ni were below the detectable level and those of Na, Ca and Fe were practically negligible, or 2.3, 0.9 and 3.4 x 1010 atoms/CM2 respectively which are by far lower than the corresponding levels for the con ventional method, to make the semiconductor device prac tically free from the fear of contamination when the above described polishing mode of the present invention was used. Thus, with such a polishing mode, the semi conductor device does not require a protective film to be formed therein and therefore the overall process of lied to manufacturing semiconductor devices can be simpli4 boost the productivity of the process. Table 4 Contaminant metal element Ca AI Fe C- Ni 0.9 -- 3.4 3. 5 33 45 2. 7 Na K 2 3 90 ri 11 1: "10 atoms/--M2 below the detectable level BAD OF?11itvAL.

This inventiop Known method Still another mode of carrying out the method of polishing and planarizing an insulating film interlayer of a semiconductor device according to the invention will now be described by referring to Figs. 21A ttrough 21E illustrating schematically a semiconductor device in cross section in different steps of planarization.

Referring firstly to Fig. 21A, an Si02 film 202 is formed by deposition as a ground coat on an Si substrate 201 carrying required elements (not shown) thereon.

-rated in Fig. 21B, an Al wiring Then, as illust layer 206 is selectively formed on the Si02 film 202 to a thickness X (Fig. 21D) of 1.1;m.

41m Thereafter, as shown in Fig. 21C, another Si02 f. 207 is formed by deposition to a thickness of about -he substrate including 1.2 pm on the entire surface of t the areas carrying the Al wiring layer 206.

Subsequently, as shown in Fig. 21D, a poiysilicon film (a stopper film) 208 which is more resistive than the Si02 film 207 to polishing is formed by deposition to a thickness T of approximately 0.1;m on the S'02 film 207.

Then, the polysilicon film 208 and the Si02 f--'m 207 are polished or scraped by using a polishing appara tus of the type as illustrated in Fig. 3. A polishing slurry of aqueous suspension containing oxide ty I wt% will typically ce,-sed.

In an example involving an experiment and sti-'- i,BAD ORIUINAL 0 1 i 61 another mode of carrying out the polishing method of present invention, an 5i02 film 207 could be completely planarized by using the above described polishing slurry.

Fig. 22 shows a graph illustrating the result of an experiment carried out for the example. The specimen -his example comprsed 500 wm wide AI wires 206 used for formed at a pitch of 1,200 in. in tne graph of Fig. 22, the abscissa represents the elapse of time (seconds) after the start of a polishing operation as illustrated in Fig. 21E while the coordinate represents the distance between the surface of the first Si02 film 202 and that of the second Si02 film 207.

Before the start of the polishing operation, tne distance between the surface of the projected or raised areas of the first Si02 film 202 where the AI wires 206 were located and that of the second Si02 film 207 (as indicated by a solid line in Fig. 22) and the distance separating the surface oil the recessed areas olL he first Si02 film 202 where there were no AI wires 206 from that of the second S102 film 207 (as indicated sy a broken line in Fig. 22) were same and equal to 1.1,;m which was also the thickness of the AI wires 206.

As the polishing operation began, the polysilicon film 2.8 was pol-,sned f-rstly at the prc]ec--ed areas L and, after about 30 seconds, its was completely r-emoved at these areas to expose the Si02 film 207 thereat. The BAD C)fiGiNAL.

62 polysilicon film 208 was removed preferentially at the projected areas simply because the load applied to the film 208 was greater at the pronected areas than at the recessed areas.

Then, the SiO 2 film 207 started to be polished at the areas where there was no pollysilicon film 2C9, while polysilicon film 208 was further polished at the recessed areas. However, the film 208 remained at the recessed areas wi,-hout being -completely removed was being polished therefrom while z.-e S102 flirn 201 because the load applied to the recessed areas was smaller than that applied to the projected areas.

As the operation of polish-ing the Si02 film 207 proceeded at the pro:ected areas, the undulations on the is surface of the S102 film 207 became less conspicuous When about 100 seconds passed since the start of the polishing operation, the recessed areas of the poly z produce silicon film 208 completely disappeared t a substantially planar surface for the Si02 'I'm '07 r, 237 was made -lanar w.

In other words, the f S 13 2 minimum amount of scrac-,nG work and:-ise to a "dishing" phenomenon.

After tihe Si02 f, lm 23,7 was,-,ade -11anar in seconds after the start of t-e nolish-ing c;Derat-,o.n no undulations appeared --.-j p-olishing went ever since on srnoot,-1y on a z-3nar sirface of the 207.

BAD ORIGINAL -h a 40) A 63 - In the above described example, the use of a polysilicon film 208 which was formed on the SiC2 film and more resistive to scraping than the Si02 film made it possible to planarize the surface of the 3i02 film with minimum amount of polishing work. Additionally, once the Si02 film 207 was planarized, it remained the planar surface condition if the polishing operation continued thereat.

While a polysilicon film 208 having a thickness of 0.1 im was used in this example, a wide margin of thickness may be afforded to such a polysilicon film because it is polished at recessed areas at a rate corresponding to the polishing rate for proected areas. As a matter of fact, a similar effect of planarization was obtained in a supplementary experiment using polysilicon films that were 0.08 pm and C- 15 im thick.

The above describe mode of carrying out the method of the present invention is highly feasible for 7ords a wide margin of practical applications since it aff. film thickness for the polysil-icon film 208 and does not require the formation of a stopper film such as a silicon nitride film normally which is used for known conventional methods to make them complicated and costly.

I a series of, researc, Additionally, as a result o. studies carried out by the inventors of the present invention, it was found that any Si02 films to be L ORIGIN,,L 64 - polished show a performance similar to the one illustrated in Fig. 22 regardless cf the width and the pitch of arrangement of the wires.

Figs. 23 through 27 are graphs that are similar to the graph of Fig. 22and illustrate the changes with 7 polishing time of the distance between the surface cl. the projected areas of the ground layer of a S102 film and the surface of tl,.e other S- ;02 film to be treated and the distance separating the surface of the recessed areas of the ground layer of the S.I. film from that of J02 -he wire width/the the Si02 film to be treated for t wiring pitch of 2, 50, 100, 200 and 500 respectively.

It is understood from Figs. 23 through 27 that the Si02 film to be treated is not polished at the recessed areas of the surface in the initial stages of the polishing operation and then begins to be polished at a rate equal to that at which the film is polished at the projected areas of tne surface when a certain perJod of time has passed since the start of the operation.

It should be noted that various modifications can be made to the above described mode of carrying out the invention. For instance, whille the target film -.c be treated is an S102 film and the stopper film was a pollysill.con film in zne a 1 bove description, tney may be films made of materia_s other than those described above. An appropriate polish-ing slurry other than:.he

BAD oRiGINAL - is one containing cerium oxide may be used.

Table 5 below shows a 'List of various polishing slurries (a 1 wt% suspension of cerium oxide and colloidal silica containing dispersed Si02 particles) and target films (an undoped Si02 film, an SiN film, a polysilicon film, a carbon film and an Si02 film containing B and P) as well as their possible combinations and corresponding rates of polishing the target film. Table 5 Polishing Rate (nm/min) Target Si02 SiN Polycarbon Si02 film film film silicon film film polishing (undoped) film (con.B&P) slurry Cerium oxide 700 300 120 <50 930 suspension (lwt%) Colloidal 160 500 330 <50 550 silica From Table 5 above, it will be understood that, when a cerium oxide suspension and an undoped Si02 f - he are used respectively for the polishing slurry and t target film, the stopper film showing a low polishing rate can be selected from, a polysilicon film, a sillcon nitride film and a carbon film. while an insulating f_1.m was the target film:o be treated in the above description, the method of the present invention can also be applied to a metal film. if

S' BAD ORIGNAL L_. - 66 such is the case, a W film and a Cu film 'ace of an sequentially on the entire surf rying grooves thereon by deposition as a ished and a film resistive to polishing with such an arrangement, the polishing used can have a wide choice because the ished at a rate suffciently lower than which the W film is polished. Likewise will be formed Si02 film carfilm to be polrespectively. slurry to be Cu film is polthe rate at the method of the present invention can be applied to devices compris- ing but a semiconductor substrate other than an Si substrate or a semi- insulating substrate.

As described heretofore in detail, the above mode of carrying out the method of the present invention is not accompanied by the problem of dishing nor any additional processing steps to planar-,ze a film because the film to be polished is planarized by polishing the film to be planarized simultaneously with a stopper film t,',,at has been formed on the film to be pianarized.

Fig. 28 shows a cross sectional view of a sem1con- ductor device which is manufactured by a further r7anufacturing method according to the present invention. A method of manufacturing the sem4lconductor device shown in Fig. 28 is described hereinafter with reference to Figs. 29A to 29C. Figs. 29A to 29C show semiconductor structures at respect-,ve s,:eps of nanufactur-,ng tne serniconduct-or device shcwn in Fig. 23. -,I-ie fin-shed semiconductor structure shown in Fig. 29C is the same as BAU unib.211,,L. 40A 4 67 that as shown in Fig. 28.

Referring firstly to Fig. 29A, a thermally oxidized film 202 is formed by oxidizing the surface of a sub strate 201 which is normally a semiconductor substrate.

Then, a conductive layer 203 typically made of polysilicon is formed on the thermally oxidized film 202. Subsequently, a resist layer 204 is selectively formed on the conductive layer 203 and the thermally oxidized film 202, the conductive layer 203 and the semiconductor substrate 201, if required, are selec tively removed by using said resist layer 204 as a mask to produce recesses or recessed portions 215 and 216 in the form of trenches. The recess 216 is a trench wider than the recesses 215.

Thereafter, as illustrated in Fig. 29B, an insulat ing film 217 is formed by a known CVD technique on the entire surface of the device including the recesses 215 and 216. Note that, in Fig. 29B,'the semiconductor substrate 201 is also selectively removed so that the recesses 215 and 216 extend deep into the substrate 201.

The insulating film 217 has a thickness greater than tne height of the recesses 215 and 216.

Then, a polishing or scraping operation is started from the surface of the insulating film 217 by a ctemi cal mechanical polshing technique. more specifically, the wafer is held upside down by a holder and pressed against a polishing cloth rqtating on a turntable, to BAD ORIGINAL 68 which a polishing slurry containing fine particles of cerium oxide is constantly fed, so that the insulating film 217 may be polished off first. Alternatively, the wafer may be held in an upright position or housed in a wafer carrier so that it may be polished at the top and bottom simultaneously. Since the conductive film 20 which is a polysilicon film operates as a stopper that retards the rate at which it is polished, the polishing operation needs to be stopped at this stage to see that the entire surface of the device has been completely planarized and the recesses 215 and 216 have disappeared as shown in Fig. 29C.

The material to ce used for the conductive film 203 may not necessarily be polysilicon and may alternatively be selected from a group of materials including silicide, carbon, amorphous silicon, titanium nitride and multilayer structures of any of these substances if the surface of the formed film operates as a stopper for the polishing operation.

Colloidal silica is most popularly used for tne polishing slurry. This is mainly because any comescially available colloidal silica is maintained to a weak alkaline condition to show a pH value of around is. With any conventional polishing methods, polishing raze will Ee acnieved fa: tne if the pH value is significantly shifted level. with the above described mode of BAU %.oi sok-die.4^L- AVOO is the invention, on the other hand, a satisfactory polish-he ing rate is ensured for the insulating film when +1 polishing slurry shows a neutral pH level of around 7 only if the slurry contains fine cerium oxide part one of the advantages of using a polishing slurry showing a neutral pH level is that, if the conductive fiim that operates as a stopper has one or more than one tiny holes and an easily corrodible layer such as an aluminum wiring layer is disposed thereunder, a neutral polishing slurry would not dissolve, if partly, the under layer to cause it to flow out.

-ive films -,_,at Table 6 below lists different conduct may be used for the purpose of the present invention and the rates at which they are polished as expressed in absolute and relative terms, Table 6

Polishing Rate selectivity rate heat-oxidized (A/min) film = 1) 3.68 i 5. 7 Type of film 9, 300 Polysilicon Heat-oxidized fil, 6,300 1 From the above tab.Le, -,t will be -found that, w'cen the insulating -,s an x-je film in par-zc:,-,iar, a polysilicon film having a rate selectIvity of 5.7 may suitably be used as a conductive film that operates as F3AD OR#GiNAt L,:1_'000 - a stopper when the oxide film is polished. If a non conductive film is required as a polishing stopper, then a silicon nitride film having a rate selectivity of 2.6 will provide a good choice, although the use of a polishing slurry having a rate selectivity of greater than 5 is more preferable.

when a sillicon nitride film is used for the insulating film, in particjiar, the,ise of a polishing slurry as a polishing stopper will be a good choice :ilm is because the rate selectivity of a polysilicon f' approximately 2.2 if that of a silicon nitride film is 1.

If a conductive film is used as a polishing stopper, it preferably shows a large rate selectivity, most preferably greater than 5, relative to that of the target layer to be polished.

Thus, the insulating film of a semiconductor iev.,--e of the type under consideration can suitably --e poilshed by chemical mechanical polishing using a polishing slurry containing cerium oxide if a thermally oxi2-zer film is laid under the conductive film.

Now, still another mode of carrying out the present invention will be described by referring to Fics. 3,3A through 30C, which illustrate different steps of planarizing a semiconductor ievice.

Referring firstly t) 32A, a wir-ing layer 222 is formed on a supporting s,icstrate 201 which is nor f i '.m mally a semiconductor substzate and a conductive. - 1 BAD ORIGINAL J0 71 is 203 typically made of polysilicon is formed on the wiring layer 222. Subsequently, a resist layer 204 is selectively formed on the conductive layer 203 and the thermally oxidized film 202 and the conductive layer 203 are selectively removed by using the resist layer 204 as a mask to produce recesses 215 and 216. The recess 2116 is a trench wider than the recesses 215. Thereafter, as illustrated in Fig. 30B, an insulating film 217 is formed by a known CVD technique on the entire surface of the device including the recesses 215 and 216. The insulat- ing film 217 has a thickness greater than the height of the recesses 215 and 216. Then, a polishing or scraping operation is started from the surface of the insulatIng film 217 by a chemical mechanical polishing technique. more specifically, the wafer is held upside down by a holder and pressed against a polishing cloth rotating on a turntable, to which a polishing slurry containing 'ed, so fine particles of cerium oxide is constantly 1. that the insulating film 217 may be polished first. Alternatively, the wafer -nay be held in an upright position or housed in a wafer carrier so that it may be po.',--cm simultaneously. Since tne ished at the top and bott conductive film 203 which is a polysilicon film operates as a stopper layer that retards the rate at which it Is scraped, the polls-ing:.2eration needs to be stopped at this stage to see that the entire surface of the device has been completely planar-,zed and the recesses 22.5 and 1 I BAD (itisuiiiAiL_ - 72 i 5 216 have disappeared as shown in Fig. 30C.

Thus, the insulating film of a semiconductor device of the type under consideration can suitably be polished by chemical mechanical polishing using a polishing slurry containing cerium oxide if a thermally oxidized film is laid under the conductive film.

Now, still another mode of carrying out the present invention will be described by referring to Figs. 31A and 31B, which illustrate different steps of planarizing a semiconductor device.

Referring firstly to Fig. 31A, a wiring layer 222 comprising a number of wire sections is selectively formed on a supporting substrate 201 which is normally semiconductor substrate and an insulating film 223 and a conductive film 224 are sequentially formed on zne wiring layer 222. Subsequently, the insulating film 223 and the conductive layer 224 are selectively removed to produce recesses 225, where the wiring layer 222 is exposed. Then, an alominum wiring layer 225 is formed on the conductive film 224 and the exposed wiring layer 222 to a thickness greater than the depth of the recesses 222. Then, a polishing or scraping operation is started from the surface of the wiring layer 226 by using a chemical mechanical polishing technique. more specifically, the wafer is neld pside jown by a noL2er and pressed against a polishing cloth rotating on turntable, to which a poiisning slurry containing I a f ine i BAD ORIGINAL 40 7 3 - particles of cerium oxide is constantly fed, so that the wiring layer 226 may be polished first. Alternatively, the wafer may be held in an upright position or housed in a wafer carrier so tnat the wafer may be polished at the top and bottom simultaneously. Since the conductive film 224 operates as a stopper layer that retards the rate at which it is pc-shed, the polishing operation needs to be stopped at this stage to see that the entire surface of the device has been completely planarized and the recesses have disappeared or the wiring layer 226 remains only in the recesses 225 as shown in Fig. 31B. -ive layer 224 is preferably made of he conduct polysilicon as it effectively operates as a stopper.

while a conductive layer 224 is formed on an insulating film 223 so that the former may operates as a stopper layer when the device is polished in the above made, the use of such a conductive layer 224 may --e omitted if the surface of the insulating f-,Im 222 jected to a polishing operation functions as a stopper.

Note that the wiring -ayer can be chemica11y and mechanically polished in the above described mode.

Now, still another mode of carrying out the present invention will be described by referring to Figs. 32A through 32C, which --1-4-'-lerent steps of planarizing a sem-co-,djct.---- device.

7 Referring fIrstly to F1g. 32A, a numbet. of BAD UniOiNAL 40 74 projections 231 including a number of elements such as a semiconductor polycrystalline layer, capacitors and electrodes are formed on a substrate 201 which is normally a semiconductor substrate and then a first nsulating film 232 is formed on the entire surface of tl-,e semiconductor substrate 201 carrying the patterned projections 231 to produce a flat surface. Thereafter, a wiring layer 234 is selectively insulating film 232 and then an 4s to 233A which.

formed on the first amorphous silicon layer be transformed to a second insulating formed by deposition on the entire surface of film is the first insulating film 232 including the areas where the wiring layer 234 is formed. Subsequently, a third insulating film 235 is formed on the amorphous silicon is layer 233A to a height at least greater than that of the wiring layer 234. Then, the device is chemically and mechanically polished or scraped, starting from the sur face of the third insulating film 235. More spec-,-4:- cally, the wafer is neld upside down by a holder and pressed against a poiisning cloth rotating on a turntable, to which a pc.'i..-,shing slurry containing fine particles of cerium oxide is constantly fed, so that the third insulating film 235 may be polished first. Ater natively, the wafer may be held in an upright position or housed in a wafer carrier so that the waffer may te p,o-'-'shed at the top and --ottom simultaneously. jl%s illustrated in Fig. 32B, t-e amorphous silicon 233A L Ad - 75 which is to be transformed to a second insulating film operates as a stopper layer that retards the rate at which it is polished so that the layer 233A and the third insulating film 235 are completely planarlized. Since, is the amorphous silicon layer 233A is conductive, it oxidized and transformed to a second insulating film 233 -rated in Fig. 32C.

after the polishing operation as illust.

* Amorphous SI'Llcon can be made to take the form of a film at temperature below 4000C. This means that the amorphous silicon film can maintain its form even when an aluminum wiring layer 234 is laid under the second insulating film 233 in the above mode of operation. Thus this mode of carrying out the invention is particularly suited to produce a multillayer structure in a situation where polysilicon films that need to be formed at I-iigh temperature around 800C may not be used. The second insulating film 233 can be formed as a stopper layer on the wiring layer 234 without any technical diffICU'Lties.

The above described mode of operation may also be than a multilayer envLron- advantageously used in other t ment where polysillcon wires and/or electrodes are used in place of a wiring layer 234 particularly when an insulating film that covers the polysil-1con wires and/or the electrodes needs to be planarized because, if such is a case, the polysllicon wires and/or tne electro-4es themselves operate as a s,:op --on per to allow smpllfca BAD ORIGINAL 76 - of the entire manufacturing process.

Since any of the modes of operation of planarizing a semiconductor device described above do not involve etching or reflow, the device can be completely f the size of the recesses and planarized regardless o. projections it carries on the surface. Additionally, since a neutral polishIng slurry containing cerium oxide is used, the layer underlying the one being polished is free from the fear of corrosion if touched by the slurry so the device can be safely polished from its. projected areas until it is completely pianarized.

Additionally, with the method of the present invention, semiconductor devices can be accurately polished to planarize the surface by forming a stopper layer typically made of an insulating film at any level at which the polishing operation desirably needs to be stopped in a controlled manner. Thus, the device will be completely planarized even if it originally carries a number of projections and recess on tfte surface so that a subsequently patterning operation will be advantageously carried out. Specifically, when the device is subjected to a patterning operation for wiring in a subsequent step, it will be completely free from any poss-, bility of producing thinned wires as a result of differences in the focal depths of the optical sys,em for optically exposing 'ie device attributable undulations on the surface of the device. By, to::-.e n BADOH1t2IN^L to L_ particular, laying an insulating film directly on the electrodes of the device as a stopper layer, the device will not be protected against any possible adverse effects that the subsequent processing operations may exert on the device if the electrodes are surrounded by an even more complicated structure than those we see today as expected in the future. Then, consequently interlayer wiring operations as well as operations of :ilms may be carried out forming interlayer insulating 1.

in an appropriately and accurately manner than ever to accommodate any requirements for higher integration and down-sizing in the future.

Additionally, since the method of the present invention is applicable to the operation of not only polishing insulating films but also wiring materials to expand the scope of applicability of the present invention.

Consequently, the method of the present invention can reduce the cost and r-aise the yield of manufacturing semiconductor devices.

The method of the present invention is also advantageous in that the stopper layer of the semiconductor device can be selected from conductive pol- i -m, s ysilicon films, high resistive amorphous silicon and various silicIde mazerial.1711ms.

As understood from the foregoing, the m,,et"cd of the present invention enables planarization of a semiconductor 1 1 BAD ORIGINAL 78 - device in a neutral environment regardless of the size of the projections i.e. raised portions and recesses i.e. recessed portions to ensure a high yield and an enhanced reliability in the field of manufacturing semiconductor devices.

Now, a still another mode of carrying out the present invention WiLL be described by referring to Figs. 33A through 33J which illustrate different steps of planarizing an insulating film interlayer of a semiconductor device.

Referring firstly to Fig. 33A, an Si02 fiLm 202 is formed to a thickness of 1;m on the surface of a semiconductor substrate 201 on which semiconductor elements (not shown) are formed. Then, a 500 nm th--k polysilicon film 203 is formed on the Si02 fi- m 202.

Thereafter, as illustrated in Fig. 33B, a 100 nm thick carbon film 244 is formed as a stopper layer on the polysilicon wiring film 203 in an Ar atmosphere by DC magnetron spattering, using a graphite plate as target. The conditions under which the carbon film 244 is formed include a pressure Of 4 mTorr, a power supply rate of 3.5 W/cm2 and an Ar flow rate of 40 SCCM. an experiment conducted to examine tne structure of a men c-17 the carbon fi' 7, 244 by X- r3y d ' ffraC' i0n, found that the film was am.orphous or finely crystal-_,ne.

-ance of the film was 0.75 QCM w-en The specific resist L BAU Un$UAA4P%L 4014 - 79 is measured by a four-probe method.

Then, as shown in Fig. 33C, photo resist is applied to the carbon film 244 to a thickness of 1.5 wm to form a photo resist (photo-sensitive resin) layer 245.

-o resist 245 is exposed to light Subsequently the phot with a mask pattern (not shown) placed thereon and tl-ien subjected to a development operation to remove the exposed areas of '-'-,e carbon film 244 and produce a photo ern 245.

resist patt A patterning operation is then carried out on the carbon film 244 by means of RIE using 02 gas and also using the photo resist pattern 245 as a mask as illustrated in Fig. 33D. Then, as shown in Fig. 33EE another patterning operation is carried out on the polysilicon wiring film 203 also by means of RIE but using CF4 gas this time.

Then, as shown in Fig. 33F, the photo resist pat tern 245 is removed by a down flow type asner in wnlch microwaves are disc.tarrged in t-e gaseous mixture of CF4 and 02. Thereafter, as shown in Fig. 33G, a 1,m,ick ace of t-e Si02 film 246 is formed on the entire surL device as an insulating film interlayer. it would te understood that the surface of the Si02 film 246 -,s or uneven undulated to -eflect the profile of the pol ys,1.1'con wirng f_,Im 2,^3.:n other words, a grccve _s formed between any two aj]acent areas of tte S'02 246 located above the corresponding wire elements of tne L BAD ORIGINAL - polysilicon wiring film 203. The undulations on the surface of the device need to be removed to planarize the surface of the device in the next step of the polishing operation.

Now, the S!02 film 246 is polished or scraped to planarize the Si02 film 246. Fig. 33H illustrates how the device appears in cross section when it is planarized. The polisning and planarizing operation is carried out typically by using an apparatus as schemati- cally illustrated in Fig. 3.

Referring to Fig. 3, a polishing slurry is fed to the center of the top surface of the turntable 502 by way of a polishing slurry feed pipe 503. The turntable is rotated at a rate of about 100 rpm. A polishing cloth 504 is fitted to the top surface of the turntable 502 and brought to contact with a wafer 1, which is pressed downward with a load Of 40 kgf applied thereto by a holding device 501 rotating also at a rate of about 100 rpm.

The polishing slurry is an aqueous suspension prepared by dispersing 3102 particles having a diameter of 80 nm in water. The suspension contains 3i02 particles by 20 wt% and its hydrogen ion concentration is constantly maintained to pH12.3 by appropriately adding sodium tydroxAe wnenever 7ecessary. in an experiment ccnouc:ed on a sample wafer witn the above identified parameters, it was proved that:he %,...Ast.4rL 00) A surface of the Si02 fil.rn 246 and that of the carbon film 244 had been almost completely planarized as ill.!,.;strated in Fig. 33H after a prescribed polishing operation.:t was also proved, as illustrated in Fig. 33H, that 1he polysilicon wiring layer 203 underlying the carbon layer 244 had not been polished off at any spots on the 6-inch wafer and was completely covered by the carbon film 244.

The carbon film 244 was found at least partly remaining on the wiring layer 203 when the polishing operation was over.

.hereafter, the carbon film 244 was removed in a barrel type 02 plasma asher to show a cross section as shown in Fig. 331. Subsequently, a 1 wm thick planar Si02 film 247 was formed as an insulating film inter is layer as shown in Fig. 33J. It will be appreciated from Fig. 33J that unlike a conventional insulating film : the interlayer illustrated in Fig. 9C, the surface of.

Si02 insulating film interlayer 247 is substantially flat over the entire area of the wafer, though -r snows slight recesses of a -e-lg',t corresponding to the..,,ickness of the carbon film 244 removed in the step of Fig. 231.

The fact that the above described mode of carry!ng out the method of the invention comprises a step of forming a carbon film 244 on the polysilicon fillm 203 as a stopper layer pr-i--r:3 --ne start of pcl-,sh-,ng operation makes it possible to provide large pollshing rates for the polysilicon f11m 203 and the Si02 246 j BAD ORIGINAL L_ &W - 82 which are the targets to be polished, on one hand, and the carbon film 244 functioning as a stopper layer, on the other hand, so that the operation of polishing these films may be terminated when the carbon film 244 is still partly remaining in position. Thus, the SiC2 insulating film interlayer 247 can be made substantially flat over the entire surface area of the wafer.

Now, a still anconer mode cf carrying out the present invention will Ce described by referring to Figs. 34A through 341 which illustrate different steps of thinning and planarizing a silicon film of a thin film semiconductor device.

Referring firstly to Fig. 34A, an Boo nm thick S!C2 film 202 is formed on an Si substrate 201.

Then, as shown in Fig. 34B, another Si substrate 251 is heated to 8000C and bonded to the first Si substrate 201 with the Si02 film 202 interposed therebetween.

Thereafter, as shown in Fig.'34C, openings are formed through the second Si substrate 251 ant:! tne openings get to the surface of one Si02 film 202.

Subsequently, as shown in Fig. 34D, a carbon film 244 is formed on the entire surface of the Si substrate 251 to a thickness of HO nm as a stopper layer in an Ar atmosphere by DC magnetrcn spattering, using a graphite plate as target.

Then, as shown in Fig. 34E, photo resist is applied to the surface of tne carton film 244 to form a 1.5 om 1 BAD ORIGINAL 0 --- A 83 r, thick photo resist (photo-sensitive resin) layer 245, which is then exposed to light with a mask pattern (not shown) placed thereon and thereafter subjected to a development operation to remove the exposed areas of the carbon film 244 and produce a photo resist pattern 245 defined by the opening formed through the Si substrate 251.

A patterning operation is then carried out on the carbon film 244 by means of RIE using 02 gas and also using the photo resist pattern 245 as a mask as illus- trated in Fig. 34F. Then, as shown in Fig. 34G, the photo resist pattern 245 is removed by a down flow type asher in which microwaves are discharged in the gaseous mixture of CF4 and 02.

Subsequently, the Si substrate 251 is polished or scraped to planarize the substrate. Fig. 35H illustrates how the device appears in cross sectlon when it is planarized. The polishing and planarizing operaticn is carried out typical'y by using an apparat-,s as scnematically illustrated in Fig. 3. The polishing s. is an aqueous suspension prepared by dispersing S10_2 particles having a diameter of 80 nm in water. The s,,;s- ts -ydropension contains particles by 20 wt% and il S'02 gen ion concentration is constantly maintained to pH12.0 by appropriately adc;ing sodi,,_m hydroxide wt,.enever necessary.

In an experiment conducted on a sample device, it BAD ORIGINAL 84 i 0 was proved that the surface of the Si substrate 251 had been completely planarized as illustrated in Fig. 35H after a prescribed polishing operation. It was also proved that the Si02 film 202 underlying the carbon layer 244 had not been polished at any spots on the 6-inch wafer and was completely covered by the carbon film 244. The carbon film was found at least partly remaining on the Si02 film 202 when the operation of polishing the Si substrate 23 was over.

Thereafter, the carbon film 244 was removed in a barrel type 02 plasma asher to complete the silicon thinning operation and produce a thin semiconductor device.

The fact that the above described mode of carrying out the method of the invention comprises a step of forming a carbon film 244 on the Sisubstrate 251 and the SiC2 film 202 as a stopper layer prior to the start of polishing operation makes it possible to provide a large polishing rate for the S-J substrate 251 which is the target to be polished, and the carbon film 244 funC tioning as a stopper layer, so that the operation of polishing these films may oe terminated when the carcon film 244 is still partly remaining in position. Thus, the silicon thinning operation in the process of manu facturing thin fil,-i:Iev-,ces can be carried out with an enhance level of precision.

Table 7 below shows the rates of polishing I-arget BAL) UnlUAIMAL AP.A as - films or to-be-polished layers when different polishing slurries are used.

Table 7

Polishing A. SiN Si02 f1m slurry (heat- film oxidized) Aqueous suspension containing S102-8Onm 1,600 500 dia. 20wt% NaOH-0.2wt% Aqueous suspension containing Si02-80n71 750 450 dia. 20wt% Aqueous suspension containing Ce02- 7,000 3,000 10Onm dia. lwt% carbon film or less or less or less A/min -ively while an Si02 film and an Si film are respect is used as the not-to-be polished film for the first and second modes of carrying out the method of the invention and the polishing slurry involved is an aqueous suspen sion prepared by dispersing Si02 particles having an average diameter of 80 nm and maintained to pH12.0 by adding, if required, sodium hydroxide, it should be noted that the present invention is by no means limited thereto and any other materials may be used for the tar get film if the forget film has a sufficiently large -y in terms of the polishing ratio with regard selectivit -o to a carbon film. Additionally, the polishing slurr-V t be used may be of any other type that contains partlc-es of cther appropriate materials and shows an appropriate BAD ORIGINAL A 86 is pH level other than 12.0. For instance, a Ce02 suspension may be appropriately used for the polishing slurry.

As described above in detail, the fact that the method of polishing a semiconductor device according to the invention comprises a step of forming as a stopper layer a carbon film which is resistive against polishing prior to the start of polishing operation makes it possible to provide a large selectivity in terms of -or the target film to be po14shed the polishing rate 'L - - and the stopper layer, so that the polishing operation may be held under accurate control. Additionally, since a carbon film is resistive against various chemicals, can be used practically regardless of the type of pol ishing slurry involved.

Thus, with the method of the present invention, the operation of polishing a semiconductor device can be carried out under strict control with a large selectivity in terms of the polishing rate for the target film to be forming a carbon film as polished and a stopper layer by f the stopper layer on at least part of the layer -nderlying the target film, the inside of the target, the layer on the target film c,, tne areas adjacent to the target. Therefore, with such an arrangement, chemical instability and other known obstacles in manufacturing semiconductor devices will Ice effect-,ve-y eliminated.

Now, a preferable emcod-ment of polishing apparatus according to the invention will be described by referring BAD ORiGINAL 0 1 JO - 87 to Fig. 35 along with a mode of carrying out the method of the invention suited for use with the embodiment.

Fig. 35 is a schematic illustration of the embodiment of polishing apparatus.

A polishing cloth 504 is bonded to the top surface of turntable 502 and a polishing slurry is fed to the center of the polishing cloth 504 by way of a polishing slurry feed pipe 503.

The polishing slurry is an aqueous suspension con- taining dispersed cerium oxide particles by 1 w"k_%.

wafer 201 to be poiished has a diameter of 15 mm and is held by a holding device 501. The wafer 201 carries on the surface a 1 wm thick Si02 film (not shown) formed by chemical vapor deposition (CVD).

The turntable 502 is driven to rotate by an electric motor 511, to which an ampere-meter 513 is connected to measure the current flowing through the motor 511. The electric current measured by the ampere-meter 513 is transformed into the amount of work in an arithmetic unit 541, which generates a signal that terminates the polishing operation when the accumulated amount of work has reached a given value.

Fig. 36 is a graph showing a relationship between the change in the rate of polishing a wafer with polishing time and a relaticnship between the electric current flowing through the motor with polishing time, and Fig. 18 is a graph showing only a characteristic cause BALs 4#4 - 88 between the polishing rate with the polishing time.

As shown in Fig. 36, the rate of polishing a wafer -h time but also shows ups generally tends to increase wit and downs such that a change up to 30% is observed in the polishing rate. It is seen that the electric cur rent flowing through the electric motor changes as a function of the polishing rate.

Fig. 37 is a graph showing the relationship between the electric current flowing through the electric motor and the rate at which the wafer is polished.

From Fig. 37, it,s clear that the electric current flowing through the electric motor is directly propor tional to the rate of polishing the wafer. Thus, the polishing rate at any moment can be determined by read is ing the electric current flowing through the electric motor and the amount of polishing work done by that moment can be obtained cy -,nzegrating the poll ling s11, r-ate with time.

Fig. 38 is a grapn obtained by transform-,ng tne current flowing through the electric motor into the friction between the target layer to be polished and surface plate carrying the polishing slurry.

AS Fig. 38 clearly shows, the friction between ihe target layer to be Dols-ed and the surface plate carr--ing the p)ol.Jshlng slurr. -Js proportlonal to --he rate Of polishing the target layer.

Fig. 39 is A graph showing the relationship cetween BAU 89 - the rate of polishing the target layer and the rate of rotation of the turntable 502 and the holding device 501.

From Fig. 39, it is clear that the rate of polishing the target layer is proportional to the rate of rotation of the turntable 502 and the holding device Sol.

As may be easily anticipated, it has been proved in an experiment conducted by the inventors of the present invention that the extent to which the target layer is polished is proportional to the time consumed for the polishing operation.

Then, it can be said that the amount of work that has been performed between the target layer and the sur face plate carrying the polishing slurry is proportional to the amount to which the target layer has been polished, which can be obtained by integrating tle rate - of polishing the target layer with time the amount work can be obtained by multiplaying the value of fri-c tion of Fig. 38 by the relative rotation speed of the turntable 502 and the holding device 501 and integrating the product with time.

As a matter of fact, in an experiment where the amount of work to be performed between the target layer able which was a 0.60 wm thick Si02 film and the turnt.

:arry-4ng the pc--Jshing sl,-r-y was set to m,S,ooi and a total of 1.20 wafers were polished, the wafers wee polished to an amount between 0.59 Wm and 0.62;jm, BAD L_ - showing a dispersion less than 5%.

In another experiment where Si02 films containing fluorine and those containing boron and phosphor were polished, a result similar to the above experiment was obtained. what was remarkable with this experiment was that the Si02 films containing boron and phosphor showed a polishing rate tilgler tlan ttat of the above exper-i ment by about 30%.

In the above experiments, tte extent to which the Si02 film was polished could be accurately controlled by calculating the amount of work to be performed between the target layer, or the Si02 film, and the surface plate carrying the polishing slurry which was cerium oxide and terminating the polishing operation when the amount of work that has been done became equal to a pre determined value.

While the target fi.m was an Si02 film and the pol ishing slurry was cerium oxide in the above experiments they may be replaced by any ot.lier apprcpr-ate and polishing slurry respectively.

Additionally, a pci-ishing apparatus having a con figuration other than tie one i'lustrated in Fig. 35 ma be used.

While a proportional relationship was observed between 1-ne work per-fz-:-,edd 2Y an z102 lfl'm tutes the target layer and tne surface plate ca.-ry.-g a polishing slurry of cerium oxide and the rate c.1 1 L_ BAD m - 91 polishing the target layer in the above experiments, such a directly proportional relationship is not necessarily be required to calculate the amount of the performed work during a polishing operation so long as the friction between the target layer and the surface plate carrying a polishing slurry holds a one-to-one correspondence to the rate of polishing the target layer.

As described above, if the friction between the target layer and the surface plate carrying a.polishing slurry is not proportional to the rate of polishing the target layer, the rate of polishing the target layer can be determined by reading the friction or the electric current flowing through the motor so long as a one-to- one correspondence is observed between the friction between the target layer and the surface plate carrying a polishing slurry or the electric current flowing through the electric motor and the rate of polishing the target layer.

Thus, according to a polishing apparatus for planarizing and polishing a target layer formed on a semiconductor substrate according to the invention, the extent to which the target layer is polished can be accurately controlled on the basis of the amount of the -hat 'nas Ceen done determined by,reasur- polishing work -he sur- -arget layer and ing the friction between tne t face table carrying tte polishing slurry during the i ' 3A1) i - 92 polishing operation, calculating the rate of polishing the target layer from the measured friction and integrating the polishing rate with time.

Now, another embodiment of polishing apparatus ac- cording to the invention will be described by referring to Figs. 40 through 43.

Fig. 40 is a schematic perspective view of the embodiment of polishing apparatus of the invention comprising a turntable 502 provided with a polishing cloth 11 ch pol- 0 or a polishing plane 504 on tne top thereof, whishes a semiconductor device 201 disposed thereon, using a polishing slurry 505. The shafts 517 and 518 for rotating the turntable 502 and the wafer holding device 501 are equipped with d4istortion sensors 551 and 552, or distortion gauges, respectively, for detecting the distortions of the shafts for which the shafts are responsible. The shafts 517 and 518 are also connected to respective drive motors 511 ar. 512 by way of respective belts 519 and 52C. The drive forces generated by -ion the drive motors 522 and 512 give rise to frict between the polishing plane 504 and the wafer 201. -.',e friction generates disto-tion in each of the shafts 517 and 518, which is detected and converted an ellec tric signal by the related distortion sensor. As shown Jn the graph of Fig. the relat-,o,-,sh-ip between the 1 -he distort-on of icad of the polishing operation and 1. the shaft or the electric signal representing the 1 BAD C)hiubj.4-,- m 93 - distortion is linearly expressed. in other words, the electric signal transformed from the distortion sensor accurately shows the condition of the polishing plane 504 and that of the surface of the wafer 201.

Thus, as shown in Fig. 42, when the undulations or uneveness on the surface of a wafer comprising an _Jnsulating film 212 and a wiring layer 210 formed on a semiconductor substrate 201 is planarized by the above embodiment, it accurately detects the size of the surface area of the insulating film 212 to be polished and also shows the instant when the surface of the insulating film 14 being polished has been almost completely planarized.

The above described embodiment may be so modified that only a single distortion sensor is disposed on the side of either the turntable 502 or the wafer holding device 501. The layer to be polished does not necessarily need to be an insulating film and may be a wiring layer.

The above described embodiment has advantages as listed below by simply providing the shafts 551 and 552 for rotating the turntable 5C2 and the wafer holding device 501 of the embodiment with respective distortion sensors. 1) The target layer can te ccmpletely planarized wIt'". an -hat any conventional poll- enhanced level of precision 1. ishing apparatuses can rever achieve.

G BAD ONUINAL 94 2) Since the fact that the insulating film has been completely planarized is instantly detected by the apparatus, the polishing operation can be terminated before the underlying wiring layer is affected so that the reliability of the wiring layer is always guaranteed. 3) From the same reason as 2) above, the wiring layer is protected against breaKing accidents to enhance the yield of manufacturing semiconductor devices.

4) Provision of a hard layer under the target layer to stop the polishing operation is not required so that the process of manufacturing semiconductor devices by using an apparatus according to the invention can eliminate any additional steps to raise the productivity and lower the cost of manufacturing. The fact that no hard stop per layer is required also entails an advantage that no ayer needs to be formed a.

additional insulating. fter the completion of the planarizing operation.

A still another embodiment of polishing apparatjs of the invention will be described by referring to Figs. 44 and 45.

Fig. 44 schematical.Ly iLlustrates the polishing section of the embodiment of polishing apparatus. comprises a turntable 502 which is rotated by a -7-J--st drive motor (,not shown). % polishing unwoven c!3tn '534 is attached on the turntable 502 and a pallshing sijrry feeding nozzle (not shown) is disposed on the polishing BAD ORIGINAL MJO cloth. A wafer holding device 501 is disposed above the polishing cloth and a sample wafer 601 on which friction is measured is held on the lower surface of the holding device 501. The lower surface of the holding device 501 faces the top surface of the turntable 502. The lower end of rotary shaft 5.1.8 is fitted to the top surface of said holding device 501 so that the holding device 501 may be rotated by a second drive motor (not shown) that transmits the rotation force to the holding device 501 by way of the rotation shaft 518. The rotation motion of the turntable 502 and that of the holding device 501 are controlled by a controller 611 by way of the first and second motors respectively. As illustrated in Fig. 45, the controller 611 performs setting polishing conditions, calculating a F/Fo (as defined hereinafter) and re-setting a polishing condition.

Firstly, an object which is polished and on which friction is provisionally measured, typically a semicon ductor sample wafer 601, Is fitted to the lower surface of the holding device 501. '17he wafer 601 comprises a silicon substrate and a silicon oxide film formed on the surface of the silicon substrate. The silicon oxide film has not been sub3ected to a patterning operation and has a sufficiently large thickness. Then, the turn table 502 is rotated ty --ne first drive motor while tne holding device 501 is rotated ty the second drive motor at a first rate of rotation, which is defined as the BAD ORIGINAL 96 relative rate of rotation of the polishing unwoven cloth rotating with the turntable 502 relative to the wafer 601 on which friction is measured.

Thereafter, a polishing slurry 505 such as an aque- ous suspension of cerium oxide is fed onto the polishing unwoven cloth via the polishing slurry feeding nozzle.

The polishing unwoven cloth can retain the aqueous sus pension of cerium oxl-de 15 to a large extent and smoothly discharge it. Then, as the holding dev.,ce 501 by a movement control section not shown), the sample wafer 601 on which friction is provisionally measured is brought to contact with the polishing unwoven cloth dis posed on the turntable 502. At this stage, the wafer 601 on which friction _Js provisionally measured is sub is jected to a first load. 7-hereafter, the holding device 501 is horizontally moved along the top surface of the the wafer 601 on which friction turntable 502 to polish 11 is measured for a first polishing period. In short, the wafer 601 on which friction is provisionally measured is polished under a fLrst set of pclshing conditions of the first load, the first polish-ing period and the first rate of rotation.

As the polishing operation goes on, the electric current flowing througn the fLrst and second dr-,ve motors are measured dy tne polisning setting sectlon of the controller 611. The measurement cf t-e fact carrIed Qut in the working stage, current is in 4 BAD ORIGINAL 0 J0 97 which is defined as a stage where the polishing unwoven cloth has already left the initial stage, in which the polishing unwoven cloth might become quickly choked with the polishing slurry to rapidly raise the friction between the polishing unwoven cloth and the target of the polishing operation, and entered into a stabilized state, showing little changes in the friction between the target.

the polishing unwoven cloth and t Then, there is a given relationship between the electric current and the friction Fo between the polish ing unwoven cloth and the sample wafer 601 or the target of polishing and therefore the friction Fo can be determined by carrying out a given set of arithmetic operations. Then, there is another given relationship between the friction Fo and the rate at which the samcle wafer 601 is polished and therefore the polishing rate can be determined by carrying out another given set of arithmetic operations. In other words, since there is a relationship as shown in Fig. 46 between the electric current and the polishing rate, the polishing rate can be determined from the electric current.

Fig. 46 is a graph showing, as described above, the relationship between the electric current of the drive motor and the polishing rate. A wafer 601 comprising a silicon oxide film formed on the surface is set in 2csItion on the embodiment and polished in a manner as described above. Then, the.electric current flowing 13AD ORONAL 98 - through the first and second drive motors and the rate of polishing the wafer for this current are determined.

Fig. 46 denotes the characteristc curve representing the relationship between the electric current and the rate at which the wafer is polished. The graph shows and the pol- that the relationship between the current. ishing rate is a one-to-one correspondence.

Subsequently, the rotation of the turntable 502 and holding device 501 are stopped and the sample wafer 601,cnally measured and an which friction has neen provis.

is which has been held by the holding device 501 replaced by a wafer 602 for producing a semiconductor device. Then, a second set of polishing conditions including a second load, a second polishing period and a second rate of rotation under which the silicon oxide film of the wafer 602 is polished are established from the polishing rate. Thereafter, the turntable 502 and the holding device 501 are driven to rotate by the first and second drive motors at the second rate of rotation -o the wafer 602, which is pol- to apply the second Isad t ished for the second polishing per.,od.

After the operation if polishing the wafer 632 -s completed, it is replaced by another wafer 601 for producing a semiconductor device, which is polished under the same second set of polishing --ondtions. When the polishing unwcven --loth has been 'ised for a gve.n period of time to pc-sh a plurality of wafers 1 BAD 0HIGINAL J0 1 - 99 602 for producing semiconductor devices under the second set of polishing conditions, turntable 502 and the holding device 501 are stopped to rotate. At this stage, the last wafer 602 polished by the embodiment is replaced back to the wafer 601 on which friction is provisionally measured. Then, the turntable 502 and the holding device 501 are rotated respectively by the firs', and second drive motors at the first rate of rotation and the first load is applied to the wafer 601 on which friction is measured, which is then polished for the first polishing period.

While the wafer 601 on which friction is measured is being polished, the electric current flowing through the first and second drive motors is measured by the F/Fo calculating arithmetic flow of Fig. 45, which then calculates the friction F between the wafer 601 on which friction is measured and the polishing unwoven cloth and determines the value of F/Fo.

When the value of F/Fo is greater than 0.9 and smaller than 1.1, the polishing condition re-setting or reestablishing section of the controller 611 as shown in ions Fig. 45 calculates a third set of polishing condi". including a third load, a third polishing period and a third rate of rotation from the value of F/Fo in order to regain the polishing rate under the second set of polishing conditions so that wafers may be polished to a same extent regardless of the changes in the polishing i BAD ORIGINAL If JJ.9 - 100 - conditions. Then, the turntable 502 and holding device 501 stop to rotate and the wafer 601 on which friction was provisionally measured is replaced by a wafer 602 for producing a semiconductor device. Now, the polishing apparatus is operated under the third set of polishing conditions. That is, the turntable 502 and the holding device 501 are rotated respectively by the first and second drive motors at the third rate of rotation and the third load is applied to the wafer 602 for pro- ducing a semiconductor device, which is polished for the third polishing period.

When the value of F/Fo is smaller than 0.9 or greater than 1.1, the degraded polishing cloth is redressed by seasoning, cleansing and/or other appropri- ate measures, in which the polishing unwoven cloth may be brushed to remove the polishing slurry 505 remaining thereat to choke the polishing cloth. The polishing unwoven cloth can be restored to a good condition I by redressing. Thereafter, the wafer 601 on which friction is measured is polished under the first set of polishing conditions and the F/Fo calculating arithmetic unit in Fig. 45 calculates the value of F/Fo once again.

If F/Fo is found to be either smaller than 0.9 or greater than 1.1, then the polishing unwoven cloth is sub3ected to anct-er redressing operati on. 7f, on ''-e other hand, F/Fo is tetween 0.9 and!.I, a third set of polishing conditions are reestablished from the value of 1 BAD L_ 40 101 is F/Fo above in the polishing condition reestablishing section of Fig. 45 in order to regain the polishing rate under the second set of polishing conditions so that the extent to which the wafer 601 is polished is kept constant. Then, the turntable 502 and the holding device 501 stop to rotate and the wafer 601 on which friction was measured is replaced by a wafer 602 for producing a semiconductor device, which is then polished under the third set of polishing conditions.

After the operation of polishing the wafer 602 is completed, it is replaced by another wafer 601 for pro ducing a semiconductor device, which is polished under the same second set of polishing conditions. when the polishing unwoven cloth has been used for a given period of time to polish a plurality of identical wafers 602 for producing semiconductor devices under the second set of polishing conditions, the turntable 502 and the holding device 501 stop to rotate. At this stage, the last wafer 602 polished by the embodiment is replaced back to the wafer 601 on which friction is provisionally measured.

Then, the wafer 601 on which friction is measured is polished under the first set of polishing conditions.

While the wafer 601 on which friction is measured is being polished, the electric current flowing through the first and second drive motors is measured by "-he F/Fo calculating arit.tnet-ic unit of Fig. 45, which then determines if the polishing.unwoven cloth has been BAD 0'r-',IG'&NAL 102 is degraded and requires a redressing operation or the polishing operation can be carried on under a new set of polishing conditions.

Thereafter, the above described procedures are repeated. If F/Fa is found to be less than 0.9 or greater than 1.1 after the degraded polishing unwoven cloth has been redressed, it is determined that the polishing unwoven cloth has gone out of its service life and therefore should be replaced.

Fig. 47 is a graph showing the relationship between the accumulated service time of the polishing unwoven -he cloth and the polishing rate and the extent to which t wafer is polished obtained by monitoring the friction between the wafer 601 on which friction is measured and -he electhe polishing unwoven cloth as a function of t tric current flowing through the first and second drive motors. In other words, the current flowing through the drive motors is measured against the accumulated service time of the polishing unwoven cloth, the friction between the wafer 601 an which friction is measured and the polishing unwoven cloth is determined from the measured current and the rate of polishing the wafer 601 is calculated from the friction. In the graph of Fig. 47, the solid line curve represents the relationship between the accumulated service t-,,re of the polishing unwoven cloth and the polishing rate, whereas the broken line curve represents the relationship between the 1 SAú) ORIGINAL JO - 103 accumulated service time of the polishing unwoven cloth and the extent to which the wafer is polished. The first 50 minutes of the accumulated service time is defined as the initial stage in the use of the polishing unwoven cloth, whereas all the remaining period after the first 50 minutes is defined as the working stage of the polishing unwoven cloth.

Fig. 48 is a graph showing the relationship between the accumulated service time of a polishing unwoven cloth used with a conventional polishing method and the electric current flowing through the drive motors and the polishing rate of the polishing unwoven cloth. In Fig. 48, the broken line curve represents the relationship between the accumulated service time of the polishing unwoven cloth and the current flowing through the drive motors, whereas the solid line curve denotes the relationship between the accumulated service time and the polishing rate.

From Figs. 47 and 48 it will be appreciated that the polishing rate cannot be maintained to be constant with the conventional polishing method even when the polishing unwoven cloth is in the working stage, whereas, with the method of the present invention, it can be held to be constant once the polishing unwoven cloth enters the working stage and consequently the extent to which each wafer is polished can also be Taintained to be constant.

L BAD ORIGINA1 104 The F/Fo calculating arithmetic unit of the control section 611 of the above embodiment periodically detects the current flowing through the first and second elec- is tric motor, carries out a set of predetermined arithmetic operations to calculate the friction between the wafer 601 on which friction is measured and the polishing unwoven cloth from the detected e-,ectric current and determines the value of Fo in F/Fo. Thus, the condition of the surface of the polishing unwoven cloth can be appreciated from the obtained value of F/Fo. when the surface condition of the polishing unwoven cloth is not favorable for polishing operation or the value of F/Fo is found to be less than 0.9 or greater than 1.1, the degraded polishing unwoven cloth is redressed by removing the polishing slurry 505 unnecessarily choking the polishing unwoven cloth by means of seasoning, cleansing and/or other appropriate measures. Then, after a while, the value of F/Fo is determined again to see the effect ofredressing and a set of new operating conditions will be established to meet the new surface condition. if, on the other hand, the surface condition of the polishing unwoven cloth is favorable or the value of F/Fo is found to be between 0.9 and 1.1, a set of new operating conditions will be established directly from that value of F/Fo. FinalLy, if '-e surface condition of the polishing unwoven cloth is nc-- Improved by the redressing -n needs o be replaced because iz is operation, the clot BAD ORIGINA1 P) i v - 105 so judged that its service life is over. Thus, it is always possible to exactly know the timing for redressing or replacing the polishing unwoven cloth and keep the rate of polishing the target object from the value of F/Fo. In other words, with the method of the present -o which each semiconductor device invention, the extent t is polished by a polishing apparatus according to the invention can always be maintained to be constant.

It should be appreciated that the polishing method of the present invention is particularly advantageous when the operation of polishing a semiconductor device needs to be terminated before the layer underlying the one being polished of the device is exposed.

It should be noted that the present invention is not limited to the above described modes of carrying out the method of the invention and embodiments. Additionally, polishing slurries and the target layers other than the above described types may be used with an apparatus and the method according to the invention by knowing the relationship between the electric current flowing through the drive motors and the polishing rate. For instance, the polishing slurry may be colloidal silica and the target layer may be a polysilicon film.

The friction between the target and the polishing unwoven cloth may be determined by means other than t.te current flowing through the.drive motors.

13AD 4 106 while a polishing unwoven cloth is used to polish the target and held on the turntable 502 in the above embodiment, it may be replaced by any other appropriate material if it can effectively hold the polishing slurry.

while the electric current flowing through the first and second drive motors is ceriodically detected as a wafer 601 on wnicn friction measured is being polished determine the timing for redressing or replac ing the degraded polishing unwoven cloth in the above embodiment, the use of such a wafer 601 is not necessar ily required for the purpose of the present invention and the timing for redressing or replacing the degraded polishing unwoven cloth can be determined by constantly monitoring the current flowing through the first and second drive motors when wafers 602 for producing semiconductor devices are being sequentially polished.

Thus, the above Jescrilbed embodiment that detects a first level of the friction tetween the polishing plane and the target for polishing and then a second 'evei of the friction after a predetermined period of time to determine the ratio off the first to second friction levels can accurately control the extent to which each target ob]ect is pcl:.snei.

-Jnally, still anotner errbod-,,ment of the invention will be described by referring to Figs. 49 through 51.

BAD ORIGINAL JO - 107 Fig. 49 shows a schematic illustration of the embodiment of polishing apparatus. A polishing cloth 504 having a polishing plane is disposed on a turntable 502 and a holding device 501 for holding a target 201 of polishing positioned opposite to the polishing plane is disposed above the polishing cloth 504. A liquid feed nozzle 503 is arranged in the vicinity of the holding device 501 and a polishing slurry 505 is fed through the liquid feed nozzle 503.

In a polishing apparatus having a configuration as described above, a target 201 of polishing, typically a semiconductor wafer carrying'a silicon oxide film on the surface is held to the lower surface of the holding device 501 in such a manner that the surface to be pol- ished is disposed opposite to the upper surface of the polishing cloth 504. Then, a polishing slurry 505, e.g. an aqueous suspension of cerium oxide is fed onto the polishing cloth 504 through the 1-iquid feed nozzle 503. Subsequently, polishing plane is pressed against the wafer and frictionally moved on the wafer to polish and wafer.

Fig. 50 schematically illustrates how the polishing plane of the embodiment is redressed when it is degraded after a long use. when the polishing cloth 504 is used for polishing wafers for a predetermined period of time, a surface active agent 701, e.g. a polycarboxylic acid type negative ion surface aqtive agent, fed onto the BAD ORiGiNA, J) - 108 - polishing cloth 504 by way of the liquid feed nozzle 503 and the polishing slurry 505 remaining an the polishing plane to choke the polishing plane is removed by rubbing the surface of the polishing cloth with a brush 702. Thereafter, pure water 704 is fed onto the polishing cloth 504 through the liquid feed nozzle 503 to wash away the surface active agent 701.

The above procedures are repeated thereafter whenever necessary.

Fig. 51 is a graph showing the change with time in the polishing rate of the embodiment. As the degraded polishing plane is redressed by a surface active agent 701 fed onto the polishing cloth 504 in addition to a conventional method of using a brush, a remarkable effect of removing the remaining polishing slurry 505 Is achieved. Thus, the surface condition of the polishing plane can be held under a good condition for a prolonged -he po.

period of time by removing lishing slurry 505 -he remaining on the polisi-.ing cloth 504 to choke the t polishing cloth to an ennanced degree that cannot be achieved by any conventional method of cleansing a po',.

ishing cloth.

It should be noted that the method of redressing a degraded polishing clotn used for the above embodiment ficati-ons and/or alterations is subject to various -.cdi.

so long as it comprises means for using a surface active agent 701. in other words,--Iie method does not lim-' BAD ORIGINAL- A A 109 - nor restrict the use of any other means other than a surface active agent 701, leaving the use of pure water 704 for removing the surface active agent 701 as a matter of choice. The timing for redressing a degraded polishing plane is also not specifically defined. So, the degraded polishing plane may be redressed while a target of polishing is being polished on the apparatus.

The surface active agent 701 to be used for the purpose of the present invention is also not limited to polycarboxylic acid type negative ion surface active agents and the components of the surface active agent 701 including hydrophilic groups, oleophilic groups and counter ions may be selectively replaced whenever appropriate. The polishing slurry 505 and the target object 201 are also not specifically defined.

As described above, with the polishing method and a polishing apparatus according to the invention, the polishing slurry choking the polishing plane of the apparatus can be removed effectively and efficiently without posing any difficulties. Consequently, the polishing plane can be maintained under a good condition and prevented from degradation by the polishing slurry due to a choked condition caused and reduce the possibility of producing scars on the surface of the target of polishing. Thus, the quality of target objects treated by the apparatus can be strIctly controlled and, at the BAD ORIGINAL - 110 - same time, a prolonged service life can be assured for the polishing pad. Additionally, the timing for replacing a degraded polishing pad can be detected without relying on the effort of a skilled operator to constantly observe the surface condition of the polishing cloth.

1 BAD ORIGINAL - L.10 ill

Claims

CLAIMS:

Eace A polishing apparatus comprising a surfl plate provided with a polishing plane disposed thereon, a holder means disposed opposite to the table for '-olding a target object having a surface to be polished so as to keep said surface of the target object to face t-e polishing plane, said target object being polished by holding said holding means and said table under pressure and slidingly rroving said polishing plane and sa,,j surface to be polished relative to each other whi-e feeding said polishing plane with a polishing si.,j,-:y, a surface active agent being also fed to said polis,",ing plane.

1 BAD ORIGINAL