GB2291977A

GB2291977A - Forming patterns of semiconductor devices

Info

Publication number: GB2291977A
Application number: GB9515148A
Authority: GB
Inventors: Joon Hwang; Yong Hwa Kim
Original assignee: Hyundai Electronics Industries Co Ltd
Current assignee: SK Hynix Inc
Priority date: 1994-07-28
Filing date: 1995-07-24
Publication date: 1996-02-07
Also published as: KR0148610B1; GB9515148D0; CN1124406A; JPH08172098A; JP2696750B2

Abstract

A method of forming a pattern for semiconductor devices comprises (i) imagewise exposing only a surface area (6) of a photoresist (3) on a conductive or dielectric layer (2) and, applying a colloidal Sn/Pd layer (5) (ii) removing the exposed area (6) and overlying colloid layer and applying a metal layer (7) to the remaining colloid layer (5) and (iii) removing the remaining exposed portion of photoresist (3) and the underlying layer (2) by plasma etching followed by removal of the metal layer (7), colloid layer (5) and unexposed photoresist to leave a pattern of layer (2) on support (1). This method prevents a variation of pattern width caused by a random reflection, etc. due to a strong exposed energy. Only imagewise exposing the surface area of the photoresist means a lower exposure energy is used. <IMAGE>

Description

METHOD OF FORMING A PATTERN OF A SEMICONDUCTOR DEVICE BACKGROUND OF INVENTION Field of the Invention The present invention relates to a method of forming a pattern of a semiconductor device, and particularly, to a method of forming a pattern of a semiconductor device which can prevent a pattern width variation by etching a photoresist and a conductive layer by utilizing a colloid layer and a metal layer as an etch barrier to form a fine pattern on a lower layer which renders a severe reflection.

Information Disclosure Statement The Prior art method of forming a pattern of a semiconductor device forms a photoresist film pattern by coating the photoresist on the conductive layer or a dielectric layer to be patterned, exposing a selected portion of the photoresist by utilizing a mask, and developing the photoresist. Thereafter, the conductive layer or the dielectric layer is etched by utilizing the photoresist pattern as the etch barrier. However, in cases where the reflectivity of the conductive layer or the dielectric layer which is the lower layer is high at the time of exposure, a difference in dimension of the photoresist pattern is caused by random deflection, etc. due to a strong exposing energy. Furthermore, as the semiconductor device is more highly integrated, the formation of a fine pattern becomes more difficult due to the above described problem.

SUMMARY OF THE INVENTION Therefore, the object of the present invention is to provide a method of forming a pattern of a semiconductor device which can eliminate the above described disadvantage by etching a photoresist and a conductive layer by utilizing a colloid layer and a metal layer as an etch barrier to form a fine pattern on a lower layer which renders a severe reflection.

To achieve the object, a method of forming a pattern of a semiconductor device, comprising the steps of: coating a photoresist on a conductive layer or dielectric layer and forming an exposed region on the photoresist exposed by a mask; forming a colloid layer on a resulting structure after forming the exposed region, and thereafter, removing the exposed region and a portion of the colloid layer on the exposed region by using a developing liquid; selectively forming a metal layer only on the remained colloid layer, and removing an exposed portion of the photoresist and the conductive layer or dielectric layer using the metal as an etch barrier; and sequentially removing the metal layer, the remaining colloid layer and photoresist.

BRIEF DESCRIPTION OF THE DRAWINGS For fuller understanding of the nature and objects of the invention, reference should be had to the following detailed description taken in conjunction with the accompanying drawings in which: FIGS. 1A through 1E are sectional views to illustrate a method of forming a pattern of a semiconductor device according to the present invention.

Similar reference characters refer to similar parts through the several views of the drawings.

DETAILED DESCRIPTION OF THE INVENTION FIGS. 1A through 1E are sectional views to illustrate the method of forming a pattern of a semiconductor device according to the present invention.

FIG. 1A shows a formation in which a photoresist 3 is coated on a substrate 1 on which a conductive layer or dielectric layer 2 is formed, a mask 4 is placed at a selected position, and the photoresist 3 is exposed to a low exposing energy. The photoresist 3 used to flatten the lower layer is formed with a thickness of 1 to 2pm. At the time of exposing, only the surface (the thickness of 0.5ym from the surface) of the photoresist 3 is exposed to the low exposing energy.

FIG. 1B shows a formation in which an exposed region 6 is formed on the exposed portion of the photoresist 3, and a colloid layer 5 is formed on the entire photoresist 3. The colloid layer 5 is formed by a vapor deposition method by utilizing a colloidal Pd/Sn catalyst.

Referring to FIG. 1C, the exposed region 6 and a portion of the colloid layer 5 are removed using a developing liquid. That is, the developing liquid penetrates into the exposed region 6 to remove it and at the same time removes the colloid layer 5 on the exposed region 6. Thereafter, a metal layer 7 is selectively formed only on the remained colloid layer 5 by the dipping process using the electroless plating bath.

FIG. 1D shows a formation in which an exposed portion of the photoresist 3 is removed by a plasma etching method by utilizing the metal layer 7 as an etch barrier. Thereafter, the exposed conductive layer or dielectric layer 2 is removed by the plasma etching method and the metal layer 7, colloid layer 5 and photoresist film 3 are sequentially removed, whereby the conductive layer or dielectric layer 2 is patterned as shown in FIG. 1E. Since the metal layer 7 and colloid layer 5 are formed by a dipping method and a vapor deposition method respectively, debris can exist at the backside of said substrate 1, therefore, it is preferable to remove nitric acid.

As described above, the present invention has an excellent effect that a notching and necking phenomenon is prevented and the variation of the pattern width is prevented, even in the case in which the lower layer is conductive layer, by removing the photoresist using a colloid layer remaining only on the portion of the photoresist not exposed and a metal layer selectively formed only on the colloid layer as an etch barrier, and by subsequently patterning the conductive layer or dielectric layer.

Claims

What is claimed is:

1. A method of forming a pattern of a semiconductor device, comprising the steps of: coating a photoresist on a conductive layer or dielectric layer and forming an exposed region on said photoresist exposed by a mask; forming a colloid layer on a resulting structure after forming said exposed region, and thereafter, removing said exposed region and a portion of said colloid layer on said exposed region by using a developing liquid; selectively forming a metal layer only on said remaing colloid layer, and removing an exposed portion of said photoresist and said conductive layer or dielectric layer using said metal as an etch barrier; and sequentially removing said metal layer, said remaining colloid layer and photoresist.

2. The method of Claim 1, wherein said exposed region is formed to a depth of 0.3 to 0.5pm from the surface of said photoresist.

3. The method of Claim 1, wherein said colloid layer is formed by a vapor deposition method utilizing a colloidal Pd/Sn catalyst.

4. The method of Claim 1, wherein said metal layer is formed by a dipping process utilizing an electroless plating bath.