GB2280312B - Method of preparing semiconductor with good intrinsic gettering - Google Patents
Method of preparing semiconductor with good intrinsic getteringInfo
- Publication number
- GB2280312B GB2280312B GB9419512A GB9419512A GB2280312B GB 2280312 B GB2280312 B GB 2280312B GB 9419512 A GB9419512 A GB 9419512A GB 9419512 A GB9419512 A GB 9419512A GB 2280312 B GB2280312 B GB 2280312B
- Authority
- GB
- United Kingdom
- Prior art keywords
- intrinsic gettering
- preparing semiconductor
- good intrinsic
- good
- preparing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000005247 gettering Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
- H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA002064486A CA2064486C (en) | 1992-03-31 | 1992-03-31 | Method of preparing semiconductor wafer with good intrinsic gettering |
| PCT/CA1993/000123 WO1993020582A1 (en) | 1992-03-31 | 1993-03-26 | Method of preparing semiconductor with good intrinsic gettering |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB9419512D0 GB9419512D0 (en) | 1994-11-16 |
| GB2280312A GB2280312A (en) | 1995-01-25 |
| GB2280312B true GB2280312B (en) | 1996-03-06 |
Family
ID=4149527
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB9419512A Expired - Lifetime GB2280312B (en) | 1992-03-31 | 1993-03-26 | Method of preparing semiconductor with good intrinsic gettering |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US5587325A (enExample) |
| JP (1) | JPH07508613A (enExample) |
| KR (1) | KR950701138A (enExample) |
| CA (1) | CA2064486C (enExample) |
| DE (2) | DE4391302T1 (enExample) |
| GB (1) | GB2280312B (enExample) |
| WO (1) | WO1993020582A1 (enExample) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2874834B2 (ja) * | 1994-07-29 | 1999-03-24 | 三菱マテリアル株式会社 | シリコンウェーハのイントリンシックゲッタリング処理法 |
| US5593494A (en) * | 1995-03-14 | 1997-01-14 | Memc Electronic Materials, Inc. | Precision controlled precipitation of oxygen in silicon |
| DE19538983A1 (de) * | 1995-10-19 | 1997-04-24 | Siemens Ag | Verfahren zum Beseitigen von Kristallfehlern in Siliziumscheiben |
| US6004868A (en) * | 1996-01-17 | 1999-12-21 | Micron Technology, Inc. | Method for CMOS well drive in a non-inert ambient |
| JP4473571B2 (ja) * | 2001-07-10 | 2010-06-02 | 信越半導体株式会社 | シリコンウェーハの製造方法 |
| US6444551B1 (en) * | 2001-07-23 | 2002-09-03 | Taiwan Semiconductor Manufacturing Company | N-type buried layer drive-in recipe to reduce pits over buried antimony layer |
| WO2008136500A1 (ja) * | 2007-05-02 | 2008-11-13 | Siltronic Ag | シリコンウエハ及びその製造方法 |
| US8258042B2 (en) * | 2009-08-28 | 2012-09-04 | Macronix International Co., Ltd. | Buried layer of an integrated circuit |
| KR101231412B1 (ko) | 2009-12-29 | 2013-02-07 | 실트로닉 아게 | 실리콘 웨이퍼 및 그 제조 방법 |
| CN102543675B (zh) * | 2010-12-31 | 2014-11-05 | 中芯国际集成电路制造(上海)有限公司 | 玻璃衬底的处理方法 |
| CN102842642A (zh) * | 2011-06-23 | 2012-12-26 | 吉林庆达新能源电力股份有限公司 | 一种太阳能电池生产中单晶硅的扩散方法 |
| US11881405B2 (en) | 2022-02-04 | 2024-01-23 | Applied Materials, Inc. | Methods for forming N-type buried layer in a substrate by performing non-doping implant through oxide layer formed over the substrate |
| CN120882166A (zh) * | 2024-04-16 | 2025-10-31 | 隆基绿能科技股份有限公司 | 一种太阳能电池及光伏组件 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0060676A2 (en) * | 1981-03-11 | 1982-09-22 | Fujitsu Limited | A method for the production of a semiconductor device comprising annealing a silicon wafer |
| EP0066461A2 (en) * | 1981-05-29 | 1982-12-08 | Hitachi, Ltd. | Semiconductor wafer and method of manufacturing the same |
| EP0070713A2 (en) * | 1981-07-17 | 1983-01-26 | Fujitsu Limited | A semiconductor device comprising a bulk-defect region and a process for producing such a semiconductor device |
| EP0098406A1 (en) * | 1982-07-06 | 1984-01-18 | Texas Instruments Incorporated | Ramped nucleation of solid state phase changes |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4597804A (en) * | 1981-03-11 | 1986-07-01 | Fujitsu Limited | Methods of forming denuded zone in wafer by intrinsic gettering and forming bipolar transistor therein |
| US4548654A (en) * | 1983-06-03 | 1985-10-22 | Motorola, Inc. | Surface denuding of silicon wafer |
| JPS60133734A (ja) * | 1983-12-21 | 1985-07-16 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
| JPS618931A (ja) * | 1984-06-25 | 1986-01-16 | Hitachi Ltd | 半導体装置の製造方法 |
| US4622082A (en) * | 1984-06-25 | 1986-11-11 | Monsanto Company | Conditioned semiconductor substrates |
| JPS6120337A (ja) * | 1984-07-09 | 1986-01-29 | Nec Corp | 半導体装置の製造方法 |
| DD286460A5 (de) * | 1987-03-19 | 1991-01-24 | Akademie Der Wissenschaften Der Ddr,De | Verfahren zur herstellung von mos-bauelementen mit sio tief 2/si tief 3n tief 4-isolatorschichten |
| US4851358A (en) * | 1988-02-11 | 1989-07-25 | Dns Electronic Materials, Inc. | Semiconductor wafer fabrication with improved control of internal gettering sites using rapid thermal annealing |
| JPH03185831A (ja) * | 1989-12-15 | 1991-08-13 | Komatsu Denshi Kinzoku Kk | 半導体装置の製造方法 |
| US5141887A (en) * | 1990-07-02 | 1992-08-25 | Motorola, Inc. | Low voltage, deep junction device and method |
| KR960000952B1 (ko) * | 1991-03-05 | 1996-01-15 | 후지쓰 가부시끼가이샤 | 반도체 장치의 생산공정 |
| JPH05308076A (ja) * | 1992-03-03 | 1993-11-19 | Fujitsu Ltd | シリコンウエーハの酸素析出方法 |
-
1992
- 1992-03-31 CA CA002064486A patent/CA2064486C/en not_active Expired - Fee Related
-
1993
- 1993-03-26 WO PCT/CA1993/000123 patent/WO1993020582A1/en not_active Ceased
- 1993-03-26 DE DE4391302T patent/DE4391302T1/de active Pending
- 1993-03-26 US US08/313,091 patent/US5587325A/en not_active Expired - Lifetime
- 1993-03-26 JP JP5516922A patent/JPH07508613A/ja active Pending
- 1993-03-26 DE DE4391302A patent/DE4391302B4/de not_active Expired - Lifetime
- 1993-03-26 GB GB9419512A patent/GB2280312B/en not_active Expired - Lifetime
-
1994
- 1994-09-30 KR KR1019940703427A patent/KR950701138A/ko active Granted
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0060676A2 (en) * | 1981-03-11 | 1982-09-22 | Fujitsu Limited | A method for the production of a semiconductor device comprising annealing a silicon wafer |
| EP0066461A2 (en) * | 1981-05-29 | 1982-12-08 | Hitachi, Ltd. | Semiconductor wafer and method of manufacturing the same |
| EP0070713A2 (en) * | 1981-07-17 | 1983-01-26 | Fujitsu Limited | A semiconductor device comprising a bulk-defect region and a process for producing such a semiconductor device |
| EP0098406A1 (en) * | 1982-07-06 | 1984-01-18 | Texas Instruments Incorporated | Ramped nucleation of solid state phase changes |
Non-Patent Citations (4)
| Title |
|---|
| JAPANESE JOURNAL OF APPLIED PHYSICS SUPPLEMENTS 30 Aug 1984 TOKYO JA pages 487-490 J A BORLAND ET AL * |
| JAPANESE JOURNAL OF APPLIED PHYSICS vol23 no1 Jan 1984 TOKYOJP pages l9-l1 S KISHINO ET AL * |
| JOURNAL OF APPLIED PHYSICS vol 59 no 7 1APR 1986 NEWYORK US pages 2562-2565 T NOZAKI ET AL * |
| SOLID STATE TECHNOLOGY August 1984 WASHINGTON US pgs 123-131J A BORLAND ET AL * |
Also Published As
| Publication number | Publication date |
|---|---|
| US5587325A (en) | 1996-12-24 |
| WO1993020582A1 (en) | 1993-10-14 |
| GB9419512D0 (en) | 1994-11-16 |
| KR100298067B1 (enExample) | 2001-12-01 |
| CA2064486A1 (en) | 1993-10-01 |
| DE4391302B4 (de) | 2007-07-26 |
| JPH07508613A (ja) | 1995-09-21 |
| KR950701138A (ko) | 1995-02-20 |
| DE4391302T1 (de) | 1995-04-13 |
| GB2280312A (en) | 1995-01-25 |
| CA2064486C (en) | 2001-08-21 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 732E | Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977) | ||
| 732E | Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977) | ||
| PE20 | Patent expired after termination of 20 years |
Expiry date: 20130325 |