GB2278957A - Method of manufacturing multi-layer ceramic capacitors - Google Patents

Method of manufacturing multi-layer ceramic capacitors Download PDF

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Publication number
GB2278957A
GB2278957A GB9406165A GB9406165A GB2278957A GB 2278957 A GB2278957 A GB 2278957A GB 9406165 A GB9406165 A GB 9406165A GB 9406165 A GB9406165 A GB 9406165A GB 2278957 A GB2278957 A GB 2278957A
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United Kingdom
Prior art keywords
electrode layers
laminate
electrode
capacitor
overlap
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB9406165A
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GB9406165D0 (en
Inventor
Tomoyuki Okuwaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
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Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Publication of GB9406165D0 publication Critical patent/GB9406165D0/en
Publication of GB2278957A publication Critical patent/GB2278957A/en
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/30Stacked capacitors

Abstract

A laminate is formed from a predetermined number of unfired ceramic sheets (A1 -A4) having the same pattern of electrode layers (B1-B4) which are alternately shifted in adjacent layers. The laminate is cut at regular intervals in regions where all of the electrode layers overlap to provide a plurality of capacitor chips having a desired capacitance value which is dependent upon the overlap of the adjacent electrode layers. <IMAGE>

Description

METHOD OF FABRICATING MULTI-LAYER CERAMIC CAPACITORS This invention relates to methods of fabricating multilayer ceramic capacitors.
Conventionally, a multi-layer ceramic capacitor, hereinafter referred to merely as a "capacitor", has been generally fabricated in the following manner. Referring to Fig. 7, a series of electrode layers B1', B2,, B3' and B4' are applied by printing or the like on one surface of each of a plurality of unfired ceramic sheets, i.e. green sheets, Awl', A2', A31 and A4', at positions Such that they are alternately shifted by a selected distance in the longitudinal direction on successive sheets.Thereafter, as shown in Fig. 8, the ceramic sheets A1,, A2,, A3, and A4' are superposed to form a laminate with the electrode layers overlapped by a distance L1', which determines the effective area of the electrode layers, and an unfired ceramic cover sheet C' for covering the electrode layers B1' on the uppermost ceramic sheets A1 is applied to that sheet to complete the laminate structure. Next, the resultant laminate is cut perpendicularly along cutting planes D1, and D2' in a crosswise matrix shape so that the laminate is divided into a plurality of laminated chips 1'. The laminated chips are then fired.Finally, as shown in Fig. 9, end-face elec trode layers 2' are applied to the left end- and right endfaces la' and lb' of each of the laminate chips 1' so that each end-face electrode is in contact with alternate internal electrode layers B1', B2', B31 and B41.
Generally, capacitors are required which have several different electric capacitance values according to their use so that it is necessary to have capacitors with a wide range of electric capacitance values available.
The electric capacitance values of the capacitors are determined by the type of dielectric material, the distance between the internal electrodes, the effective area of the internal electrodes and the number of internal electrode layers. Generally, the type of the dielectric, the distance between the internal electrode and the effective area of the internal electrode layers are standardized so that the capacitance values are determined by varying the number of internal electrode layers.
However, where the capacitance value is determined by the number of internal electrode layers as described above, capacitors can be made only with certain specific capacitance values, which cannot satisfy the commercial need in recent increasing high-precision technology for capacitors having capacitance values intermediate between the specific values provided by varying the number of electrode layers. Thus, there is no problem in making capacitors with capacitance values which correspond exactly to different numbers of in ternal electrode layers, but a capacitance value corresponding to a number which is between values corresponding to the numbers of internal electrode layers cannot be provided unless the location of the electrode layers is shifted or the effective area of the electrode layers is varied.
However, if the locations of the internal electrode layers B21 and B41 of the capacitors shown in Fig. 8 are shifted so that the length L1 of the overlap area, joe., the effective electrode area, of the internal electrode layers is decreased to a shorter length L2,, as shown in Fig. 10, in order to decrease the capacitance value, this leaves portions F of the capacitor laminate which cannot be used because they have a different overlap area, thus reducing production efficiency.
Further, if the locations of the internal electrode layers are varied, the types of printing patterns required to produce them are increased and the combination of electrode patterns required to obtain the desired capacitance values will be more complicated, thus making it difficult to standardize production of capacitors.
On the other hand, in an alternative method for adjusting the capacitance of a structure so as to provide different capacitance values, an unfired ceramic sheet, i.e., a dummy layer, having no electrode layer is sandwiched between unfired ceramic sheets having electrode layers so as to increase the spacing between the electrodes. It has been found that the capacitance value of capacitors produced in this way is vari able so that this method is not capable of assuring production of capacitors with precise capacitance values.
According to the present invention, a method of fabricating a multi-layer ceramic capacitor comprises forming a laminate from a plurality of unfired ceramic sheets, each having substantially the same pattern of electrode layers which are alternately shifted in adjacent sheets to provide a desired electrode overlap; cutting the laminate at predetermined intervals at locations where the electrode layers overlap so that the laminate is divided into a plurality of capacitor chips with end-faces; firing the capacitor chips; and applying an electrode to each of the end-faces of the fired laminate chips.
The present invention provides a method for making capacitors having different capacitance values using the same pattern of electrode layers and the same number of internal electrode layers.
With this method, capacitors with capacitance values which are not an integral multiple can be fabricated by varying the electrode overlap with no waste, while using only one pattern of internal electrode layers and using the same number of internal electrode layers, thus making it possible to standardize the fabricating method.Using the method of the invention, it has been found that, when a plurality of unfired ceramic sheets having internal electrodes with a length shorter than the spacing between the chip cut planes are superposed to form a laminate in such a manner that the electrode layers are alternately shifted and the laminate is cut in areas where all the electrode layers overlap in order to obtain capacitors with several capacitance values, the unfired ceramic sheets need only be superposed in such a manner that the locations of the internal electrode layers in adjacent sheets are shifted with respect to each other.
In one example, a plurality of unfired ceramic sheets with the same pattern of electrode layers is prepared. Each of the electrode layers has a length shorter than the interval between the cutting planes which cut the laminate into separate chips. The plurality of ceramic sheets are laminated in such a manner that the electrode pattern of adjacent ceramic sheets is alternately shifted to determine the effective electrode area in the resulting chips. The laminate thus formed is cut in planes in which the electrode layers of alternate ceramic sheets overlap.
Thus, capacitors with different capacitance values can be successively obtained owing to differences in the effective electrode area.
Further advantages of the invention will be apparent from a reading of the following description in conjunction with the accompanying drawings, in which: Fig. 1 is a perspective exploded view showing a plurality of ceramic sheets having patterns of electrode layers positioned in accordance with a representative method of making capacitors according to the present invention; Fig. 2 is a perspective view of the embodiment of Fig.
1 with the ceramic sheets assembled to provide a laminate; Fig. 3 is a longitudinal sectional view taken on the line III-III of Fig. 2 and looking in the direction of the arrows; Fig. 4 is a longitudinal sectional view of a chip cut from the laminate of Fig. 2 having electrodes at the end-faces of the chip; Fig. 5 is a longitudinal sectional view of a laminate of ceramic sheets arranged according to another embodiment of the invention; Fig. 6 is a longitudinal sectional view of a laminate of ceramic sheets arranged according to still another embodiment of the invention; Fig. 7 is a perspective exploded view showing a plurality of ceramic sheets having patterns of electrode layers positioned in accordance with a prior art method of making capacitors;; Fig. 8 is a longitudinal sectional view of a laminate of ceramic sheets having patterns of electrode layers positioned in accordance with the prior art; Fig. 9 is a longitudinal sectional view of a chip cut from the laminate shown in Fig. 8; and Fig. 10 is a longitudinal sectional view illustrating the effect of changing the displacement of the electrode layers in the laminate shown in Fig. 8.
Representative embodiments of the invention will be described hereinafter with reference to Figs. 1-6.
First, as shown in Fig. 1, patterns of electrode layers B1, B2, B3 and B4 are formed on the surfaces of a plurality of unfired ceramic sheets, i.e. green sheets, A1, A2, A3 and A4, in such a manner that the electrodes are alternately shifted to the same extent in adjacent sheets. All the electrode layers B1, B2, B3 and B4 on the ceramic sheets A1, A2, A3 and A4 have the same pattern and they can be applied by, e.a., a printing method such as screen printing.
Next, as shown in Fig. 2, the ceramic sheets A1, A2, A3 and A4 are stacked or laminated in such a manner that the positions of the electrode layers B1 and B3 of the spaced ceramic sheets A1 and A3 coincide and those electrode layers overlap the electrode layers B2 and B4 on the other spaced ceramic sheets A2 and A4 since their locations are shifted by the same predetermined distance. On the laminate thus formed, an unfired ceramic cover sheet C is superimposed on the ceramic sheet A1 to cover the electrode layer B1 of that sheet to provide a laminate having the structure shown in Fig. 3 as viewed in longitudinal section.The laminate is then cut at regular intervals in a matrix shape along perpendicular crosssectional planes D1 and D2 with the planes D1 located in regions where all of the electrode layers B1, B2, B3 and B4 on the ceramic sheets A1, A2, A3 and A4 overlap. Thus, the laminate is divided into a plurality of laminated chips 1. Each of the laminate chips 1 is then fired. End-face electrodes 2 are applied to the right and left end-faces la and lb of each laminate chip 1, as shown in Fig. 4, to make contact with all of the internal electrode portions to provide a capacitor having an effective electrode area L1.
In the embodiment shown in Fig. 1, the length b of the electrode layers is shorter than the spacing between the crosssectional cutting planes D1 for separating the laminate into chips, and each cut end of all of the resulting chips occurs at the same place in the pattern of electrode layers B1, B2, B3 and B4. Further, all of the electrode layers overlap at the vertical cutting planes D1. In other words, the above laminate is vertically cut within the regions E shown in Fig. 3 in which all of the electrode layers B1, B2, B3 and B4 on the ceramic sheets A1, A2, A3 and A4 overlap. The electrode layers B1, B2, B3 and B4 of each of the capacitor chips obtained by cutting the laminate extend to the left and right end-faces la and lb, and they are discontinuous within the chip because of the spacings between the electrode layers in the patterns.
If the electrode layers are arranged in the laminate in the manner described above, the entire laminate is divided into identical capacitor chips having the same effective electrode area without waste so that production efficiency is improved.
Figs. 5 and 6 illustrate embodiments in which the displacement between the electrode layer patterns of adjacent layers differs from that of Figs. 1-4, thereby providing different effective areas for the capacitor electrodes resulting in different capacitance values. Assuming that the length L1 of the effective electrode area in the capacitor chip 1 shown in Figs. 3 and 4 is equal to one and provides a unit capacitance value, the length L2 of the effective electrode area of capacitor la shown in Fig. 5 is 2/3, providing a capacitance value equal to 0.67 and the length L3 of the capacitor lb in Fig. 6 is 1/3, providing a capacitance value of 0.33. It will be understood that the lengths of the overlap may have any other value which is less than the internal electrode length minus the internal electrode spacing.In this way, capacitors having a wide range of capacitance values can be obtained using the same number of ceramic sheets with the electrode layers formed in the same pattern.
If the number of electrode layers is changed using the method according to the present invention, it is not necessary to perform complicated operations, such as changing the pattern of electrode layers or using dummy layers, so that a desired capacitance value can be provided more precisely.
As described above, in accordance with the present invention, using a single pattern for the electrode layers and the same number of electrode layers, capacitors having any desired capacitance value within a wide range can be fabricated with no waste. According to the present invention, a desired displacement of the adjacent electrode layers can be accomplished within logs, and the area of a typical capacitor is 1.4 x 1.4 mm2.
Since a large number of capacitance values can be provided using electrode layers applied to the ceramic sheets with a single mask, the manufacturing operation can be standardized easily, thus providing a substantial improvement in management of capacitor production.

Claims (3)

1. A method of fabricating a multi-layer ceramic capacitor comprising: forming a laminate from a plurality of unfired ceramic sheets, each having substantially the same pattern of electrode layers which are alternately shifted in adjacent sheets to provide a desired electrode overlap; cutting the laminate at predetermined intervals at locations where the electrode layers overlap so that the laminate is divided into a plurality of capacitor chips with end-faces; firing the capacitor chips; and applying an electrode to each of the end-faces of the fired laminate chips.
2. A method according to claim 1, wherein the length of each electrode layer is shorter than the interval between adjacent cuts.
3. A method of fabricating a multi-layer ceramic capacitor substantially as hereinbefore described with reference to any of the examples shown in Figures 1 to 6 of the accompanying drawings.
GB9406165A 1993-06-07 1994-03-29 Method of manufacturing multi-layer ceramic capacitors Withdrawn GB2278957A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16399693A JPH06349675A (en) 1993-06-07 1993-06-07 Manufacture of multilayered ceramic capacitor

Publications (2)

Publication Number Publication Date
GB9406165D0 GB9406165D0 (en) 1994-05-18
GB2278957A true GB2278957A (en) 1994-12-14

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Family Applications (1)

Application Number Title Priority Date Filing Date
GB9406165A Withdrawn GB2278957A (en) 1993-06-07 1994-03-29 Method of manufacturing multi-layer ceramic capacitors

Country Status (2)

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JP (1) JPH06349675A (en)
GB (1) GB2278957A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1361498A (en) * 1970-08-31 1974-07-24 Illinois Tool Works Monolithic capacitor components and proc.for producing same
GB2084800A (en) * 1981-07-28 1982-04-15 Avx Corp Method of making marginless multi-layer ceramic capacitors
US5046236A (en) * 1989-10-11 1991-09-10 Murata Manufacturing Co., Ltd. Method of fabricating ceramic electronic component of multilayered type

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1361498A (en) * 1970-08-31 1974-07-24 Illinois Tool Works Monolithic capacitor components and proc.for producing same
GB2084800A (en) * 1981-07-28 1982-04-15 Avx Corp Method of making marginless multi-layer ceramic capacitors
US5046236A (en) * 1989-10-11 1991-09-10 Murata Manufacturing Co., Ltd. Method of fabricating ceramic electronic component of multilayered type

Also Published As

Publication number Publication date
JPH06349675A (en) 1994-12-22
GB9406165D0 (en) 1994-05-18

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