GB2247570A - Cross-mesh shielded P.C.B. - Google Patents
Cross-mesh shielded P.C.B. Download PDFInfo
- Publication number
- GB2247570A GB2247570A GB9114181A GB9114181A GB2247570A GB 2247570 A GB2247570 A GB 2247570A GB 9114181 A GB9114181 A GB 9114181A GB 9114181 A GB9114181 A GB 9114181A GB 2247570 A GB2247570 A GB 2247570A
- Authority
- GB
- United Kingdom
- Prior art keywords
- cross
- insulating layer
- printed circuit
- circuit board
- shield layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
- H05K1/0224—Patterned shielding planes, ground planes or power planes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K9/00—Screening of apparatus or components against electric or magnetic fields
- H05K9/0007—Casings
- H05K9/002—Casings with localised screening
- H05K9/0039—Galvanic coupling of ground layer on printed circuit board [PCB] to conductive casing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
- H05K1/0253—Impedance adaptations of transmission lines by special lay-out of power planes, e.g. providing openings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0707—Shielding
- H05K2201/0715—Shielding provided by an outer layer of PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09681—Mesh conductors, e.g. as a ground plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09772—Conductors directly under a component but not electrically connected to the component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Structure Of Printed Boards (AREA)
Abstract
A method of manufacturing a printed circuit board comprises forming conductive circuit patterns on one or both sides of insulating substrate 1, forming an insulating layer thereon, and adhering a cross-mesh shield layer 10 onto the whole or a required part of the insulating layer such that a margin 11 is placed both on the outer periphery of the insulating layer and around electric contacts such as lands 7, 8 and through-holes. Reduction of noise prevention at peripheral edges of the cross mesh layer is inhibited. <IMAGE>
Description
A METHOD OF MANUFACTURING A PRINTED CIRCUIT BOARD
The present invention relates to a method of manufacturing a printed circuit board having circuit patterns formed on one or both sides of an insulating substrate of the board and a shield layer overlaid on the circuit patterns.
As an example of a method of manufacturing a printed circuit board, there is known a method of manufacturing a printed circuit board having a shield layer formed on an overlaid insulating layer in order to shield circuit patterns formed on one or two sides of an insulating substrate of the board from electromagnetic noise coming from other circuit patterns formed on the board in the same way or external instruments. Such a known method is disclosed for example in Japanese Patent Publication
No. 29276/1980.
As shown in Figure 2 of the accompanying drawings, a printed circuit board manufactured by such a known method comprises an insulating layer 4 adhered onto a required part of a circuit pattern 2 formed on one side of an insulating substrate 1 by means of conductive material, a shield layer 5 adhered to a junction land 3 to maintain an electrical connection with a grounding circuit through the junction land 3, and a protecting film 6 formed to protect the shield layer 5.
Japanese Patent Publication No. 22885/1990 discloses another method of manufacturing a printed circuit board. As shown in Figure 3, a printed circuit board manufactured by this method has a cross-mesh shield layer 10 formed in place of the shield layer 5 of prescribed thickness shown in Figure 2.
When a cross-mesh shield layer 10 is formed according to the known method of manufacturing a printed circuit board, copper paste is applied by silk-screen printing. This method has the drawback, however, that the outer periphery of the shield layer 10 or that of lands 7 and 8 shows a discontinuity, as shown in Figure 3. As a result, the ability to prevent noise from electromagnetic waves is reduced in this discontinuous region.
When forming the shield layer 10, copper paste oozes from the outer periphery to the inside of the lands 7 and 8, and so causes defects.
The present invention seeks to eliminate the above disadvantage in the known method of manufacturing printed circuit boards by providing a method for manufacturing a printed circuit board with full exhibition of the proper effects of a cross-mesh shield layer.
The invention further seeks to prevent the oozing of copper paste from occurring at electric contacts such as through-holes and lands when the shield layer is adhered.
According to the invention, there is provided a method of manufacturing a printed circuit board which comprises an insulating substrate, circuit patterns made of a conductive material on one or both sides of the insulating substrate, an insulating layer formed on the circuit patterns, and a cross-mesh shield layer adhered onto the whole or a required part of the insulating layer in such a manner that a margin is placed both on the outer periphery of the insulating layer itself and around electric contacts such as lands and through-holes.
In the method of the invention, the action and effect intrinsic to the cross-mesh shield layer can be fully obtained. Furthermore, the formation of a cross-mesh shield layer in such a manner that a margin is placed both on the outer periphery of the insulating layer itself and around electric contacts such as lands prevents the reduction of noise prevention often experienced in discontinuous outer peripheral edges of cross-mesh shield layers or in the periphery of electrical contacts such as lands, thereby providing a noise-prevention effect equal to that of shield layers formed with a required thickness in the known method.
Providing a margin around the periphery of electrical contacts such as lands prevents conductive paste used to form the shield layer from oozing onto the contacts.
In order that the invention may be better understood, an embodiment thereof will now be described by way of example only and with reference to the accompanying drawings in which:
Figure 1 is an illustration showing a method of manufacturing a printed circuit board of the present invention; and
Figures 2 and 3 are illustrations showing the conventional methods of manufacturing a printed circuit board.
Referring to Figure 1, a circuit pattern (not shown) composed of conductive material is formed on one side of an insulating substrate 1 by means of the known method of the prior art.
After formation of the circuit pattern, an insulating layer (not shown) is adhered on the circuit pattern except on junction lands (not shown) connected to a grounding circuit and except on other electric contacts such as through-holes (not shown) and lands 7 and 8.
Then, a cross-mesh shield layer 10 is adhered to the insulating layer while margining (11) the peripheral edge of the shield layer 10 and the peripheries of the lands 7 and 8.
The shield layer 10 is formed by being connected to the junction land of the grounding circuit (not shown). Such a connection can be achieved by means of a conventional method, as by adhering and hardening copper paste using silk-screen printing.
Although Figure 1 shows the shield only partially adhered, it is possible to shield not only a required part but the whole surface of the circuit pattern in the printed circuit board. Moreover, adhering is not limited to a one-sided printed circuit board but also to a double-sided printed circuit board.
In place of the cross-mesh shield layer 10, the same type of shield layer can also be used.
The reference numeral 9 shows a mounting hole in the printed circuit board.
Claims (2)
1. A method of manufacturing a printed circuit board comprising an insulating substrate, said method comprising forming circuit patterns made of a conductive material on one or both sides of said insulating substrate, forming an insulating layer on said circuit patterns, and adhering a cross-mesh shield layer onto the whole or a required part of said insulating layer in such a manner that a margin is placed both on the outer periphery of said insulating layer itself and around electric contacts such as lands and through-holes.
2. A method as claimed in claim 1, substantially as hereinbefore described.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19197790A JPH0478197A (en) | 1990-07-20 | 1990-07-20 | Manufacture of printed circuit board |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9114181D0 GB9114181D0 (en) | 1991-08-21 |
GB2247570A true GB2247570A (en) | 1992-03-04 |
GB2247570B GB2247570B (en) | 1994-07-20 |
Family
ID=16283586
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9114181A Expired - Fee Related GB2247570B (en) | 1990-07-20 | 1991-07-01 | A method of manufacturing a printed circuit board |
Country Status (2)
Country | Link |
---|---|
JP (1) | JPH0478197A (en) |
GB (1) | GB2247570B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19524930C2 (en) * | 1995-07-08 | 1998-10-29 | Gunter Dipl Ing Langer | Arrangement for reducing the electromagnetic radiation from printed circuit boards |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3329750A4 (en) * | 2015-07-30 | 2018-08-22 | Laird Technologies, Inc. | Frequency selective structures for emi mitigation |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2011190A (en) * | 1977-12-22 | 1979-07-04 | Licentia Gmbh | Connection board |
EP0238267A2 (en) * | 1986-03-13 | 1987-09-23 | Nintendo Co. Limited | Printed circuit board capable of preventing electromagnetic interference |
JPH0222885A (en) * | 1988-07-12 | 1990-01-25 | Cmk Corp | Manufacture of printed board |
-
1990
- 1990-07-20 JP JP19197790A patent/JPH0478197A/en active Pending
-
1991
- 1991-07-01 GB GB9114181A patent/GB2247570B/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2011190A (en) * | 1977-12-22 | 1979-07-04 | Licentia Gmbh | Connection board |
EP0238267A2 (en) * | 1986-03-13 | 1987-09-23 | Nintendo Co. Limited | Printed circuit board capable of preventing electromagnetic interference |
JPH0222885A (en) * | 1988-07-12 | 1990-01-25 | Cmk Corp | Manufacture of printed board |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19524930C2 (en) * | 1995-07-08 | 1998-10-29 | Gunter Dipl Ing Langer | Arrangement for reducing the electromagnetic radiation from printed circuit boards |
Also Published As
Publication number | Publication date |
---|---|
GB9114181D0 (en) | 1991-08-21 |
JPH0478197A (en) | 1992-03-12 |
GB2247570B (en) | 1994-07-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 19950701 |