GB2246054A - Digital communications equipment test method - Google Patents

Digital communications equipment test method Download PDF

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Publication number
GB2246054A
GB2246054A GB9027261A GB9027261A GB2246054A GB 2246054 A GB2246054 A GB 2246054A GB 9027261 A GB9027261 A GB 9027261A GB 9027261 A GB9027261 A GB 9027261A GB 2246054 A GB2246054 A GB 2246054A
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digital
analogue
test
signal
interface
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GB9027261A
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GB9027261D0 (en
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Keith Smith
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TUV Sud Services UK Ltd
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TUV Sud Services UK Ltd
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Publication of GB9027261D0 publication Critical patent/GB9027261D0/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/24Testing correct operation
    • H04L1/242Testing correct operation by comparing a transmitted test signal with a locally generated replica
    • H04L1/243Testing correct operation by comparing a transmitted test signal with a locally generated replica at the transmitter, using a loop-back

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

The invention provides a method of and apparatus for making a Bit Error Rate measurement test. e.g. in a CT2 telephone system, which comprises generating a series of digital words in a computer 1 converting the words in a converter 3 to a first analogue signal, transmitting the analogue signal into a first analogue interface of the instrument 4 under test such that the signal will pass from a transmitter to a receiver part 6 of the digital system. The received signal is then converted at a second analogue interface to a second analogue signal, the said second signal is converted to a second digital word series and this is compared in the computer 1 to the first digital word series to determine the instrument Bit Error Rate. The method is applicable to other digital communications equipment, e.g. compact disc players. <IMAGE>

Description

DIGITAL COMMUNICATIONS EQUIPMENT TEST METHOD This invention relates to a digital communications equipment test method. It relates particularly to an equipment test method and to apparatus for carrying out this method.
One kind of digital communications equipment is that intended for a cordless telephone system where digital rather than analogue signalling standards are used. The digital system can allow transmission of a good speech quality and it also permits a confidential communications channel to be maintained. One telephone system which has recently been proposed for international purposes makes use of what is termed the CT2 Common Air Interface specification (MPT1375).
In the CT2 system, where the means of communication between the telephone Cordless Fixed Part (CFP) and Cordless Portable Part (CPP) is basically digital, and where the input is an analogue signal, a problem can arise as to how the instrument sensitivity is to be defined. There are methods already known for measuring the sensitivities of a wholly analogue and of a wholly digital system. For the wholly digital system, a Bit Error Rate measurement method would be used.
Bit Error Rate (BER) measurements can be carried out on digital communications equipment in order to assess the quality of a signal link or in order to provide a base line measurement from which the effects of any interference or reduced signal strength conditions may be assessed in a repeatable way. These techniques are widely known for use in totally digital environments.
To date, the manufacturers of CT2 Telephones (Second Generation Cordless Telephones) have had to carry out these tests in accordance with a Department of Trade and Industry (DTI) specification by breaking in to the internal circuit of the telephone instrument and injecting test signals. However, this practice is not really acceptable for regulatory purposes and in addition, it is likely to preclude the possibility of manufacturing a single chip telephone instrument by a semiconductor Large Scale Integration (LSI) process.
There does not appear to have been any need as yet to carry out the test by making use of the telephone handset analogue interfaces.
An object of the present invention is therefore to provide a means of testing digital communications equipment, where the testing process is effected via an analogue interface of the equipment.
According to the present invention, in apparatus for a digital communications system, a test method for a Bit Error Rate measurement test comprises (a) providing a test unit capable of generating a series of digital words constituting primary test signals, (b) passing the test signal through a digital part of the circuit under test and into a digital-to-analogue interface of the apparatus thus converting the received signal to analogue form, (c) returning the received signal to the test unit for conversion to digital form and comparison with the original series of digital words, the said comparison providing a measurement of the apparatus Bit Error Rate.
Preferably, where access to a digital part of the circuit may be made only through an analogue-to-digital interface of the circuit, the method after generating the primary test signals comprising the further steps of converting the digital words to a first analogue signal, transmitting said analogue signal into an analogue side of the analogue-to-digital interface of the apparatus under test, the interface thus converting the test signal again into digital form for steps (b) and (c).
According to another aspect, there is provided a method of making a Bit Error Rate measurement test in a telephone instrument of a digital communications system, the method comprising the steps of generating a series of digital words for providing test signals, converting the said digital words to a first analogue signal, and transmitting said analogue signal into a first analogue interface of the instrument under test such that the signal will pass from a transmitter to a receiver part of the digital system, converting the received signal at a second analogue interface to a second analogue signal, converting said second analogue signal to a second digital word series and comparing said first and said second digital word series to provide a measurement of the instrument Bit Error Rate.
The invention also comprises apparatus for carrying out the Bit Error Rate measurement test. The apparatus may comprise a digital computer, a digital-to-analogue converter, an analogue-to-digital converter, two variable gain audio frequency amplifiers, a direct current source and a program for the computer.
In simple terms the computer generates a digital word which is converted to an analogue signal, this signal is level adjusted - by the first amplifier and fed into the unit to be tested, this unit transmits the signal in the normal way to a standard receiver unit under test.
The output-of this receiver unit is fed via the second amplifier, together with any direct current component required to the analogue-to-digital converter which in turn is fed back to the computer. The computer, under the control of its specific program then analyses the data to produce the result.
By way of example, some particular embodiments of the invention will now be described with reference to the accompanying drawing, in which: Figure 1 is a block diagram of a first test circuit arrangement, and, Figure 2 is a similar diagram of a second test circuit arrangement.
Considering a telephone system such as the CT2 system, in order to measure the Bit Error Rate it must be possible to inject a known digital signal and compare that signal to the received signal to identify errors arising. This is obviously not directly possible when only an analogue input interface can be used.
INFERRED BIT ERROR RATE In any system that has an analogue input and digital output there will be a fixed number of quantization steps available dependant on the analogue-to-digital process used. For the CT2 system this is 256 as an eight bit codec is used. Thus, any one value of an analogue signal will be represented by one of the 256 eight bit words. If this original analogue signal was itself derived via an eight bit D/A system then the number of encoded bits to create the analogue value will equal the number of bits created by the A/D output, but the digital code word may not equal the original in numerical value, for example: input word analogue value output word to D/A out of D/A from A/D 10101010 4.825V 10101000 No. of bits = 8 No. of bits = 8 denary = 170 denary = 168 This discrepancy may arise from differing bias or amplitude conditions.
Extending this principle over a fixed time T for a varying analogue signal it is clear that the total number of bits for both input and output will be the same and be given by the following: number of bits total = 8xTx sample rate However, as in the above the instantaneous digital values of the words may be different. But providing the encoding system is stable the differences will be consistent. For example, the same output code will be given for the same input code.
Given the relationship described above, it provides a means by which the errors due to systematic effects in a strong signal environment may be separated from the random errors in a low signal strength or interference situation of a digital system which is enclosed in an analogue medium.
TWO METHODS OF ANALYSIS (1) By Direct Use of Relationship Since a relationship has been established, with some exceptions (see description later of the implementation problems) a unique code will, be generated for each unique input code. Therefore, it should be possible, by using computing techniques, to calculate the error rate by comparing the output code detected with that expected given the input word.
This method has the advantage of making use of the majority of the transmitted bits to determine the error rate, for example low redundancy, but would suffer the disadvantage of being susceptible to systematic errors that have an equal or nearly equal probability of giving two or more possible solutions. An example of such an error would be an error in the least significant bit due to an analogue value falling between two quantization steps, another would be the error produced by very fast rising or falling edges in the waveform here the value of sample would vary greatly with a very small change in time. Such an approach would also be susceptible to errors if the waveforms for analogue input and analogue output were not of similar magnitude.
(2) By Selective Use Of The Relationship After Equating The Waveforms.
This technique relies on initially equating the waveforms by adjusting the phase, DC level and AC amplitude of the input and output analogue waveforms such that the majority of input code did equate numerically with the instantaneous value of the output code.
Thus leaving only systematic errors due to distortion of the analogue waveforms which would be periodic in nature.
Computing techniques would then be employed to ignore bits that give a consistent repeating error whilst the transmission system is maintained in a strong signal condition. This technique could potentially have a high number of bits ignored for calculation purposes, but it does go some way to overcome the main disadvantages of the first form of analysis.
PROBLEMS OF IMPLEMENTATION Some of the problems with the practical implementation of such a method of Bit Error Rate measurement have already been mentioned, however some explanation of these and other possible problems may be helpful.
(1) The problem of not equating the size of the analogue input and output waveforms would lead to an increase in the probability of false errors being detected as random errors, when they are in fact systematic and likely arise from the difference in quantization points on the waveform. A simpler way of thinking about this problem is perhaps to consider the input waveform as being encoded by the full range of the eight bit system, for example 256 bits to an analogue range of 0-5 volts but being re-encoded at the receiving end from a similar signal of, say, 0-1 volt and therefore being encoded over the range of 20% of the A/D encoder, then the number of discrete levels drops to 51. Hence, five input codes would be translated into a single output code.
(2) The problem of the occurrence of fast rising and falling edges is mainly a problem for the first method of analysis as the second method should be able to remove this type of error from its calculation if sufficient waveform cycles are run as to enable the program to detect the random error. However this problem can be reduced down to a minimum by a careful selection of the test waveform to be used.
(3) Phase differences between input and output are again a source of problems as errors may occur if an input word is compared with an earlier output word. Although phase differences may be easily dealt with by additional programming to allow an offset to be programmed in to cope with any delay.
(4) An error due to the least significant bit steps, for example a quantization error, is easily dealt with by ignoring the least significant bit for calculation purposes. Errors that occur because of sensitivity or interference on the RF link will be evenly distributed across from least to most significant bit. Although the greater the number of bits that are ignored for making the calculation will increase the time it will take to measure the Bit Error Rate.
(5) In a practical system, an error occurring in the most (or greatest) significant bits may not be detected as a single error as the affects of a band limited signal and of non synchronous operation between the artificial digital environment and the true digital link may cause a word error. For example: Consider the code word 10000000 which in an encoding system running from 00000000 to 1111111111 would equate to roughly mid point on the analogue scale. If the most significant bit is the subject of the error on the link the received word will be 00000000 or zero on the analogue scale.But since the digitizing analogue to digital converter is not synchronized to the digital link, the artificial encoded word may be sampled on the falling edge of the analogue signal and hence be encoded as some value between 10000000 and 00000000 and at worst case as 01111111 and hence it will register as seven errors instead of a single error.
The proposed solution is to not count errored bits from the table but errored words, excluding of course the bits that would be errored due to systematic errors. The justification for doing so in the case of CT2 is as follows: The receiver tests in a CT2 system are based on a count of a single error in one thousand, therefore the probability of an error occurring in any one word is 1000/8 = one in 125. The probability of an error occurring in an already errored word or to put it another way, the probability of two errors occurring in one word is 1/125 x 1/125 which equals one in 15625, for three errors it becomes one in 1953125 and so on. There is therefore a very small inaccuracy introduced by assuming that each errored word was brought about by a single error.
SELECTION OF WAVEFORM Whilst in theory the method should work for most analogue waveforms, advantages can be gained by using a selected waveform.
A sine wave at a frequency within the passband may seem the simplest choice but since the rate of change of signal varies and is infinite at the zero point, such a waveform may give rise to errors. Another possibility would be to use a triangular wave having a frequency low in the passband of the audio channel as the spectral content of a triangular wave falls away quickly (Fourier : cos wt + 1/9cos 3wt + 125cos 5wt. . .). Therefore a reasonable quality triangular wave could be passed by a bandlimited communication system and the rate of change at any point other than at the wave peaks is constant.
The computer is used to generate a series of code for the input, to acquire the output and to compare.
This allows a processing time of only 125 microseconds between reading one digital word and the next word being available for reading, which is probably an input rate too fast for most personal computers to accept. The method to be employed therefore is to clock out the digital pattern and store the incoming data to disk such that a separate operation can be used to post process the data.
The computer is additionally arranged to act as a master clock pulse generator for the A/D converters.
The computer program therefore has to have the following minimum blocks of code.
(1) Code that can generate the input data for a digital to analogue converter, and which when encoded and clocked out produces the desired waveform, at the correct frequency on the output of the converter.
(2) Code that can read in and store the eight bit words being generated in real time from the analogue to digital converter (input frame).
(3) Code that can compare the two digital patterns and from input of frequency, can seek out patterns in the errored data, tag these errored blocks for reference and allow manual input of operator suggested blocks to ignore. (Reference frame).
(4) Code to compare the reference frame as generated in (3) to the data acquired in the test mode, outputting the data in the form of bits used for calculation, total number of bits read and number of errors detected outside those masked in the reference frame.
The working implementation would have the unit set up as in the block diagram of Figure 1. An initial test run would serve to minimise the errors by matching the waveforms as described earlier, a second run would be used to generate the reference frame which is carried out in strong, non interfered signal conditions and a final run would create the test frame in the presence of weak signal or interference conditions.
As depicted in Figure 1, the block diagram shows a computer 1 which is connected at the left hand side by an eight-bit output line 2 to a digital-to-analogue converter 3.
An analogue output from the converter 3 is applied to an analogue interface of a cordless portable telephone part 4 of a telephone unit which is to be tested. At the right hand side of the computer 1, a further eight-bit output line 2 connects an analogueto-digital converter 3 and this is coupled through a second analogue interface to-a cordless fixed part 6 of the telephone unit.
The cordless portable part 4 and the cordless fixed part 6 are the two integers which together form the telephone unit under test.
The communication between these integers takes place through radio aerials 7 by means of digital radio frequency signals.
These digital radio frequency signals are of course generated by and processed by the telephone cordless portable part 4 and cordless fixed part 6 and each of these parts has its own integral analogue interface so that a normal telephone conversation can be held by the user. The digital RF signals are thus transmitted and received across the space A between the aerials 7.
The signals delivered to and received from the unit under test are analogue signals and these are present across the space B in the circuit. The analogue signals are derived from and are converted to digital signals for the computer and the digital signals are thus present across the space C in the circuit. The digital signals thus act to infer a Bit Error Rate measurement onto the digital RF link between the two integers of the unit under test.
Figure 2 shows a modified circuit where the RF transmission between the aerials takes place in a screened room. The components of the circuit, where they are the same as those of Figure 1, have been given corresponding reference numerals.
The computer 1 is connected to a first digital-to-analogue converter 3 and from there to the cordless portable part 4 of the telephone unit to be tested. The cordless portable part 4 has an aerial 7 which is located in a screened room 8.
The screened room 8 also accommodates a second aerial 7 which is coupled to the cordless fixed part 6 of the telephone unit under test. The cordless fixed part 6 has an audio output lead 9 and on audio input lead 11 and both of these are connected to an audio loopback circuit 12. The purpose of the circuit 12 is to redirect output signals from the cordless fixed part 6 back into the input of that unit and they are then transmitted to the cordless portable part 4 from where they are directed through an analogue-to-digital converter 3 back to the computer 1. The computer can therefore compare the signals transmitted and received in order, as before, to make the required test.
The embodiment of Figure 2 is also capable of being used in an alternative way where the block 4 instead of being a part of the telephone under test is formed by components which are permanently incorporated in the test equipment. This modification allows the digital word test signal to be injected directly into block 4 as a digital signal so that no intermediate conversion to an analogue signal will be needed. In this embodiment, therefore, the analogueto-digital converter 3 may not be necessary.
The foregoing description of an embodiment of the invention has been given by way of example only, and a number of modifications may be made without departing from the scope of the invention as defined in the appended claims. For instance, the invention is not restricted to the testing of cordless telephone equipment and alternative digital communications equipment such as compact disc players can also benefit by being put through the testing procedure.

Claims (9)

1. In apparatus for a digital communications system, a test method for a Bit Error Rate measurement test comprises (a) providing a test unit capable of generating a series of digital words constituting primary test signals, (b) passing the test signal through a digital part of the circuit under test and into a digital-to-analogue interface of the apparatus thus converting the received signal to analogue form, (c) returning the received signal to the test unit for conversion to digital form and comparison with the original series of digital words, the said comparison providing a measurement of the apparatus Bit Error Rate.
2. A test method as claimed in claim 1, where access to a digital part of the circuit may be made only through an analogue-to-digital interface of the circuit, the method after generating the primary test signals comprising the further steps of converting the digital words to a first analogue signal, transmitting said analogue signal into an analogue side of the analogue-to-digital interface of the apparatus under test, the interface thus converting the test signal again into digital form for steps (b) and (c).
3. A test method as claimed in claim 1 or 2, in which the digital communications apparatus is a telephone instrument including a digital-to-analogue converter.
4. A method of making a Bit Error Rate measurement test in a telephone instrument of a digital communications system, the method comprising the steps of generating a series of digital words for providing test signals, converting the said digital words to a first analogue signal, and transmitting said analogue signal into a first analogue interface of the instrument under test such that the signal will pass from a transmitter to a receiver part of the digital system, converting the received signal at a second analogue interface to a second analogue signal, converting said second analogue signal to a second digital word series and comparing said first and said second digital word series to provide a measurement of the instrument Bit Error Rate.
5. A test unit for carrying out a Bit Error Rate measurement test as claimed in claim 4, the apparatus comprising a digital computer, a digital-to-analogue converter, an analogue-to-digital converter, two variable gain audio frequency amplifiers, a direct current source and a program for the computer.
6. A test method as claimed in claim 3, in which the digital communications apparatus is a cordless telephone instrument with an associated radio frequency link to a telephone cordless fixed part.
7. A test unit for a test method as claimed in any one of claims 1, 2, 3 and 6.
8. A test unit substantially as hereinbefore described with reference to the accompanying drawing.
9. A test method substantially as hereinbefore described.
GB9027261A 1990-07-12 1990-11-21 Digital communications equipment test method Withdrawn GB2246054A (en)

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GB909015361A GB9015361D0 (en) 1990-07-12 1990-07-12 Cordless telephone testing system

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GB2246054A true GB2246054A (en) 1992-01-15

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GB9027261A Withdrawn GB2246054A (en) 1990-07-12 1990-11-21 Digital communications equipment test method

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004030903A1 (en) * 2004-03-18 2005-10-06 Signalion Gmbh Arrangement for testing components e.g. for wireless communication system, has interfaces of receiver and transmitter connected to standard interfaces

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1437393A (en) * 1972-07-31 1976-05-26 Westinghouse Electric Corp Digital data transmission system
EP0145605A2 (en) * 1983-12-12 1985-06-19 Digital Equipment Corporation Analog signal verification circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1437393A (en) * 1972-07-31 1976-05-26 Westinghouse Electric Corp Digital data transmission system
EP0145605A2 (en) * 1983-12-12 1985-06-19 Digital Equipment Corporation Analog signal verification circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004030903A1 (en) * 2004-03-18 2005-10-06 Signalion Gmbh Arrangement for testing components e.g. for wireless communication system, has interfaces of receiver and transmitter connected to standard interfaces

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GB9027261D0 (en) 1991-02-06
GB9015361D0 (en) 1990-08-29

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