KR100195645B1 - Method for detecting the code-data in remote controller signal - Google Patents

Abstract

The present invention relates to a method for detecting code data of a remote control signal for detecting code data included in a remote control signal received and converted to an asynchronous transmission mode. Next, it is configured to detect the code data by determining whether the ID is stored.

That is, if it is determined that the data stored in the first buffer and the third buffer is an ID, and the data stored in the second buffer is not an ID, the data stored in the second buffer is detected as code data, and the first If the data stored in the buffer and the third buffer are not IDs, and the data stored in the second buffer is an ID, the data stored in the second buffer is detected as code data. When the data stored in the first buffer, the second buffer, and the third buffer are all determined by ID, the data stored in the second buffer is detected as code data, and the data stored in the first buffer has an ID. If the data stored in the second buffer and the third buffer is an ID, the data stored in the third buffer can be detected as code data, so that the operation according to the remote control transmitted from a remote site can be performed quickly and accurately. Provide effect.

Description

Code data detection method of remote control signal

1 is a schematic block diagram of a receiving apparatus for performing a code data detection method of a remote control signal according to the present invention;

2 is a flowchart illustrating an operation process of detecting code data included in a remote control signal according to a preferred embodiment of the present invention.

3 is a signal waveform diagram of a typical remote control signal,

4 is a view for explaining a remote control signal of the asynchronous transmission mode.

* Explanation of symbols for main parts of the drawings

110: signal synthesizing unit 120: counter

130,132,134,136: comparison unit 140: flip-flop

150: S / P converter 160: clock generator

170: P / S converter

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for detecting code data of a receiver for remote control employed in office equipment or A / V (hereinafter abbreviated as A / N) equipment, and more particularly, to a remote controller (REMOTE CONTROLLER; Remote control that can detect the code data contained in the remote control signal (commonly called infrared signal output from the infrared transmitter of the remote controller, hereinafter referred to as remote control signal) from the remote controller. The present invention relates to a method for detecting code data of a signal.

Typically, various office devices (eg, computers, faxes, etc.) or A / V devices (eg, TVs, V-Cells, etc.) have various switches for allowing a user to directly control or operate the device. It is provided on the panel. However, in recent years, as a part of a method for further improving user convenience in response to a user's need, a system for enabling remote control by a remote controller has been adopted for such various office devices and A / V devices. have.

That is, the various devices as described above receive a remote control signal transmitted from a remote control of the remote location and decodes it into a control signal capable of signal processing, and then the CPU (CENTRAL PROCESSING UNIT) built in the device to perform the corresponding function (Hereinafter abbreviated as CPU).

Therefore, a control signal received and decoded through the remote control signal receiving device, for example, a volume control signal, a channel adjustment signal, a screen color adjustment signal in the case of a television, is provided to the CPU of the device, and is based on the control signal from the CPU. The device will then perform the desired function.

On the other hand, as shown in Figure 3, the remote control signal is composed of large details, that is, SYNC (a), ID (IDENTIFICATION; abbreviated as ID, b) and code data (CODE-DATA, c) The sink (a) marks the starting point for interpreting the signal, and only after it is found, the sink (a) can interpret the subsequent ID (b) and code data (c).

At this time, in analyzing the ID (b) and the code data (c), it is determined as 1 when the low level period (DURATION) of the pulse is 1.5 msec, and 0 when the low level period of the pulse is 0.5 msec. ID (b) and code data (c) have different values for each company.

Accordingly, an object of the present invention is to provide a code of a remote control signal for fast and accurate detection of code data contained in a remote control signal upon receiving a remote control signal having code data and IDs set differently for each company as described above. It is to provide a data detection method.

In order to achieve the above object, the present invention provides a method for detecting code data included in a remote control signal converted to an asynchronous transmission mode, wherein the remote control signal converted to the asynchronous transmission mode is stored in three buffers in units of 1 byte. A first step of storing and then checking whether the data stored in the three buffers are IDs; If the data stored in the first buffer among the three buffers is an ID, and the data stored in the second buffer is not an ID and the data stored in the third buffer is an ID, the data stored in the second buffer is stored. A second step of detecting with the code data; If the data stored in the first buffer among the three buffers is not an ID, the data stored in the second buffer is an ID, and the data stored in the third buffer is not an ID, the data is stored in the second buffer. A third step of detecting data that has been written as the code data; A fourth step of detecting data stored in the second buffer as the code data if the data stored in the first buffer, the second buffer, and the third buffer among the three buffers are IDs; A fifth data which detects the data stored in the third buffer as the code data when the data stored in the first buffer is not an ID and the data stored in the second and third buffers is an ID among the three buffers. Provided is a method for detecting code data of a remote control signal, comprising the steps.

The above and other objects and various advantages of the present invention will become more apparent from the preferred embodiments of the present invention described below with reference to the accompanying drawings by those skilled in the art.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a schematic block diagram of a receiving apparatus for performing a code data detection method of a remote control signal according to the present invention, a signal synthesizing unit 110, a counter 120, a comparator 130, 132, 134, and 136. , Flip-flop 140, S / P converter (SERIAL TO PARALLEL converter; abbreviated as S / P converter, 150), the clock generator 160 and P / S converter (PARALLEL TO SERIAL converter; Hereinafter abbreviated as P / S conversion unit, 170).

In the same figure, the signal synthesizing unit 110 provides a synthesized signal obtained by synthesizing the remote control signal and the sampling clock CLK provided from the outside to the counter 120, and the counter 120 is provided from the signal synthesizing unit 110. The number of clocks of the sampling clock CLK is counted among the synthesized signals provided and provided to each of the comparison units 130, 132, 134, and 136. Such a counter 120 is provided from the first comparison unit 130 to be described later. The reset signal is reset based on the reset signal.

In addition, the first comparison unit 130 compares the number of clocks counted by the counter 120 with a predetermined value A, and when the number of clocks counted by the counter 120 reaches a predetermined value A, A reset signal for resetting the counter 120 is generated, and the second comparator 132 compares the number of clocks counted by the counter 120 with a predetermined value B and counts the clocks counted by the counter 120. When the number reaches a predetermined value B, a zero discrimination signal is generated and provided to the one input terminal of the flip-flop 140.

Here, the predetermined predetermined value A means the number of sampling clocks in which the high level period of the pulse corresponds to 8 msec during the sync a of the remote control signal shown in FIG. 3, and the predetermined predetermined value B is the third value. The low level period of the pulse in the remote control signal shown in FIG. Means the number of sampling clocks corresponding to 0.5 msec.

The third comparison unit 134 compares the number of clocks counted by the counter 120 with a predetermined value C, and zeros when the number of clocks counted by the counter 120 reaches a predetermined value C. The discrimination signal is provided to the other input terminal of the flip-flop 140, and the fourth comparator 136 compares the number of clocks counted by the counter 120 with a predetermined value D and counts the counted by the counter 120. When the number of clocks reaches the predetermined value D, an INT signal for generating an interrupt (INTERRUPT; hereinafter abbreviated as INT) is generated.

Here, the predetermined predetermined value C means the number of sampling clocks in which the low level period of the pulse corresponds to 1.5 msec among the remote control signals shown in FIG. 3, and the predetermined predetermined value D is the remote control shown in FIG. The low level period of the pulse in the signal means the number of sampling clocks corresponding to 4 msec.

Meanwhile, the flip-flop 140 provides 0 to the S / P converter 150 based on the zero discrimination signal provided from the second comparator 132 to the one input terminal of the flip-flop 140. 1 is provided to the S / P converter 150 based on the zero discrimination signal provided from the unit 134 to the other input terminal of the flip-flop 140.

In FIG. 1, the S / P converter 150 converts data output in series from the flip-flop 140 into 8-bit parallel data, and the clock generator 160 transfers data between CPUs of different devices. To generate a clock based on a predetermined board rate (BOARD RATE) generates a clock, the P / S converter 170 is based on the clock speed provided from the clock generator 160, S / P converter 150 Converts 8-bit parallel data converted into serial and outputs it.

Here, the 0 and 1 serial data provided from the flip-flop 140 is converted into 8-bit parallel data through the S / P converter 150, and then serialized again through the P / S converter 170. The reason for converting the data into the data is the asynchronous transmission as shown in FIG. 4, which is a communication protocol used for serial communication of a computer or a modem, as shown in FIG. This is for converting to a remote control signal of a mode.

An operation process of the code data detection method of the remote control signal according to the present invention, which includes the above-described constituent members, will be described in more detail with reference to FIGS. 1 and 2.

First, the remote control signal transmitted from the remote site is typically transmitted to the receiving device by repeatedly transmitting the remote control signal at a period of 60 msec, as shown in FIG.

Then, the remote control signal received from the receiving device and the sampling clock CLK provided from the outside are synthesized through the signal synthesizing unit 110, and the synthesized synthesized signal is provided to the counter 120.

In addition, the sampling clock CLK is counted through the counter 120 among the synthesized signals synthesized by the signal synthesizing unit 110, and thus, the first comparator 130, the second comparator 132, and the third comparator 134. And the fourth comparator 136, respectively.

At this time, when the number of clocks counted through the counter 120 is a predetermined value A, in detail, the number of sampling clocks corresponding to 8 msec. A reset signal for resetting the counter 120 is generated from 130, and the counter 120 is reset based on the reset signal from the first comparator 130.

When the number of clocks counted through the counter 120 is a predetermined value D, in detail, the number of sampling clocks corresponding to 4 msec in the low level period of the pulse in the remote control signal, the fourth comparator ( An INT signal is generated from 136, and the CPU not shown based on the INT signal from the fourth comparator 136 performs an interrupt processing routine and initializes the communication line (step 205).

On the other hand, when the number of clocks counted by the counter 120 is a predetermined value B, specifically, the number of sampling clocks corresponding to the low level period of the pulse in the remote control signal corresponding to 0.5 msec, the second comparator 132 A zero discrimination signal is generated and provided to one input terminal of the flip-flop 140, and the number of clocks counted by the counter 120 is preset to a predetermined value (C). When the number of sampling clocks corresponding to 1.5 msec is reached, a zero discrimination signal is generated from the third comparison unit 134 and provided to the other input terminal of the flip-flop 140.

At this time, if the zero discrimination signal from the second comparator 132 is provided to one input terminal of the flip-flop 140, 0 from the flip-flop 140 is provided to the S / P converter 150, and the third When the zero discrimination signal from the comparator 134 is provided to the other input terminal of the flip-flop 140, 1 is provided from the flip-flop 140 to the S / P converter 150.

Then, serial data of 0 and 1 provided from the flip-flop 140 is converted into 8-bit parallel data through the S / P converter 150, and then the clock speed provided from the clock generator 160 is provided. The P / S conversion unit 170 converts the data into serial data and outputs the data.

Next, the CPU not shown sets three buffers B1, B2, and B3 in order to detect code data in the remote control signal converted to the asynchronous transmission mode through the receiving apparatus (step 210). The data output from the converter 170 is stored in units of 8 bits, that is, 1 byte (BYTE).

In detail, the first data output from the P / S converter 170 is stored in the buffer B1 (step 215), and the second data output from the P / S converter 170 is stored in the buffer B2 (step 220). ), The third data output from the P / S converter 170 is stored in the buffer B3 (step 225).

On the other hand, since the ID of the device is set in advance according to the model for each company, the ID can be easily determined.

Therefore, the CPU checks whether the data stored in the buffer B1 is ID (step 230) and stores the buffer data in order to detect code data among the data stored in the three buffers B1, B2, and B3, respectively. If the data is ID, it is checked whether the data stored in the buffer B2 is ID (step 235).

As a result of the check in step 235, if the data stored in the buffer B2 is ID, it is checked whether the data stored in the buffer B3 is an ID (step 240), and if the data stored in the buffer B2 is not the ID, It is checked whether data stored in the buffer B3 is ID (step 245).

On the other hand, if the data stored in the buffer B3 is the ID as a result of the check in step 240, the data stored in the buffer B2 is detected as code data (step 250). If the data stored in the buffer B3 is not the ID, the data will be described later. The process returns to step 270 to be performed again from step 230.

At this time, step 270 stores the data stored in the buffer B2 into the buffer B1, stores the data stored in the buffer B3 in the buffer B2, and then outputs the fourth output from the P / S conversion unit 170. The data is stored in buffer B3.

Here, the reason for performing the step 270 is to prevent wrong detection of the code data due to an error that may occur in the process of switching to the asynchronous transmission mode.

On the other hand, if the data stored in the buffer B3 is the ID as a result of the check in the step 245, the data stored in the buffer B2 is detected as code data, and if the data stored in the buffer B3 is not the ID, step 270 Returning to), the process is performed again from the step 230.

Next, as a result of the check in step 230, if the data stored in the buffer B1 is not an ID, it is checked whether the data stored in the buffer B2 is an ID (step 255).

As a result of the check in step 255, if the data stored in the buffer B2 is not the ID, the process returns to step 270 and is executed again from step 230. If the data stored in the buffer B2 is the ID, the data is stored in the buffer B3. It is checked whether or not the given data is ID (step 260).

At this time, if the data stored in the buffer B3 is an ID as a result of the check in step 260, the data stored in the buffer B3 is detected as code data (step 265), and if the data stored in the buffer B3 is the ID, Data stored in the buffer B2 is detected as code data (step 250).

As described above, the data output from the P / S converter 170 is stored in three buffers B1, B2, and B3 for each byte, and then the data stored in the buffers B1, B2, and B3 are IDs. If the data stored in the buffer B1 is the ID, the data stored in the buffer B2 is not the ID, and the data stored in the buffer B3 is the ID, the data stored in the buffer B2 is detected as code data. If the data stored in the buffer B1 is not ID, the data stored in the buffer B2 is the ID, and the data stored in the buffer B3 is not the ID, the data stored in the buffer B2 is detected as code data.

If the data stored in the buffer B1 and the buffer B2 is ID, and the data stored in the buffer B3 is the ID, the data stored in the buffer B2 is detected as code data, and the data stored in the buffer B1 is the ID. If the data stored in the buffers B2 and B3 is ID, the data stored in the buffer B3 is detected as code data.

Therefore, by using the present invention, it is possible to accurately detect code data contained in the remote control signal converted into the asynchronous transmission mode through the receiving apparatus at high speed.

Claims (1)

A method of detecting code data included in a remote control signal converted to an asynchronous transmission mode, the method comprising: storing the remote control signal converted to the asynchronous transmission mode in three buffers in units of 1 byte, and then storing the three data in the three buffers A first step of checking whether the existing data is an ID; The code data is stored in the second buffer when the data stored in the first buffer is an ID, the data stored in the second buffer is not an ID, and the data stored in the third buffer is an ID. Detecting by a second step; If the data stored in the first buffer among the three buffers is not an ID, and the data stored in the second buffer is an ID, and the data stored in the third buffer is not an ID, the data stored in the second buffer is stored. Detecting by the code data; A fourth step of detecting data stored in the second buffer as the code data when the data stored in the first buffer, the second buffer, and the third buffer among the three buffers are IDs; And a fifth step of detecting data stored in the third buffer as the code data when the data stored in the first buffer among the three buffers is not an ID and the data stored in the second and third buffers is an ID. Code data detection method of the remote control signal, characterized in that.