GB2183960A - Synchronizing signal generating apparatus for PAL system - Google Patents
Synchronizing signal generating apparatus for PAL system Download PDFInfo
- Publication number
- GB2183960A GB2183960A GB08627164A GB8627164A GB2183960A GB 2183960 A GB2183960 A GB 2183960A GB 08627164 A GB08627164 A GB 08627164A GB 8627164 A GB8627164 A GB 8627164A GB 2183960 A GB2183960 A GB 2183960A
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- frequency
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/44—Colour synchronisation
- H04N9/45—Generation or recovery of colour sub-carriers
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Processing Of Color Television Signals (AREA)
- Synchronizing For Television (AREA)
Abstract
Synchronizing signals for a PAL television system are provided by two oscillators 1 and 4, respectively to produce a color subcarrier frequency fSC and a horizontal synchronizing frequency fH. The oscillator outputs are divided by dividers 3 and 7 respectively in each case to yield a signal which is (11 x n/8)fV, where n is a positive integer and fV is the vertical synchronizing frequency. The resultant two frequencies are supplied to a phase detector 8, the output from which is used to control the frequency of one of the two oscillators 1 or 4. Because of the subcarrier frequency the first divider 3 divides by 64489. Other embodiments (Figs. 2-5) use first oscillators with higher frequencies, namely 2, 4 and 5 nfsc. The value of division by divider 7 is correspondingly changed. In the sixth embodiment (Fig. 6) and third oscillator at a multiple of fv is used for phase comparison of both oscillator outputs, both oscillators being frequency controlled. <IMAGE>
Description
SPECIFICATION
Synchronizing signal generating apparatus for PAL system
This invention relates to a synchronizing signal generating apparatus for a television standard signal of the PAL system.
The color subcarrier frequency fsc, horizontal synchronizing frequency fH and vertical synchronizing frequency fv of the phase alternation line system (hereinafter referred to as PAL system) which is one of color television systems are standardized as follows:
625 fH= fv (1) 2
1135 1 fsc fH + fv . (2) 4 2
It is difficult to obtain these frequency values fsc, fH and fv in a state of perfectly satisfying
Formulas (1) and (2) above by frequency dividing the output of one and the same reference signal generator, because the least common multiple of the frequency values fH and fscis about 11 G.Hz.The frequency values fsc, fH and fv are standardized on the ground of the following reasons:
In the PAL system, the color subcarrier of one of the color difference modulation axes is inverted once in every horizontal scanning period for the purpose of minimizing a color error resulting from the phase distortion of a transmission system. In the case of 1/2 interleaving, therefore, the phase of the color subcarrier of the inverted axis becomes uniform in every horizontal scanning period. During reproduction by a monitor, therefore, dots come to vertically align to show conspicuous lines called dot disturbance. To solve this problem, 1/2 interleaving is changed to a 1/4 interleaving arrangement to have the dots align in a chequered pattern.In addition to that, the dot position is arranged to be inverted for every field with phase inversion effected between one field and another by a fv/2 offset.
For obtaining the frequency values fsc and H' varied methods have been known including among others a method of using a frequency computing arrangement and a method of using a phase locked loop (hereinafter referred to as PLL) and a pulse removing circuit which is arranged to extract pulses for every horizontal and vertical periods as disclosed in Japanese Patent
Publication No. SHO 60-27469. Simpler known methods for attaining this purpose include a method of performing synchronizing control with a PLL over 1/161 of a reference frequency which is 282 n times as high as the horizontal frequency and 1/162 of a frequency which is a n times as high as the frequency fsc, as disclosed in Japanese Patent Publication No. SHO 59-1224.
The conventional methods have various shortcomings. The method of using a frequency computing arrangement necessitates complex arrangement and complicated adjustment. The method of using the PLL and the pulse removing circuit for extracting pulses for every horizontal and vertical periods requires complex arrangement. It is another disadvantage of this method that the output of the phase detector of the PLL has a ripple because the signal becomes discontinuous at the parts where the pulses are removed. As a result, the oscillation output of one of the oscillators having oscillation frequency thereof under control inevitably includes jitters.As for the method of using the PLL for performing synchronizing control over 1/161 of the reference frequency which is 282 n times as high as the horizontal synchronizing and 1/162 of the frequency which is n times as high as the frequency fsc gives some error relative to a specified value set forth by the applicable standards. The error is about 0.7 Hz for the frequency fsc.
It is therefore a general object of this invention to provide a novel synchronizing signal generating apparatus and method for a PAL television system.
It is a more specific object of the one aspect of this invention to provide a synchronizing signal generating apparatus for a PAL which is capable of generating a synchronizing signal precisely in conformity with the applicable standards without any error.
It is an object of another aspect of this invention to provide a synchronizing signal generating apparatus for a PAL which is capable of generating a synchronizing signal precisely in conformity with the applicable standards with simple arrangement.
To eliminate the above-stated shortcomings of the apparati of the prior art, a synchronizing signal generating apparatus for a PAL esystem which is arranged according to this invention to have first and second oscillators and a phase detector for detecting a phase relation between these oscillators and to obtain a television synchronizing signal in conformity to the PAL system by supplying the output terminal of the phase detector to the oscillation frequency control input terminal of either one of the oscillators receiving an oscillation frequency control input comprises: connecting means which is arranged to connect the output terminals of the first and second oscillators to the input terminal of the phase detector in such a manner that the frequency coming to the phase detector becomes 11 xn/8 times as high as the vertical synchronizing frequency.In the arrangement described, with the frequency which is supplied to the phase detector arranged to be 11 x n/8 times as high as the vertical synchronizing frequency, the outputs of the first and second oscillators are oscillated in synchronism.
The invention will now be described in greater detail and certain specific embodiments thereof set out by way of example only, reference being made to the accompanying drawings, in which:
Figure 1 is a block diagram showing a first embodiment of this invention;
Figure 2 is a block diagram showing a second embodiment;
Figure 3 is a block diagram showing a third embodiment;
Figure 4 is a block diagram showing a fourth embodiment; and
Figures 5 and 6 are block diagrams showing fifth and sixth embodiments.
With respect to a PAL synchronizing signal and a color subcarrier, it is well known that a phase relation between the color subcarrier and a field synchronizing signal is repeated in a cycle of eight fields. Further, a relation among the color subcarrier frequency fsc, the horizontal synchronizing frequency fH and the field frequency fv is expressed as follows:
1135 fv fsc= fH+ 4 2
Formula (1) above shows that about 1135 3
=283
4 4 waves of the color subcarrier exists in one horizontal line. Therefore, the number of waves of the subcarrier within one field period can be expressed as follows:
3 625 1 3 283 - > c ±=88672 - 422 8
In Formula (2) above, 2 in the last term indicates a frequency offset.Further, the number of waves of the subcarrier in eight fields can be expressed as follows:
3 8 > c88672 -=709379=11 > c64489 ...(3) 8
Formula (3) above indicates that there exist 709379 waves of the color subcarrier within the eight field period. The prime factors of this are 11 and 64489. Formula (3) can be rearranged involving the frequency values fv and fsc as follows:
8 11x64489 ~= (4) fv fsc Formula (4) can be further rearranged as follows:
11 fsc fv= . (5) 8 64489
Formula (5) indicates that 1/64489 of the color subcarrier exactly coincides with 11/8 of the field frequency. Therefore, the output of the ocillator for obtaining the color subcarrier and that of the oscillator for obtaining the field synchronizing signal can be precisely phase locked with the above-stated frequency.
This invention is based on the above-stated principle. The details of specific examples of this invention are as described below with reference to the accompanying drawings:
A first embodiment of this invention is as shown in the block diagram of Fig. 1. An oscillator 1 is arranged to oscillate at a frequency which is n number (n: an integer) times as high as the color subcarrier frequency fsc. The block diagram includes a 1/n frequency divider 2; a 1/64489 frequency divider 3; an oscillator 4 which is arranged to oscillate at a frequency 11 m (m: an integer) times as high as the horizontal frequency fH; a 1/m frequency divider 5; a 1/11 frequency divider 6; a 1/2500 frequency divider 7; a phase detector 8; and a low-pass filter 9.
The output of the oscillator 1 is frequency divided by 1/n by the frequency divider 2 into the color subcarrier frequency fsc The output is thus produced as the color subcarrier and, at the same time, is also further frequency divided by the 1/64489 frequency divider 3 into a frequency of 11/8 fv.
The output of the other oscillator 4 is frequency divided by the 1 /m frequency divider 5 to obtain a frequency of 11 fH. The output of the frequency divider 5 is frequency divided by the 1/11 frequency divider and is thus produced as the frequency fH. Further, the frequency 11 fH is also frequency divided by the 1/2500 frequency divider 7 and is produced as the frequency of 11/8 fv. These outputs of the 1/64489 frequency divider 3 and the 1/2500 frequency divider 7 are phase detected by the phase detector 8. Then, a low band component of the output of the phase detector 8 is taken out through the low-pass filter 9 and is applied to the oscillation frequency control input terminal of the oscillator 4.The oscillator 4 is a voltage-controlled oscillator and is arranged to have its oscillation frequency variable with the input. Therefore, the oscillator 4 oscillates in synchronism with the oscillation of the oscillator 1 and at a frequency required for obtaining by dividing it a frequency which is in exact conformity to the frequency specified by Formula (1) above. in other words, a PLL (phase locked loop) is formed jointly by the oscillator 4, the 1/m frequency divider 5, the 1/2500 frequency divider 7, the phase detector 8 and the low-pass filter 9. In accordance with the arrangement of this embodiment, therefore the color subcarrier frequency fsc, the horizontal frequency fH and the vertical frequency fv can be obtained in exact conformity with the specification of the PAL.
In another embodiment of this invention, the phase comparison frequency is arranged to be higher for a higher precision of the PLL. The second embodiment is arranged as shown in Fig. 2.
An oscillator 10 is arranged to oscillate at a frequency of 2n fsc (n; an integer). Meanwhile, the frequency of 11 fH is frequency divided by 1250 by a 1/1250 frequency divider 12. The phase comparison frequency is thus arranged to be 11/4 fv.
Fig. 3 shows in a block diagram a third embodiment of this invention. An oscillator 13 is arranged to oscillate at a frequency of 4n fsc (n: integer). The frequency of 11/2 fH is arranged to be divided by 625 by a 1/625 frequency divider 15. A phase comparison frequency is thus set at 11/2 fv.
Fig. 4 shows in a block diagram a fourth embodiment of this invention. An oscillator 16 is arranged to oscillate at a frequency of 5n fsc (n: integer). A frequency of 11 fH is arranged to be divided by 500 by a 1/500 frequency divider 18. A phase comparison frequency is thus set at 55/8 fv in this case.
In the case of a fifth embodiment, the oscillation frequency of the oscillator 4 is shown in
Figs. 1, 2, 3 and 4 is changed. Fig. 5 shows in a block diagram the fifth embodiment. An oscillator 19 is arranged to oscillate at a frequency of 2n fsc (n: an integer). The oscillator 4 which is employed in the preceding embodiments is replaced with an oscillator 20. The oscillator 20 is arranged to oscillate at a frequency of 22m fH (m: an integer). The phase comparison frequency is in this case arranged to be 11/4 fv.
In each of the embodiments shown in Figs. 2, 3, 4 and 5, the phase comparison frequency is arranged to be higher than the phase comparison frequency of 11/8 fv which is employed in the first embodiment shown in Fig. 1, so that the precision of the PLL can be increased from that of the first embodiment. Further, the low-pass filter 9 which is arranged to take out a low frequency band component from the output of the phase detector may be in general arranged to have its cut-off frequency at 1/10 of the phase comparison frequency. Therefore, with the phase comparison frequency arranged to be higher, a locking-in time can be shortened by shortening the time constant of the low-pass filter 9 accordingly. Further, in the case of the higher phase comparison frequency, the arrangement of the embodiment can be simplified as the low-pass filter 9 can be arranged as a low-degree filter.
Further, in the embodiments described, the oscillator to be placed under the frequency control may be either of the two oscillators oscillating which is a positive integer time as high as the frequency fsc or the horizontal frequency fH.
Further, the frequency which is an integer times as high as the frequency of 11/8 fv can be obtained either by the frequency dividing method or by a gradual frequency multiplying method with the sequence of the frequency dividers interchanged or with frequency dividers of the same dividing rate added in parallel.
Fig. 6 shows a sixth embodiment of this invention. In this embodiment, three oscillators are arranged to generate the color subcarrier frequency fsc, the vertical synchronizing frequency fv and the horizontal synchronizing frequency fH. Two PLLs are arranged to synchronize the three oscillators. An oscillator 21 is arranged to generate a signal having a frequency which is 1 1mn times as high as the vertical synchronizing frequency fv. An oscillator 22 is arranged to generate a signal having a frequency which is 21m times as high as the vertical synchronizing frequency fH.
The sixth embodiment further includes a 1/8mn frequency divider 23; a 1/11 n frequency divider 24; a 1/6251 frequency divider 25; a 1/21m frequency divider 26; a phase detector 27; and lowpass filters 28 and 29.
The output of the oscillator 1 is frequency divided by the 1/64489 frequency divider 3 and thus becomes the frequency of 11/8 fv. The frequency which is generated by the oscillator 21 and is 11 mn times as high as the vertical synchronizing frequency fv is frequency divided into a frequency corresponding to the frequency of 11/8 fv by the frequency divider 23. The output of the frequency divider 23 is supplied to and phase detected by the phase detector 8. A low band component of the output of the phase detector 8 is taken out by a low-pass filter 29 and is supplied to the oscillation frequency control input terminal of the oscillator 1. By this, the oscillation of the oscillator 1 is controlled to be in synchronism with that of the oscillator 21.
Further, the output of the oscillator 21 is frequency divided by 1/11 n by the frequency divider 24 into a frequency of m fv, which is supplied to one of the input terminals of the phase detector 27. The output of the phase detector 27 is supplied via a low-pass filter 28 to the oscillation frequency control input terminal of the oscillator 22. Therefore, the oscillation of the oscillator 22 is also controlled to be in synchronism with the oscillation of the oscillator 21.
Therefore, the three oscillators are thus arranged to oscillate in perfect synchronism with each other, so that a signal can be obtained in conformity to the specification of the PAL system. In the embodiment described, the oscillation frequency of the oscillator 21 is fixed as a reference frequency. Therefore, the output of the oscillator 21 can be used, for example, as reference clock pulses for the solid-state image sensor of a color video camera. This is an advantage of the embodiment.
As apparent from the foregoing description, the synchronizing signal generating apparatus for the PAL system arranged according to this invention is capable of generating the synchronizing signal which meets the specification for the PAL system and is free from unnecessary variations.
Further, in accordance with this invention, the output of the phase detector does not include any jitters. Therefore, a PLL operation can be stably accomplished even if the low-pass filter interposed in between the output terminal of the phase comparator and the oscillator is arranged to have a small time constant. Therefore, the invented arrangement permits reduction in the locking-in time and also shortening the rise time of the synchronizing signal generating apparatus.
Claims (36)
1. A synchronizing signal generating apparatus for a PAL system having first and second oscillators and a phase detector for detecting a phase relation between said oscillators and arranged to obtain a synchronizing signal in conformity to the PAL system by supplying the output of said phase detector to the oscillation frequency control input terminal of one of said first and second oscillators, characterized in that:
the output terminals of said first and second oscillators are connected to the input terminal of said phase detector through such arrangement that a frequency coming to said phase detector becomes 11 xn/8, wherein "n" is a positive integer.
2. An apparatus according to claim 1, wherein the output of said first oscillator is supplied via a first frequency divider to the input terminal of said phase detector.
3. An apparatus according to claim 1, wherein the output of said second oscillator is supplied via a second frequency divider to the input terminal of said phase detector.
4. An apparatus according to claim 2, wherein the output of said first oscillator is a frequency which is integer times as high as a color subcarrier frequency.
5. An apparatus according to claim 4, wherein the output of said second oscillator is a frequency integer times as high as a horizontal synchronizing frequency.
6. An apparatus according to claim 4, wherein said first frequency divider includes a frequency divider for dividing by 64489.
7. A synchronizing signal generating apparatus for a PAL system, comprising:
a) a first oscillator arranged to generate a signal of a frequency which is n number (n: a
positive integer) times as high as a color subcarrier frequency;
b) a second oscillator arranged to generate a signal of a frequency 11 m (m: a positive integer) times as high as a horizontal synchronizing frequency;
c) a first frequency divider arranged to frequency divide the output of said first oscillator by
64489xl (I: a positive integer);
d) a second frequency divider arranged to frequency divide the output of said second oscillator; and
e) phase comparison means arranged to compare the phase of the output of said first frequency divider and that of the output of said second frequency divider and to control the
oscillation frequency of either said first oscillator or said second oscillator.
8. An apparatus according to claim 7, wherein said first oscillator has the oscillation fre
quency thereof variable; and said phase comparison means is arranged to control the oscillation frequency of said first oscillator.
9. An apparatus according to claim 7, wherein said second oscillator has the oscillation frequency thereof variable; and said phase comparison means is arranged to control the oscillation frequency of said second oscillator.
10. An apparatus according to claim 7, further comprising:
f) a low-pass filter which is arranged to cut the high frequency component of the output of said phase comparison means.
11. An apparatus according to claim 7, wherein said first and second frequency dividers are arranged to produce their outputs at a frequency which is 11/8 x k (k: a positive integer) times as high as a vertical synchronizing frequency.
12. An apparatus according to claim 7, further comprising frequency dividing means arranged to produce a vertical synchronizing frequency and a horizontal synchronizing frequency by frequency dividing the output of said second oscillator.
13. An apparatus according to claim 7, further comprising frequency dividing means arranged to produce a color subcarrier by frequency dividing the output of said first oscillator.
14. A synchronizing signal generating apparatus for a PAL system, comprising:
a) first means for generating a signal of a frequency which is integer times as high as the frequency of a color subcarrier and 11/8 X n (n: a positive integer) times as high as a vertical synchronizing frequency;
b) second means for generating a signal of a frequency which is integer times as high as a horizontal synchronizing frequency and 11/8 x m (m: a positive integer) times as high as a vertical synchronizing frequency;
c) third means arranged to generate a signal of a frequency which is 1 1/8x1 (I: a positive integer) times as high as said vertical synchronizing frequency by frequency dividing each of signals produced by said first and second means respectively; and
d) fourth means for controlling the frequency of said signal generated by either said first means or said second means on the basis of the result of phase comparison made by said third means.
15. An apparatus according to claim 14, wherein the frequency of the signal generated by said 'first means is higher than that of the signal generated by said second means.
16. An apparatus according to claim 14, wherein said "n" represents a multiple of 64489.
17. An apparatus according to claim 14, wherein said fourth means is a low-pass filter which is arranged to cut the high frequency component of the output of said third means.
18. An apparatus according to claim 14, further comprising:
e) frequency dividing means for producing a signal of the frequency of a color subcarrier by frequency dividing the signal generated by said first means.
19. An apparatus according to claim 14, further comprising:
e) frequency dividing means for producing signals of a vertical synchronizing frequency and a horizontal synchronizing frequency by frequency dividing the signal generated by said second means.
20. A signal generating apparatus for generating a signal determined by a relation
1135 1 fisc fH + fv 4 2 which obtains among a color subcarrier frequency fsc, a horizontal synchronizing frequency fH and a field frequency fv comprising:
a) first means for generating a signal of a frequency of n fsc (n: a positive integer), said signal being arranged to have a variable frequency;
b) second means for frequency dividing the output of said first generating means by 64489 x I (I: a positive integer);
c) third means for generating a signal of a frequency which is equal to the frequency of the signal generated by said second means; and
d) control means arranged to phase compare the outputs of said second and third means and to control the frequency of the signal generated by said first means in such a manner as to have the outputs of said second and third means coincide in phase with each other.
21. An apparatus according to claim 20, further comprising means for obtaining means for obtaining frequencies fH and fv from the signal generated by said third means.
22. An apparatus according to claim 21, wherein said third means includes:
a) an oscillator arranged to generate a frequency which is n times as high as the frequency of the signal generated by said second means; and
b) means for frequency dividing the output of said oscillator into 1/m.
23. An apparatus according to claim 22, wherein said oscillator is arranged to generate a frequency which is integer times as high as said frequency fH and n times as high as the frequency of the signal generated by said second means.
24. An apparatus according to claim 22, wherein said oscillator is arranged to generate a frequency which is integer times as high as said frequency fv and n times as high as the frequency of said signal generated by said second means.
25. An apparatus according to claim 20, wherein said control means includes:
a) phase comparison means for comparing the phase of the signal generated by said second means and that of the signal generated by said third means;
b) a low-pass filter arranged to cut the high frequency component of the output of said phase comparison means; and
c) means for supplying the output of said low-pass filter to said first means.
26. An apparatus according to claim 20, wherein driving pulses are produced to drive an image sensor; and the signal generated by said third means is produced as said driving pulses.
27. A signal generating apparatus for generating a signal determined by a relation
1135 1 fsc fH+ fv 4 2 which obtains among a color subcarrier frequency fsc, a horizontal synchronizing frequency fH and a field frequency f", comprising:
a) first means for generating a signal of a frequency of 11 xnxfH (n: a positive integer), the frequency of said signal being arranged to be variable;
b) second means for frequency dividing the output of said first means by 8 x m (m: a positive integer);
c) third means for generating a signal of a frequency which is equal to the frequency of the signal generated by said second means; and
d) control means arranged to phase compare the outputs of said second and third means and to control the frequency of the signal generated by said first means in such a manner as to have the outputs of said second and third means coincide in phase with each other.
28. An apparatus according to claim 27, further comprising means for generating the fre
quency fsc from the output of said third means.
29. An apparatus according to claim 28, wherein said third means includes:
a) an oscillator arranged to generate a frequency which is n times as high as the frequency of the signal generated by said second means; and
b) means for frequency dividing the output of said oscillator into 1/m.
30. An apparatus according to claim 29, wherein said oscillator is arranged to generate a frequency which is integer times as high as said frequency fsc and I times as high as the frequency of the signal generated by said second means.
31. An apparatus according to claim 29, wherein said control means includes:
a) phase comparison means for comparing the phase of the signal generated by said second
means and that of the signal generated by said third means;
b) a low-pass filter arranged to cut the high frequency component of the output of said phase
comparison means; and
c) means for supplying the output of said low-pass filter to said first means.
32. An apparatus according to claim 29, wherein driving pulses are produced to drive an
image sensor; and said driving pulses are produced on the basis of the output of said first
means.
33. A method of synchronising two oscillators providing synchronising signals for a PAL
television system, in which method the outputs of the two oscillators are processed and the
resultant signals are fed to a phase detector, and the output of the phase detector is used to
control the frequency of oscillation of one of the two oscillators, the processing of the oscillator
outputs being such that each said resultant signal has a frequency of 11 xn/8 where n is a
positive integer.
34. A method according to claim 33, in which one oscillator provides an output used to yield
the colour subcarrier frequency fsc, the other oscillator provides an output used to yield the
horizontal synchronising frequency fH , and the processed oscillator outputs fed to the phase
detector each has a frequency of (11 xn/8). fv where fv is the vertical synchronising frequency.
35. Synchronizing signal generating apparatus for a PAL system substantially as hereinbefore
described, with reference to and as illustrated in the accompanying drawings.
36. A method of synchronizing two oscillators providing synchronizing signals for a PAL
system, which method is substantially as hereinbefore described.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25723385A JPS62117477A (en) | 1985-11-15 | 1985-11-15 | Pal synchronizing signal generator |
Publications (2)
Publication Number | Publication Date |
---|---|
GB8627164D0 GB8627164D0 (en) | 1986-12-10 |
GB2183960A true GB2183960A (en) | 1987-06-10 |
Family
ID=17303526
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08627164A Withdrawn GB2183960A (en) | 1985-11-15 | 1986-11-13 | Synchronizing signal generating apparatus for PAL system |
Country Status (3)
Country | Link |
---|---|
JP (1) | JPS62117477A (en) |
DE (1) | DE3638764A1 (en) |
GB (1) | GB2183960A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2183122B (en) * | 1985-11-18 | 1989-11-22 | Canon Kk | Synchronizing signal generating apparatus for pal system |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2049343A (en) * | 1979-04-20 | 1980-12-17 | Victor Company Of Japan | Synchronizing signal generator |
GB2116395A (en) * | 1982-01-21 | 1983-09-21 | Victor Company Of Japan | Synchronizing signal generating apparatus |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5871784A (en) * | 1981-10-26 | 1983-04-28 | Hitachi Ltd | Generating circuit of synchronizing signal for solid-state color video camera |
-
1985
- 1985-11-15 JP JP25723385A patent/JPS62117477A/en active Pending
-
1986
- 1986-11-13 GB GB08627164A patent/GB2183960A/en not_active Withdrawn
- 1986-11-13 DE DE19863638764 patent/DE3638764A1/en not_active Ceased
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2049343A (en) * | 1979-04-20 | 1980-12-17 | Victor Company Of Japan | Synchronizing signal generator |
GB2116395A (en) * | 1982-01-21 | 1983-09-21 | Victor Company Of Japan | Synchronizing signal generating apparatus |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2183122B (en) * | 1985-11-18 | 1989-11-22 | Canon Kk | Synchronizing signal generating apparatus for pal system |
Also Published As
Publication number | Publication date |
---|---|
GB8627164D0 (en) | 1986-12-10 |
DE3638764A1 (en) | 1987-07-09 |
JPS62117477A (en) | 1987-05-28 |
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Legal Events
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WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |