GB2157890A - Feed through capacitor - Google Patents

Abstract

A feed through capacitor has first and second terminals (1, 4) for passing data or control signals unimpeded via a d.c. path formed at least in part by a first set of electrodes (6, 7, 8) connected in parallel between terminations (2, 3). There is a second set of electrodes (9, 10) interleaved with the first set and connected to a third termination (5). This capacitor provides a better insertion loss characteristic, is more compact, and cheaper and easier to make than the prior art. <IMAGE>

Description

SPECIFICATION Feed through capacitor This invention relates to a feed through capacitor.

In modern communication equipment it is often necessary to filter out noise from signal transmission or control paths so that this noise does not interfere with command or data signals.

Capacitive devices are already known which accomplish this at the terminal feed through connections of an equipment. One is a tubular ceramic capacitor filter device with a central feed through wire which conducts the wanted signal through the device and the connector.

This is illustrated in Fig. 1A and comprises a ceramic tube A with silver layers B and C forming internal and external electrodes, respectively. A feed through wire D is connected to the internal electrode B via a brass washer F and solder G and the external electrode C is connected to a brass eyelet E. The effectiveness of this device is limited by the low capacitance and unpredictable insertion loss characteristic with frequency is shown by curve (1) in the graph of Fig. 6. The equivalent circuit is shown in Fig. 1A as a simple capacitor to ground. A capacitance value of 3000 pF is typical.

An improvement is shown in Fig. 1 B where the silvering B of Fig. 1A is replaced by separate silverings B1, B2 and wire D is connected to both silverings by brass and solder F1, G1, and F2, G2, respectively. A ferrite bead H provides a series inductance, and the whole device provides a pi-section filter. The insertion loss curve (2) shows an improvement over the simple tubular ceramic.

An improvement yet again can be achieved by the discoidal feed through capacitor which is of ceramic multilayer construction providing greater capacitance per unit volume and shown in section in Fig. 1C. This comprises successive layers of ceramic M1, M2, M3, M4, M5 and two interleaved sets of electrodes, one set J1, J2 being connected to the feed through wire D and the other set K1, K2 being connected to an outer termination for connection to earth. This provides greater insertion loss but has a kinked response as shown by curve (3) in Fig. 6.

The device of Fig. 1A is cheap but not very effective; the pi-section device of Fig. 1 B is more effective but expensive to make, and the device of Fig. 1C is expensive to make and has a kinked response which can be undesirable in some applications.

It is an object of the present invention to provide a feed through capacitor which has high capacitance per unit volume and is relatively easy and cheap to make, with a good response curve.

According to one aspect of the present invention there is provided a feed through capacitor having first and second terminals for passing data or control signals unimpeded via a d.c. path between the terminals and providing an insertion loss to signals of 1 MHz and above, wherein the d.c. path is provided by a first set of parallel-connected electrodes of the capacitor.

According to another aspect of the present invention there is provided a feed through capacitor comprising a set of first conductive electrodes extending from a first feed through terminal to a second spaced feed through terminal and interleaved with and capacitively coupled to a second set of conductive electrodes extending to a third terminal intermediate the first and second terminals.

This construction enables multilayer ceramic capacitor manufacturing techniques to be used. Conveniently the electrodes and dielectric are formed by stacking layer upon layer, first ceramic, then first electrode, then ceramic, then second electrode, then ceramic then first electrode again, and so on, and the terminals are connected to the capacitor body after it has been formed and fired.

In order that the invention can be clearly understood reference will now be made to the accompanying drawings in which: Figure 1 shows the prior art; Figure 2 shows a feed through capacitor according to an embodiment of the invention; Figure 3 shows schematically how the electrodes are disposed in the capacitor of Fig. 2; Figure 4 shows the electrode patterns for making the capacitor of Figs. 2 and 3, Fig.

4A showing the layout and build-up on the assembly substrate; Figure 5 shows schematically a feed through device comprising an assembly of feed through capacitors; and Figure 6 is a graph showing the characteristics of the prior art devices and the characteristics of a device according to an embodiment of the invention.

Referring to Fig. 2 the feed through chip capacitor has a lead 1 soldered to a first feed through connection terminal 2 connected by a first set of electrodes to a second feed through connection terminal 3 having a second lead 4 soldered to it. A third connection terminal 5 comprises a conductive band around the capacitor body connected to a second set of electrodes interleaved with and capacitively coupled to the first set. The leads 1 and 4 can be soldered to the connection terminals 2 and 3 by an automatic axial soldering machine, or alternatively pressure contacts can be applied.

The whole capacitor is formed as a multilayer chip capacitor and the inner electrode configuration is shown schematically in Fig. 3 which has the same orientation as Fig. 2.

Thus the first set of electrodes are connected in parallel and form the d.c. path provided by the feed through capacitor.

Referring to Fig. 3 the first set of electrodes 6, 7 and 8 are interleaved with a second set 9 and 10. Electrodes 6, 7 and 8 extend to the opposed surface terminations 2 and 3 but not to the opposed surfaces 11 and 12, whereas the second set 9 and 10 do extend to surfaces 11 and 1 2 but not to surfaces 2 and 3.

Electrodes 9 and 10 are connected to termination 5.

Referring now to Fig. 4 there is shown the electrode screen printing pattern for the capacitor shown in Figs. 2 and 3. First there is provided a glass substrate 20 (Fig. 4A) measuring say four inches square with a thin Mylar (Trade Mark) sheet 21 glued to one surface. A first ceramic slurry comprising fine ceramic particles suspended in a binder and solvent, is screened over the whole area of the Mylar sheet, followed by the first electrode layer 22A corresponding to several of the patterns 22 and 23 mside by side screened onto the dried ceramic. The electrode pattern is formed by screening an electrode paste of fine metal particles in a binder through a stainless steel mesh pattern, and is printed in position F.

Then a second ceramic layer is applied.

Then a second electrode layer is screened, corresponding to the first layer using the same screen but with the glass substrate moved by the distance F-G, so that the patterns 22 and 23 become superimposed as shown in Fig.

4B.

This process is continued until the required number of electrodes in the first and second sets has been achieved. The screen pattern (Fig. 4) remains static and every alternate electrode layer the glass plate moves between position F and position G on the screening bed. Each layer is dried before the next layer is applied.

The last layer of build up of the stack 24 is the electrode pattern using a carbon black material in organic binder instead of electrode paste, which will burn off at the dielectric firing stage and gives a visible indication of the position of the underlying layers.

The glass substrate and multilayer stack are dried at 50"C for two hours. The multilayer stack is then sawn using diamond cutting discs, location by the top cover electrode patterns which will burn off. The depth of cut is through the multilayer stack and just into the Mylar film and is along the lines x and y in Fig. 4B. The multilayer chips so formed are still attached on the glass plate at this stage.

Glass plate plus chips are air dried for a minimum of 1 5 hours and then for 24 hours at 50"C. The chips are then released from the glass plate and Mylar by ultrasonic vibrators onto zirconia or mullite firing plates according to the particular ceramic dielectric used in manufacture.

A bake-out process is then carried out. This is the removal of organic binders and solvents in the ceramic and electrode inks. Multilayer chips are baked out on the zirconia or mullite plates in a drying oven from room temperature to 320-360"C over a period from 4 hours to 74 hours again according to dielectric and construction.

Then ceramic firing takes place. This is to fuse and sinter all the ceramic particles together and is carried out in a tunnel furnace at 1120-11 30'C. The time of cycle is 15 hours to 25 hours. The fired ceramic chips are then rumbled in water and silicon carbide to remove sharp edges to help coverage of termination.

Then terminations are applied comprising three bands of Ag or PdAg to form the terminations 2, 3 and 5. These are to connect alternative electrodes coming out of the ends of the multilayer chips which are of the same polarity. Multilayer chips are terminated with Ag or PdAg dried at 200"C for 5 minutes and fired at 800-850"C for one hour cycle.

Multiway connectors can be made using feed through chips as described where current requirements are small.

Referring to Fig. 5 a metal plate 30 has five apertures 31 (Fig. 5A) and a feed through chip capacitor is secured in each aperture by soldering termination 5.

The feed through chip capacitor described has a small cross sectional area so that a high packing density can be achieved as e.g. the multiway connector shown in Fig. 5. Typical capacitance value would be up to 2.0 iF.

They also give a high insertion loss compared to the prior art devices of the same size and provide a better response as shown by curves 4 and 5 in the graph of Fig. 6.

Samples we have manufactured were 0.8" wide by 0.7" thick by 0.180" long giving capacitance values -"0.1 3 ,uFd. More electrodes could have been used giving values of say 0.2 pFd.

The only factor limiting capacitance value is thickness which is -0.7". Length and width can be up to present maximum of 0.40" giving capacitance values of about 2.0 ,uFd.

Claims (7)

1. A feed through capacitor having first and second terminals for passing data or control signals unimpeded via a d.c. path between the terminals and providing an insertion loss to signals of 1 MHz and above, wherein the d.c. path is provided by a first set of parallel-connected electrodes of the capacitor.

2. A feed through capacitor comprising a set of first conductive electrodes extending from a first feed through terminal to a second spaced feed through terminal and interleaved with and capacitively coupled to a second set of conductive electrodes extending to a third terminal intermediate the first and second terminals.

3. A feed through capacitor as claimed in claim 1 or claim 2, wherein multilayer ceramic capacitor manufacturing techniques are used.

4. A feed through capacitor as claimed in any preceding claim, wherein the first and second terminals are connected to end terminations of the first set of electrodes.

5. A feed through capacitor substantially as hereinbefore described with reference to and as illustrated in Figs. 2, 3, 4 and curves 4 and 5 of Fig. 6, of the accompanying drawings.

6. A feed through device comprising a mounting member and a plurality of feed through capacitors each as claimed in any preceding claim, mounted on the mounting device, the mounting device providing a conductive path to reference potential and to a or the second electrode of the capacitor.

7. A feed through device substantially as hereinbefore described with reference to and as illustrated in Fig. 5 of the accompanying drawings.