GB2149580A

GB2149580A - Printed circuit production

Info

Publication number: GB2149580A
Application number: GB08329809A
Authority: GB
Inventors: Anthony Elliott
Original assignee: Standard Telephone and Cables PLC
Current assignee: STC PLC
Priority date: 1983-11-08
Filing date: 1983-11-08
Publication date: 1985-06-12
Also published as: ES8608267A1; GB2149580B; GB8329809D0; ES537484A0

Abstract

In the production of printed circuits using computer aided design techniques it is frequently desired to produce such circuits with relatively wide tracks as this is beneficial for high speed logic circuits. To do this, the centre lines of the insulation paths between adjacent tracks are determined, and the etch or other process used is controlled on the basis of the insulation paths as distinct from the conductor tracks. <IMAGE>

Description

SPECIFICATION Printed circuit production This invention relates to the production of printed circuits when Computer Aided Design (CAD) is used.

Most existing CAD systems for printed circuit work allow a single track width to be selected. The width selected by the computer operator is controlled by the greatest number of tracks which have to pass through a gap. Some systems allow "necking" and "bending" to enable wider tracks to squeeze through a constriction. When the tracking is completed and checked, a plot of the track is taken and photo-plotted to give an artwork master from which the printed circuit is made.

For a rigid printed circuit board (PCB), the initial coating if copper is used for the tracks in many cases has a thickness of 17.5 microns, this being known as 1/2 oz copper, and this coating is acid etched to produce the insulation path. The board is subsequently plated with the same metal so that the thickness, in the case of copper, is 35 microns, known in this case as 1 oz copper.

Printed circuits are also reproduced by screen printing conductive ink on to flexible film, and also on to the inner surface of a plastics moulded case.

The design and production of the artwork for such printed circuits is essentially the same as for the PCBs.

In some cases, e.g. to enable higher logic speeds to be attained, it is desired to have relatively wide tracks, and an object of the invention is to enable such wider tracks to be produced.

According to the invention, there is provided a method of producing a printed circuit on an insulating surface, in which the surface is initially given a coating of an electrical conductor from which conductive material is removed under computer control to leave on the insulating surface the desired printed pattern, in which to produce conductive tracks which are relatively wide compared with the narrowest tracks used, the centre-lines of the areas between those tracks are determined so that the insulation paths between adjacent conductive paths are plotted, and in which the removal of unwanted conductive material is effected under the control of the plots relating to the relatively narrow insulation paths.

Embodiments of the invention will now be described with reference to the accompanying drawings, in which Figures 1 to 6 illustrate two methods of implementing the invention.

In the arrangements embodying the invention the circuit requirements are plotted in accordance with standard practice. Then having produced and checked the design, a dump tape is produced as a record of what has been done, and a track expansion program is used. Two methods of expanding the tracks can be used, a vector scan method and a raster scan method.

As the majority of CAD systems use vector scan methods, this method is currently the preferred one. In using this method, co-ordinates are taken at mid point between the conductive tracks at each point at which the track changes direction. These new co-ordinates are joined to produce a track of the insulation path.

Figure 1 shows part of a CAD track layout in which three conductive tracks are shown. Fig. 2 shows the mid-co-ordinate vector plot of the insulation. Here the change of direction points are shown as crosses such as 1 and these are joined by the lines such as 2 to give tracks of the insulating paths.

The insulation paths thus plotted are photo-plotted, and the photoplot of the insulation paths is photographically reversed, the negative being the photographic master of the expanded tracks. The result of this photographic reversal is shown in Fig.

3. The artwork master thus produced is thus used to control the removal of the conductive layer to obtain the printed circuit.

Where the computer used for CAD is used to its full capacity, a "non-dedicated" computer operating on raster scan graphics may be used to perform the track expansion routine. The conductive track width is defined in pixels picture elements).

A subroutine is entered in which to each available side of the track additional pixels are added. After each such addition the space between pixels is checked against a preset specification, in one case 0.03 mm, and when the specification is not exceeded, i.e. the space is at least equal to the preset value, the pixel is left on, but where a space less than that specified occurs, the pixel is deleted.

This subroutine is repeated until terminated by the operator. The programme is run until sufficient expansion has occurred. Note that the plotting and photoplotting would take up excessive time if the expanded tracks are plotted, so the narrow insulation path thus defined is plotted, and the result is photographically reversed to give the master artwork for the track pattern.

This process is illustrated in Figs. 4-6. In Fig. 4 we see two tracks 5 and 6, with pixels on either side. As the gap between adjacent rows of pixels is more than the preset space, this is acceptable.

However, in Fig. 5 the gap between the tracks is below the preset value, so the pixels will be detected in due course. In Fig. 6, the addition of pixels allows both tracks to be expanded on one side only.

Expanded tracks have advantages in high speed logic circuits, since wide tracks reduce the time needed for time based signals to pass along the tracks. In such cases it is particularly important that the tracks have optimum width in high density track conditions.

Claims

1. A method of producing a printed circuit on an insulating surface, in which the surface is initially given a coating of an electrical conductor from which conductive material is removed under computer control to leave on the insulating surface the desired printed pattern, in which to produce conductive tracks which are relatively wide compared with the narrowest tracks used, the centrelines of the areas between those tracks are determined so that the insulation paths between adjacent conductive paths are plotted, and in which the removal of unwanted conductive material is effected under the control of the plots relating to the relatively narrow insulation paths.

2. A method as claimed in claim 1, in which the determination of the insulation paths is effected by plotting the mid-points of the gaps between tracks at points of change of direction, and connecting said mid points.

3. A method as claimed in claim 1, in which the determination of the insulation paths is effected by adding pixels on each side of each track, and checking the distance between adjacent pixels, the arrangement being such that if the check reveals that the distance exceeds a preset value the tracks are expanded to include the areas occupied by the pixels, and that if the distance is less than the preset value the last-added pixels are deleted.

4. A method as claimed in claim 1, 2 or 3, in which after the said centre lines, and thus the insulation paths, are determined, the result is photoplotted and the resulting picture is photographically reversed so that the removal of unwanted material is under the control of the insulation paths.

5. A method of producing a printed circuit, substantially as described herein.

6. A printed circuit produced by the method of any one of the preceding claims.

Amendments to the claims have been filed, and have the following effect: (b) New or textually amended claims have been filed as follows:

7. A method of producing a printed circuit on an insulating surface, in which the surface is initially given a coating of an electrical conductor from which conductive material is removed to leave on the insulating surface the desired printed pattern, in which to produce conductive tracks which are relatively wide compared with the narrowest tracks used, the centre lines of the insulation regions between adjacent conductive tracks are determined so that the insulation paths between adjacent conductive paths are plotted, and in which the process used to remove unwanted conductive material is effected under the control of the plots relating to the insulation paths and not under control of the conductive paths.