GB2140628B - Procedure for the manufacture of a multi-layer circuit - Google Patents

Procedure for the manufacture of a multi-layer circuit

Info

Publication number
GB2140628B
GB2140628B GB08410039A GB8410039A GB2140628B GB 2140628 B GB2140628 B GB 2140628B GB 08410039 A GB08410039 A GB 08410039A GB 8410039 A GB8410039 A GB 8410039A GB 2140628 B GB2140628 B GB 2140628B
Authority
GB
United Kingdom
Prior art keywords
procedure
manufacture
layer circuit
circuit
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB08410039A
Other languages
English (en)
Other versions
GB2140628A (en
GB8410039D0 (en
Inventor
Hartwig Gernoth
Dr Conrad Smith
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BBC Brown Boveri AG Germany
BBC Brown Boveri France SA
Original Assignee
Brown Boveri und Cie AG Germany
BBC Brown Boveri France SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Brown Boveri und Cie AG Germany, BBC Brown Boveri France SA filed Critical Brown Boveri und Cie AG Germany
Publication of GB8410039D0 publication Critical patent/GB8410039D0/en
Publication of GB2140628A publication Critical patent/GB2140628A/en
Application granted granted Critical
Publication of GB2140628B publication Critical patent/GB2140628B/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/024—Dielectric details, e.g. changing the dielectric material around a transmission line
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/467—Adding a circuit layer by thin film methods
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0179—Thin film deposited insulating layer, e.g. inorganic layer for printed capacitor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0302—Properties and characteristics in general
    • H05K2201/0317—Thin film conductor layer; Thin film passive component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09881—Coating only between conductors, i.e. flush with the conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/14—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation
    • H05K3/143—Masks therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)
GB08410039A 1983-04-29 1984-04-18 Procedure for the manufacture of a multi-layer circuit Expired GB2140628B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19833315615 DE3315615A1 (de) 1983-04-29 1983-04-29 Verfahren zur herstellung einer multilayer-schaltung

Publications (3)

Publication Number Publication Date
GB8410039D0 GB8410039D0 (en) 1984-05-31
GB2140628A GB2140628A (en) 1984-11-28
GB2140628B true GB2140628B (en) 1986-07-09

Family

ID=6197707

Family Applications (1)

Application Number Title Priority Date Filing Date
GB08410039A Expired GB2140628B (en) 1983-04-29 1984-04-18 Procedure for the manufacture of a multi-layer circuit

Country Status (4)

Country Link
JP (1) JPS59207695A (fr)
DE (1) DE3315615A1 (fr)
FR (1) FR2545313B1 (fr)
GB (1) GB2140628B (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0211180A3 (fr) * 1985-08-02 1989-08-09 Shipley Company Inc. Méthode de fabrication de plaquettes à circuit imprimé multicouches
US6462107B1 (en) 1997-12-23 2002-10-08 The Texas A&M University System Photoimageable compositions and films for printed wiring board manufacture
EP0958736A1 (fr) 1998-05-12 1999-11-24 Garden Systems in 't kort GARSY Ensemble de jardinières superposées
DE10227658B4 (de) * 2002-06-20 2012-03-08 Curamik Electronics Gmbh Metall-Keramik-Substrat für elektrische Schaltkreise -oder Module, Verfahren zum Herstellen eines solchen Substrates sowie Modul mit einem solchen Substrat

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1765013A1 (de) * 1968-03-21 1971-07-01 Telefunken Patent Verfahren zur Herstellung von Mehrebenenschaltungen
FR2042059A5 (fr) * 1969-04-02 1971-02-05 Ibm
DE2202077A1 (de) * 1971-05-17 1972-11-30 Hochvakuum Dresden Veb Verfahren zur Herstellung von Mehrlagenleiterplatten
FR2204940B1 (fr) * 1972-10-27 1976-01-30 Thomson Csf Fr
DE2822011C3 (de) * 1978-05-19 1987-09-10 Fujitsu Ltd., Kawasaki, Kanagawa Halbleiteranordnung und Verfahren zu deren Herstellung
FR2466103A1 (fr) * 1979-09-18 1981-03-27 Lerouzic Jean Procede de realisation d'un reseau d'interconnexion de composants electroniques a conducteurs en aluminium et isolant en alumine et reseau d'interconnexion obtenu par ce procede
DE3013667C2 (de) * 1980-04-09 1983-01-20 Wilhelm Ruf KG, 8000 München Leiterplatte und Verfahren zu deren Herstellung
DE3114679A1 (de) * 1980-04-11 1982-01-14 Hitachi, Ltd., Tokyo Integrierte schaltung mit mehrschichtenverbindungen

Also Published As

Publication number Publication date
JPS59207695A (ja) 1984-11-24
FR2545313B1 (fr) 1987-12-18
FR2545313A1 (fr) 1984-11-02
DE3315615A1 (de) 1984-10-31
GB2140628A (en) 1984-11-28
GB8410039D0 (en) 1984-05-31

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee