GB2125423A - Polymeric films for electronic circuits - Google Patents

Polymeric films for electronic circuits Download PDF

Info

Publication number
GB2125423A
GB2125423A GB08321502A GB8321502A GB2125423A GB 2125423 A GB2125423 A GB 2125423A GB 08321502 A GB08321502 A GB 08321502A GB 8321502 A GB8321502 A GB 8321502A GB 2125423 A GB2125423 A GB 2125423A
Authority
GB
United Kingdom
Prior art keywords
films
film
circuit
plasma
layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB08321502A
Other versions
GB8321502D0 (en
GB2125423B (en
Inventor
Theodore Frank Retajczyk
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of GB8321502D0 publication Critical patent/GB8321502D0/en
Publication of GB2125423A publication Critical patent/GB2125423A/en
Application granted granted Critical
Publication of GB2125423B publication Critical patent/GB2125423B/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02214Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H01L21/02216Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

Electronic circuits are described in which polysiloxane films 45 made by plasma-induced polymerization of at least one alkylalkoxysilane, in which the alkyl and alkoxy groups contain 1-3 carbon atoms each, are used as protective and dielectric layers. Such layers are highly advantageous in that they are chemically inert, exhibit excellent thermal stability and have low dielectric constant. Electronic circuits with these films may be processed at relatively high temperatures without damage and have minimum parasitic capacitances where conductor spacing is extremely small and access times are very short. The layers are particularly useful for high density, high frequency memory and logic circuits. <IMAGE>

Description

SPECIFICATION Polymeric films for electronic circuits The invention involves electronic circuits with polymeric films used as insulator and dielectric layers.
The ever continuing advances in VLSI technology have led to greater packing density and shrinking design rules. This has created a need for new and improved dielectric materials for use in various device structures. For example, the close proximity of various conducting elements in the VLSI circuit has created a need for dielectric material of low dielectric constant so as to reduce parasitic capacities. Also required is high dielectric strength because of the close approach of various conducting elements in the VLSI circuits. The use of two or more levels of metallization creates the need for dielectric material with other unique properties. For example, it is desirable in some cases that the dielectric be applied at a relatively low temperature so as to not adversely affect the multilevel circuit.
In other cases, processing of these multilevel circuits often involves the use of relatively high temperatures to which the dielectric material must be stable. Also, the reduced feature sizes and higher applied voltages found in new VLSI devices may require new materials for glassification and encapsulation.
Desirable properties for dielectric layers in use for VLSI circuits are low dielectric constants so as to minimize parasitic capacitances, high thermal stability so as to permit further processing of the circuit at high temperatures, relatively low application temperature so as to minimize damage to the circuit on application of the dielectric, high dielectric strength, good adherence, good film integrity (i.e., freedom from cracks) and chemical stability particularly to water and water vapor. Such a dielectric material would be extremely valuable and particularly for application to high density circuits because reduced parasitic capacitances would permit higher speeds and thermal stability would permit greater flexibility in processing such circuits.
A number of studies have been made of the use of polymer films in electronic circuits both as an insulator and as an encapsulating film and a passivating film. Most noteworthy of these are as follows: A Szeto and D. W. Hess in a paper entitled "Correlation of Chemical and Electrical Properties of Plasma-Deposited Tetramethylsilane Films", Journal of Applied Physics, 52 (2), 903 (1981), have studied the properties of tetramethylsilane films of interest in electric circuit fabrication. Similar studies have been carried out for polymer films made by plasma induced polymerization of hexamethyldisiloxane. These studies have been reported in the following papers: M.
Maisonneuve et al, Thin Solid Films, 44, pp.209-216 (1977); M. Aktik et al, Journal of Applied Physics, 51(9), pp. 5055-5057 (1980); M. Maisonneuve et al, Thin Solid Films, 33, pp.
35-41(1976); and J. E. Klemberg-Sapieha, Applied Physics Letters, 37 (1), pp. 104-105 (1980).
According to the present invention there is provided a semiconductor electrical apparatus comprising semiconductor material and conducting elements, characterized in that the apparatus further comprises polysiloxane film made by plasma-induced polymerization of at least one alkylalkoxysilane with the alkyl and alkoxy groups containing up to 3 carbon atoms.
A preferred embodiment of the invention provides an electrical circuit in which at least part of a surface of the circuit is covered with a plasma-deposited polysiloxane film in which the monomer is an alkylalkoxysilane. The alkyl and alkoxy groups should not contain more than three carbon atoms. Typical examples are trimethyl methoxysilane, dimethyldimethoxysilane, triethylethoxysilane, etc. Preferred is the monomer trimethylmethoxysilane because of low dielectric constant, high breakdown voltage, low film stresses and a reasonable degree of thermal stability and high hydrophobicity. The polymer film is useful for a large variety of electrical circuits, high frequency, low frequency, direct current, etc. Typically, a circuit comprises a substrate, conductor elements, input connections, output connections, etc.These films are highly advantageous where at least some of the conductor spacings are very low (i.e., of the order of 2 microns or less and circuit frequencies (or corresponding access times) are very high (i.e., greater than 5 MHz). It is also highly advantageous where aluminum metallization is used or other metallization where thermal cycling is required.
For a better understanding of the invention, reference is made to the accompanying drawings in which:~ Fig. 1 shows a graph of same data on dielectric constant for polysiloxane films made from a variety of alkylalkoxysilanes; Fig. 2 shows a graph of same data on breakdown voltage for polysiloxane films made from a variety of alkylalkoxysilanes; Fig. 3 shows a graph of same data on thermal effect on film thickness for polysiloxane films made from a variety of alkylalkoxysilanes; Fig. 4 shows a cross-sectional view of a portion of a typical integrated circuit showing certain features of such circuit including a cap layer made of a polysiloxane material; Fig. 5 shows a cross-sectional view of a portion of a more complex integrated circuit with a cap material made in accordance with an embodiment of the invention; and Fig. 6 shows a cross-sectional view of a portion of an integrated circuit in which polysiloxane is used as an interlevel dielectric to separate two levels of aluminum metallization.
It has been discovered, that certain siliconcontaining polymers made by plasma-polymerization of certain oxygen-containing organosilicon compounds yield polysiloxane polymer films with unusually good properties for use in integrated circuits, especially VLSI-type circuits with high densities of circuit elements and short access times (typically less than 10-6 or 10-7 seconds). The films can be of benefit to a large variety of circuits. Such circuits preferably contain semiconductor material (e.g., silicon, germanium, gallium arsenide, etc.), substrate (often also the semiconducting material), conductor elements (e.g., aluminum) and various doped regions.
Various alkylalkoxysilanes may be used as monomers provided the number of carbons in the alkyl group and the number of carbons in the alkoxy group does not exceed three. Generally up to 20 percent of substances outside this class may be used to alter the properties of the polymer (fillers, cross-linking agents), property modifiers of various kinds, etc.). Although for most applications, the monomer should mainly consist of the class described abdve. More than one alkylalkoxysilane may be used as the monomer although ordinarily only a single monomer is used.
Preferred are alkylalkoxysilane monomers in which the alkyl groups are methyl groups. Most preferred is the trimethylmethoxysilane monomer because the resulting polymer has very low dielectric constant, high thermal stability and excellent adherence properties. These properties are highly advantageous for many circuit applications for a number of reasons. Dielectric constant often limits access times and clock frequencies in many memory and logic circuits.
Thermal cycling is often required in the fabrication of integrated circuits, especially those containing aluminum conducting elements. Adherence is especially important in encapsulation applications and where multiple conducting layers are used.
The thickness of layers may vary over large limits (often as thin as 0.05 ,um) and usually depends on the particular application. Typical is from 0.2 to 100 micrometers. For many circuit applications, thicknesses from 0.5 to 10 micrometers usually yield satisfactory results. For many applications, the film should be as thin as possible without incurring any deleterious effects. For example, in some circuit applications, it is desirable to minimize thickness so as to minimize capacitance effects but maintain sufficient thickness to prevent voltage breakdown and diffusion through the film. Often optimum thickness from this point of view occurs between 0.5 and 2 micrometers.
A plasma discharge procedure is used to produce the polymer film from the monomer.
Satisfactory results are obtained from conventional procedures described in detail in a number of books and references. Typical books are Technique andApplications of Plasma Chemistry, edited by J. R. Hollaban and A. T. Bell (Wiley-lnterscience, New York, 1974), especially M. Millard, Chapter 5, page 177 and Plasma Polymerization, edited by M. Shen and A. T. Bell, ACS Symposium Series No. 108 (American Chemical Society, Washington, D.C., 1 979).
The particular apparatus used in the experiments described below is typical of equipment used for plasma-induced polymerization. The films were deposited in a parallel plate, 40 cm diameter, radial flow reactor. The electrode gap was about 2 cm and the operating frequency about 13.56 MHz. Both the RF excited electrode and the grounded (susceptor) plates were water cooled at a temperature of about 35-40 degrees C.
The reagents were obtained commercially and were used without further preparation. All the chemicals used were liquids at room temperature and flow rates were adjusted using a needle valve to give a system pressure of 50 millitorr in the absence of a plasma. The pressure without the introduction of monomer was about 5 millitorr.
The plasma was operated at about 50 volts and films were deposited on a precleaned silicon substrate mounted on the bottom grounded plate.
Film thickness and refractive index were determined ellipsometrically with an Ellipsometer II (Applied Materials Corp), with film thicknesses cross-checked using a Nanospec (Nanometrics). Film stoichiometry was determined from Rutherford backscattering measurements. Film stress measurements were obtained using an optically-levered laser beam method wherein stress is determined from changes induced in the radius of curvature of a substrate after a film is deposited. Contact angle measurements were made using a Rame-Hart goniometer.
Electrical properties were obtained by first evaporating Al dots on the films and, in the case of the dielectric constant determination, obtaining a C-V curve and measuring the capacitance in accumulation. Breakdown voltage measurements were obtained by probing 100 dots per film and measuring the voltage required to pass 2 yA of current.
Various monomers were used in these experiments, corresponding to O/Si mole ratios from zero (tetramethylsilane) or 1 (trimethylmethoxysilane) to 4 (tetramethoxysilane). The experiments showed that deposition rate is essentially the same (about 60 Angstroms per minute) for O/Si ratios from one to four. Film stress is essentially zero for O/Si ratios of zero and increases from about 3 to 5 x 108 dynes per square centimeter as O/Si ratios increase from one to four. Such stresses are quite reasonable for most applications including use in circuit applications. The polysiloxane polymers become less hydrophobic as the ratio O/Si increases from one to four with both tetramethylsilane and trimethylmethoxysilane most hydrophobic. Index of refraction decreases modestly with increasing ratio of O/Si from 0 to 4.
Of particular significance is the dielectric behavior of the film as a function of film composition. Fig. 1 shows a graph of dielectric constant versus film composition (in terms of monomer starting material). As stated above, low dielectric constant is highly advantageous in modern circuit applications. Dielectric constant is a minimum for O/Si ratio of one (corresponding to the monomer trimethylmethoxysilane). Largely because of this low dielectric constant and other good properties of this polymer, the polymer resulting from plasma-induced polymerization of trimethylmethoxysilane is most preferred.
The dielectric strength of the films were also measured. The dielectric strength was quite low for O/Si equal to 0 and 4. The average values were less than 100 volts per micrometer.
However, for O/Si ratio 1 and 3 (trimethylmethoxysilane and methyltrimethoxysilane, respectively), the breakdown voltage averages in excess of several hundred volts per micrometer.
A convenient way of evaluating the breakdown characteristics of a film is to plot the "sport" population against the monomer composition.
The "sport" population is the percent of dots probed that have breakdown voltages less than 100 volts per micrometer. Such data are shown in Fig. 2 for various starting monomers. The particularly low values for O/Si ratios of 1 and 3 are highly advantageous in applications involving electrical circuits. The other O/Si ratios may be higher due to softness of the films and the probe used in the measurements.
The thermal properties of several polysiloxane films were also examined. This was done by exposing the film to a temperature of 300 degrees C for one hour in air and measuring the percent reduction in film thickness. The results of these experiments are given in Fig. 3. Here, the percent reduction in thickness is plotted as a function of the ratio of O/Si of the monomer used. Although all the polymer films exhibit excellent thermal stability, the thermal stability of the polymer film made from trimethylmethoxysilane is especially good. The thickness was only reduced by about 2.5 percent after being exposed to the heat treatment described above.
Although all of the polymer films made from alkylalkoxysilane monomers exhibit excellent properties particularly for electronic applications, the polymer films made from trimethylmethoxysilane exhibit exceptionally good properties for such applications. The dielectric constant and film stress are minimal or near minimal, while properties such as hydrophobicity, dielectric strength and thermal stability are maximum or near maximum. Additional experiments showed that polymer films made by plasma-induced polymerization of trimethylmethoxysilane has excellent adhesion as evidenced by the Scotch tape pull test and surviving a patterning process on a topographical surface. The film is readily patterned using a Cm4+02 plasma but is quite resistant to an 02 plasma.This permits plasma stripping of resist in the presence of the polysiloxane film. The thermal stability was particularly impressive as evidenced by the fact that even at 450 degrees C in the presence of forming gas or nitrogen, the film contracts only a few percent.
Fig. 4 shows a cross-sectional view of a typical integrated circuit 40 with various features as labeled (such as p+ channels, n+ channels, etc.).
The circuit is conveniently described as a CMOS (Complementary Metal Oxide Semiconductor) circuit with a single tub single polysilicon structure exhibiting five micrometer design rules.
The exact features of the integrated circuit are not critical to understanding the invention and will be described only briefly. The substrate of the circuits is made of relatively heavily n doped silicon (typically phosphorus doped in the concentration range of roughly 1018 atoms per cubic centimeter). This region is marked n+ in the diagram. A lighter-doped region covers the n+ region (marked n-) and various other regions are marked such as PTuB regions, n+ channels and p+ channels. The CHANSTOP region is used to electrically isolate one region from another. An oxide region 41 is also part of the circuit. This oxide is usually SiO2 and is often called a field oxide or FOX region. A polysilicon region 42 and aluminum region 43 are also shown as well as a glass region 44 (usually phosphorus glass).The entire circuit is covered with a layer of piasmapolymerized polysiloxane 45. Usually the thickness varies between 0.5 and 2 micrometers.
Fig. 5 shows a side view of a more complex CMOS circuit 50 with PTUB and NTUB as wellas we TUB II as p- type channels (PCh) and n-type channels (inch).
There are also regions of heavy p-type doping (p+) and heavy n-type doping (n+). Certain regions have very thin oxide layers 51 usually made of SiO2 and some thicker oxide layers 52 (again usually SiO2) often referred to as field oxide or FOX. There is also a layer of TaSi2 53 (often polycrystalline silicon is used in the same capacity) and various conducting layers 54 usually made of aluminum. Layers of phosphorus glass 55 are also used in the structure. As a capping layer 56, a polysiloxane layer is put down by plasma-induced polymerization of trimethylmethoxysilane over the entire structure. The film is used as a protective layer and is usually about one micrometer thick.
Fig. 6 shows a somewhat more complex structure 60 with many of the features shown in Fig. 6 including gate oxide 61, field oxide 62, TaSi2 layer 63, phosphorus glass layer 64 and aluminum layer 65. Also shown is the polysiloxane layer 66 covering a large portion of the circuit. A particular difference between this circuit and the circuit shown in Fig. 5 is the use of a top aluminum metal layer to selectively contact a bottom aluminum metal layer. Here, the polysiloxane is used not only as an encapsulating layer but also as an interlevel dielectric to separate the top level of aluminum from the rest of the circuit.

Claims (14)

Claims
1. A semiconductor electrical apparatus comprising semiconductor material and conducting elements, characterized in that the apparatus further comprises polysiloxane film made by plasma-induced polymerization of at least one alkylalkoxysilane with the alkyl and alkoxy groups containing up to 3 carbon atoms.
2. Apparatus according to claim 1, wherein the alkyl group is a methyl group.
3. Apparatus according to claim 2, wherein the alkoxy group is a methoxy group.
4. Apparatus according to claim 3, wherein the alkylalkoxysilane is trimethylmethoxysilane.
5. Apparatus according to claim 1, wherein the conducting elements comprise aluminum.
6. Apparatus according to claim 1, wherein the thickness of the polysiloxane film is between 0.05 and 100 micrometers.
7. Apparatus according to claim 6, wherein the thickness of the polysiloxane film is between 0.5 and 10 micrometers.
8. Apparatus according to claim 7, wherein the thickness of the polysiloxane film is between 0.5 and 2.0 micrometers.
9. Apparatus according to claim 1, wherein at least two of the conducting elements have spacing less than two microns.
10. Apparatus according to claim 1, wherein the semiconducting material is selected from silicon, gallium arsenide and germanium.
11. Apparatus according to claim 10, wherein the semiconducting material is silicon.
12. Apparatus according to claim 11, wherein the semiconducting electrical apparatus is a memory circuit.
13. Apparatus according to claim 11, wherein the semiconducting electrical apparatus is a logic circuit.
14. Semiconductor electrical apparatus substantially as hereinbefore described with reference to any one of the Figs. of the accompanying drawings.
GB08321502A 1982-08-13 1983-08-10 Polymeric films for electronic circuits Expired GB2125423B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US40800582A 1982-08-13 1982-08-13

Publications (3)

Publication Number Publication Date
GB8321502D0 GB8321502D0 (en) 1983-09-14
GB2125423A true GB2125423A (en) 1984-03-07
GB2125423B GB2125423B (en) 1985-09-04

Family

ID=23614453

Family Applications (1)

Application Number Title Priority Date Filing Date
GB08321502A Expired GB2125423B (en) 1982-08-13 1983-08-10 Polymeric films for electronic circuits

Country Status (8)

Country Link
JP (1) JPS5948929A (en)
BE (1) BE897503A (en)
CA (1) CA1204527A (en)
DE (1) DE3329065A1 (en)
FR (1) FR2531811B1 (en)
GB (1) GB2125423B (en)
IT (1) IT1203708B (en)
NL (1) NL8302845A (en)

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0204631A2 (en) * 1985-06-04 1986-12-10 Fairchild Semiconductor Corporation Semiconductor structures having polysiloxane leveling film
EP0270241A2 (en) * 1986-12-04 1988-06-08 Dow Corning Corporation Multilayer ceramics from silicate esters
EP0270263A2 (en) * 1986-12-04 1988-06-08 Dow Corning Corporation Multilayer ceramic coatings from metal oxides for protection of electronic devices
EP0270231A2 (en) * 1986-12-04 1988-06-08 Dow Corning Corporation Platinum or rhodium catalyzed multilayer ceramic coatings from hydrogen silsequioxane resin and metal oxides
EP0270369A2 (en) * 1986-12-03 1988-06-08 Dow Corning Corporation Multilayer ceramics from hydrogen silsesquioxane
EP0323103A2 (en) * 1987-12-28 1989-07-05 Dow Corning Corporation Multilayer ceramics coatings from the ceramification of hydrogen silsesquioxane resin in the presence of ammonia
EP0353818A1 (en) * 1988-07-29 1990-02-07 ENIRICERCHE S.p.A. Process for depositing organosilanes on substrates of silicon or silicon oxide for devices of EOS or CHEMFET type
US5858880A (en) * 1994-05-14 1999-01-12 Trikon Equipment Limited Method of treating a semi-conductor wafer
EP0935283A2 (en) * 1998-02-05 1999-08-11 Asm Japan K.K. Silicone polymer insulation film on semiconductor substrate and method for forming the film
US6242366B1 (en) 1996-08-24 2001-06-05 Trikon Equipments Limited Methods and apparatus for treating a semiconductor substrate
US6287989B1 (en) 1992-07-04 2001-09-11 Trikon Technologies Limited Method of treating a semiconductor wafer in a chamber using hydrogen peroxide and silicon containing gas or vapor
US6294438B1 (en) * 1993-08-05 2001-09-25 Matsushita Electronics Corporation Semiconductor device having capacitor and manufacturing method thereof
EP1160848A2 (en) * 2000-05-22 2001-12-05 JSR Corporation Composition for silica-based film formation
WO2003104305A1 (en) * 2002-04-18 2003-12-18 Lg Chem, Ltd. Organic silicate polymer and insulation film comprising the same
US8398904B2 (en) 2005-11-30 2013-03-19 Lg Chem, Ltd. Microcellular foam of thermoplastic resin prepared with die having improved cooling property and method for preparing the same

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60225447A (en) * 1984-04-23 1985-11-09 Mitsubishi Electric Corp Manufacture of semiconductor device
US4723978A (en) * 1985-10-31 1988-02-09 International Business Machines Corporation Method for a plasma-treated polysiloxane coating
US4732841A (en) * 1986-03-24 1988-03-22 Fairchild Semiconductor Corporation Tri-level resist process for fine resolution photolithography
JPS63213347A (en) * 1987-02-27 1988-09-06 Mitsubishi Electric Corp Semiconductor device
JPH02291129A (en) * 1989-04-28 1990-11-30 Nec Corp Semiconductor device
DE9206834U1 (en) * 1992-02-21 1993-06-17 Robert Bosch Gmbh, 70469 Stuttgart Connection part
JP2934353B2 (en) * 1992-06-24 1999-08-16 三菱電機株式会社 Semiconductor device and manufacturing method thereof

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1347948A (en) * 1961-12-15 1964-01-04 Pacific Semiconductors Process for esterification of silicon dioxide at atmospheric pressure
JPS5850417B2 (en) * 1979-07-31 1983-11-10 富士通株式会社 Manufacturing method of semiconductor device
JPS5760330A (en) * 1980-09-27 1982-04-12 Fujitsu Ltd Resin composition

Cited By (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0204631A3 (en) * 1985-06-04 1987-05-20 Fairchild Semiconductor Corporation Semiconductor structures having polysiloxane leveling film
EP0204631A2 (en) * 1985-06-04 1986-12-10 Fairchild Semiconductor Corporation Semiconductor structures having polysiloxane leveling film
EP0270369A2 (en) * 1986-12-03 1988-06-08 Dow Corning Corporation Multilayer ceramics from hydrogen silsesquioxane
EP0270369A3 (en) * 1986-12-03 1989-12-13 Dow Corning Corporation Multilayer ceramics from hydrogen silsesquioxane
EP0270241A3 (en) * 1986-12-04 1990-02-07 Dow Corning Corporation Multilayer ceramics from silicate esters
EP0270241A2 (en) * 1986-12-04 1988-06-08 Dow Corning Corporation Multilayer ceramics from silicate esters
EP0270263A2 (en) * 1986-12-04 1988-06-08 Dow Corning Corporation Multilayer ceramic coatings from metal oxides for protection of electronic devices
EP0270231A2 (en) * 1986-12-04 1988-06-08 Dow Corning Corporation Platinum or rhodium catalyzed multilayer ceramic coatings from hydrogen silsequioxane resin and metal oxides
EP0270263A3 (en) * 1986-12-04 1989-12-13 Dow Corning Corporation Multilayer ceramic coatings from metal oxides for protection of electronic devices
EP0270231A3 (en) * 1986-12-04 1989-12-13 Dow Corning Corporation Platinum or rhodium catalyzed multilayer ceramic coatings from hydrogen silsequioxane resin and metal oxides
EP0323103A3 (en) * 1987-12-28 1990-03-21 Dow Corning Corporation Multilayer ceramics coatings from the ceramification of hydrogen silsesquioxane resin in the presence of ammonia
EP0323103A2 (en) * 1987-12-28 1989-07-05 Dow Corning Corporation Multilayer ceramics coatings from the ceramification of hydrogen silsesquioxane resin in the presence of ammonia
EP0353818A1 (en) * 1988-07-29 1990-02-07 ENIRICERCHE S.p.A. Process for depositing organosilanes on substrates of silicon or silicon oxide for devices of EOS or CHEMFET type
US6287989B1 (en) 1992-07-04 2001-09-11 Trikon Technologies Limited Method of treating a semiconductor wafer in a chamber using hydrogen peroxide and silicon containing gas or vapor
US6294438B1 (en) * 1993-08-05 2001-09-25 Matsushita Electronics Corporation Semiconductor device having capacitor and manufacturing method thereof
US5858880A (en) * 1994-05-14 1999-01-12 Trikon Equipment Limited Method of treating a semi-conductor wafer
US6242366B1 (en) 1996-08-24 2001-06-05 Trikon Equipments Limited Methods and apparatus for treating a semiconductor substrate
EP0935283A2 (en) * 1998-02-05 1999-08-11 Asm Japan K.K. Silicone polymer insulation film on semiconductor substrate and method for forming the film
EP0935283A3 (en) * 1998-02-05 2005-06-15 Asm Japan K.K. Silicone polymer insulation film on semiconductor substrate and method for forming the film
EP1160848A2 (en) * 2000-05-22 2001-12-05 JSR Corporation Composition for silica-based film formation
EP1160848A3 (en) * 2000-05-22 2007-04-11 JSR Corporation Composition for silica-based film formation
WO2003104305A1 (en) * 2002-04-18 2003-12-18 Lg Chem, Ltd. Organic silicate polymer and insulation film comprising the same
US7834119B2 (en) 2002-04-18 2010-11-16 Lg Chem, Ltd. Organic silicate polymer and insulation film comprising the same
US8398904B2 (en) 2005-11-30 2013-03-19 Lg Chem, Ltd. Microcellular foam of thermoplastic resin prepared with die having improved cooling property and method for preparing the same

Also Published As

Publication number Publication date
DE3329065A1 (en) 1984-02-16
IT1203708B (en) 1989-02-15
JPS5948929A (en) 1984-03-21
NL8302845A (en) 1984-03-01
FR2531811B1 (en) 1986-10-31
GB8321502D0 (en) 1983-09-14
IT8322560A0 (en) 1983-08-12
CA1204527A (en) 1986-05-13
BE897503A (en) 1983-12-01
FR2531811A1 (en) 1984-02-17
GB2125423B (en) 1985-09-04

Similar Documents

Publication Publication Date Title
GB2125423A (en) Polymeric films for electronic circuits
US6531193B2 (en) Low temperature, high quality silicon dioxide thin films deposited using tetramethylsilane (TMS) for stress control and coverage applications
KR960000376B1 (en) Forming method of silicon oxide film containing fluorine
US6593655B1 (en) Method for producing hydrogenated silicon oxycarbide films having low dielectric constant
KR960013151B1 (en) Chemical depositing method for silicon oxide film
US6667553B2 (en) H:SiOC coated substrates
Gupta et al. The preparation, properties and applications of silicon nitride thin films deposited by plasma-enhanced chemical vapor deposition
JP2975919B2 (en) Underlayer surface modification method and semiconductor device manufacturing method
US6911405B2 (en) Semiconductor device and method of manufacturing the same
US4647472A (en) Process of producing a semiconductor device
US6673725B2 (en) Semiconductor device and method of manufacturing the same
Chen et al. Photo‐CVD for VLSI Isolation
KR100486333B1 (en) Semiconductor apparatus and method of manufacturing the same
US20070237970A1 (en) Diffusion barrier with low dielectric constant and semiconductor device containing same
JP2004523889A (en) Metal ion diffusion barrier layer
KR100476127B1 (en) Semiconductor device and method of manufaturing the same
JP3845061B2 (en) Semiconductor device and manufacturing method thereof
Lakhani Device-quality SiO2 films on InP and Si obtained by operating the pyrolytic CVD reactor in the retardation regime
Alonso et al. Low temperature sio2 films deposited by plasma enhanced techniques
Plais et al. Electrical properties of distributed electron cyclotron resonance plasma‐deposited SiO2‐InP diodes
Loboda et al. Deposition of low-K dielectric films using trimethylsilane
US4443489A (en) Method for the formation of phosphorous-nitrogen based glasses useful for the passivation of III-V semiconductor materials
Pai High quality voids free oxide deposition
Gupta et al. Plasma enhanced chemical vapour deposition silicon nitride for microelectronic applications
Zhang Parylene as an interlayer dielectric

Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee