JPS63213347A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS63213347A
JPS63213347A JP62045840A JP4584087A JPS63213347A JP S63213347 A JPS63213347 A JP S63213347A JP 62045840 A JP62045840 A JP 62045840A JP 4584087 A JP4584087 A JP 4584087A JP S63213347 A JPS63213347 A JP S63213347A
Authority
JP
Japan
Prior art keywords
film
semiconductor device
buffer coat
silicon ladder
alpha
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62045840A
Other languages
Japanese (ja)
Inventor
Hajime Arai
新井　肇
Shigeru Harada
繁 原田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62045840A priority Critical patent/JPS63213347A/en
Priority to DE3805490A priority patent/DE3805490A1/en
Publication of JPS63213347A publication Critical patent/JPS63213347A/en
Pending legal-status Critical Current

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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • H01L23/296—Organo-silicon compounds
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    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135—Double encapsulation or coating and encapsulation
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    • H01L23/3157—Partial encapsulation or coating
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    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48699—Principal constituent of the connecting portion of the wire connector being Aluminium (Al)
    • H01L2224/487—Principal constituent of the connecting portion of the wire connector being Aluminium (Al) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48717—Principal constituent of the connecting portion of the wire connector being Aluminium (Al) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950 °C
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Abstract

PURPOSE:To obtain a high reliability semiconductor device which is small in its consumption current and capable of high-speed operation, by using an inorganic high molecular film as a buffer coat film or an alpha-ray screening film. CONSTITUTION:A silicon ladder polymer film 13 which functions as a buffer coat film is formed on a final protective film 5 of a semiconductor substrate 1. This silicon ladder polymer 13 is made 20mum or more in film thickness When it is used as an alpha-ray screening film. Since an inorganic high molecular film 13 having excellent electrical characteristics, that is, an excellent heat-resisting performance, a small permittivity, a dielectric loss tangent, and the like is used as the buffer coat film or the alpha-ray screening film, reliability can be improved and further a decrease in consumption current and a high-speed operation can be realized.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、モールド樹脂封止型半導体装置のバッファ
コート膜（応力緩衝膜）、及びα線遮蔽膜に関するもの
である。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a buffer coat film (stress buffer film) and an α-ray shielding film for a molded resin-encapsulated semiconductor device.

〔従来の技術〕[Conventional technology]

第３図及び第４図は従来の半導体装置を示す断面図であ
り、図において、■は半導体基板、２は該基板１上に形
成されたトランジスタ部、４は該基板１上に下地絶縁膜
３を介して形成されたアルミ配線、５は基板１全面に形
成され、トランジスタ部２やアルミ配線４を保護する最
終保護膜、６は上記アルミ配線４に接続されたボンディ
ングワイヤ、７は上記最終保護膜Ｓ上に形成されたポリ
イミド膜、８は全体を封止しているモールド樹脂、９は
該モールド樹脂８中に含まれるフィラー、１０はモール
ド樹脂８中に生ずる応力である。3 and 4 are cross-sectional views showing conventional semiconductor devices. In the figures, ■ is a semiconductor substrate, 2 is a transistor portion formed on the substrate 1, and 4 is a base insulating film formed on the substrate 1. 3 is an aluminum wiring formed through the substrate 1, 5 is a final protective film formed on the entire surface of the substrate 1 to protect the transistor section 2 and the aluminum wiring 4, 6 is a bonding wire connected to the aluminum wiring 4, and 7 is the final protective film. The polyimide film formed on the protective film S, 8 is a mold resin that seals the whole, 9 is a filler contained in the mold resin 8, and 10 is stress generated in the mold resin 8.

このようなモールド樹脂封止型半導体装置において、モ
ールド樹脂８と半導体チップ（基板）１との熱膨張係数
の差により生じる応力１０は著しく大きく、このため第
４図に示すものでは最終保護膜５にクラック１１が生じ
たり、アルミ配線４に機械的変形部１２ができたりする
。その結果、モールド樹脂８の中を浸透してきた水分等
が、クラック１１部を通り侵入してくるので、アルミ配
線４が腐食されたり、素子特性が劣化したりするという
信頼性上の問題があった。また、アルミ配線４の機械的
変形は、隣接するアルミ配線とのショート、あるいは、
両配線間の耐圧不良を引き起こすという問題もある。さ
らに、モールド樹脂８の熱膨張係数を半導体チップ１の
それに近づけるためにモールド樹脂日中にフィラーと呼
ばれる固形物９が混入されているが、これがトランジス
タ２の上部を局部的に押すことに起因するトランジスタ
の誤動作も、特に、ＭＯＳメモリ・デバイスにおいて大
きな問題となっている。In such a molded resin sealed semiconductor device, the stress 10 caused by the difference in thermal expansion coefficient between the molded resin 8 and the semiconductor chip (substrate) 1 is extremely large. Cracks 11 may occur in the aluminum wiring 4, and mechanically deformed portions 12 may be formed in the aluminum wiring 4. As a result, moisture, etc. that have penetrated into the mold resin 8 enter through the crack 11, causing reliability problems such as corrosion of the aluminum wiring 4 and deterioration of device characteristics. Ta. In addition, mechanical deformation of the aluminum wiring 4 may cause a short circuit with an adjacent aluminum wiring, or
There is also the problem of causing a breakdown voltage failure between both wirings. Furthermore, in order to bring the coefficient of thermal expansion of the mold resin 8 closer to that of the semiconductor chip 1, a solid substance 9 called a filler is mixed into the mold resin, but this is caused by locally pressing the upper part of the transistor 2. Transistor malfunction is also a major problem, especially in MOS memory devices.

そこで、このような問題を解決するために、従来から、
第３図に示すように半導体チップ１表面をバッファコー
トとして機能するポリイミド等の有機ポリマーｌＩ！７
で覆うという方法が用いられてきた。このポリイミド膜
７は、比較的柔らかく、モールド樹脂８の応力１０を緩
衝する働きをするので、半導体チップ１の表面には、大
きな応力は働かず、最終保護膜５のクランクやアルミ配
線４の機械的変形の発生を防止することができる。また
、フィラー９によるトランジスタの誤動作も防止できる
。通常、上記ポリイミド膜７をバッファコート膜として
用いる場合、その膜厚は２〜１０μｍ程度であるが、α
線遮蔽膜として用いる場合には２０μｍ以上の膜厚が必
要である。Therefore, in order to solve such problems, conventionally,
As shown in FIG. 3, an organic polymer such as polyimide serves as a buffer coat on the surface of the semiconductor chip 1! 7
A method of covering the area has been used. This polyimide film 7 is relatively soft and functions to buffer the stress 10 of the molding resin 8, so that no large stress is applied to the surface of the semiconductor chip 1, and the final protective film 5 crank and aluminum wiring 4 mechanical It is possible to prevent the occurrence of physical deformation. Further, malfunction of the transistor due to the filler 9 can also be prevented. Normally, when the polyimide film 7 is used as a buffer coat film, the film thickness is about 2 to 10 μm, but α
When used as a radiation shielding film, a film thickness of 20 μm or more is required.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の半導体装置は以上の様に構成されており、バッフ
ァコート膜としてポリイミド膜７が多く用いられている
が、ポリイミドは有機高分子であり、５０％分解開始温
度は４００〜５００℃と余り高くなく、また溶剤は極性
の強いＮＭＰ　（Ｎ−メチル−２−ピロリドン）で吸湿
性が非常に強く、扱いが難しく、さらにポリイミド前駆
体の分子量安定性が悪いため冷蔵保存が必要である等と
いう問題点があった。Conventional semiconductor devices are constructed as described above, and a polyimide film 7 is often used as a buffer coat film, but polyimide is an organic polymer and its 50% decomposition starting temperature is too high at 400 to 500°C. In addition, the solvent is NMP (N-methyl-2-pyrrolidone), which is highly polar and highly hygroscopic, making it difficult to handle.Furthermore, the polyimide precursor has poor molecular weight stability, requiring refrigerated storage. There was a point.

この発明は上記の様な問題点を解消するためになされた
もので、バッファコート膜及びα線遮蔽膜の特性を改善
でき、これにより信頼性が高く、消費電流が少ない高速
動作可能な半導体装置を得ることを目的とする。This invention was made to solve the above-mentioned problems, and it is possible to improve the characteristics of the buffer coat film and the α-ray shielding film, thereby achieving a semiconductor device with high reliability, low current consumption, and high-speed operation. The purpose is to obtain.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係る半導体装置は、封止樹脂の応力を緩衝す
るバッファコート膜或いは素子部へのα線の入射を防ぐ
α線遮蔽膜として無機高分子膜を用いたものである。The semiconductor device according to the present invention uses an inorganic polymer film as a buffer coat film for buffering the stress of the sealing resin or as an α-ray shielding film for preventing α-rays from entering the element portion.

〔作用〕[Effect]

この発明においては、バッファコート膜、或いはαｖＡ
！蔽膜として、優れた耐熱性、低い誘電率。In this invention, a buffer coat film or αvA
! Excellent heat resistance and low dielectric constant as a shielding film.

低い誘電正接等の優れた電気的特性を持つ無機高分子膜
を用いたから、信頼性を向上できるとともに消費電流の
低減及び高速化を図ることができる。Since an inorganic polymer film having excellent electrical properties such as a low dielectric loss tangent is used, reliability can be improved, and current consumption can be reduced and speeds can be increased.

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する。第１
図は本発明の一実施例による半導体装置を示し、図にお
いて、１は半導体基板、２は該半導体基板１上の一部に
形成されたトランジスタ部、４は該基板１上に下地絶縁
膜３を介して形成されたアルミ配線、５は上記基板１全
面に形成され、トランジスタ部２、アルミ配線４等を保
護する最終保護膜、６は上記アルミ配線４に接続された
ボンディングワイヤ、１３は上記最終保護膜５上に形成
されバッファコート膜として機能するシリコンラダーポ
リマー膜、８は全体を封止するモールド樹脂、９はモー
ルド樹脂８中に含まれるフィラーである。An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure shows a semiconductor device according to an embodiment of the present invention. In the figure, 1 is a semiconductor substrate, 2 is a transistor portion formed on a part of the semiconductor substrate 1, and 4 is a base insulating film 3 formed on the substrate 1. 5 is a final protective film formed on the entire surface of the substrate 1 to protect the transistor section 2, aluminum wiring 4, etc.; 6 is a bonding wire connected to the aluminum wiring 4; 13 is a bonding wire formed through the aluminum wiring 4; A silicon ladder polymer film is formed on the final protective film 5 and functions as a buffer coat film, 8 is a mold resin for sealing the entire structure, and 9 is a filler contained in the mold resin 8.

また第２図はシリコンラダーポリマーの分子構造を示し
、ｐｈはフェニール基である。上記シリコンラダーポリ
マー１３の膜厚は、バッファコート膜として用いる場合
には、２〜ｌＯμｍとするのが一般的であり、完全にα
線を遮蔽するα線遮蔽膜として用いる場合には２０μｍ
以上の膜厚とする必要がある。Moreover, FIG. 2 shows the molecular structure of silicon ladder polymer, and pH is a phenyl group. The film thickness of the silicon ladder polymer 13 is generally 2 to 10 μm when used as a buffer coat film, and is completely α
20 μm when used as an α-ray shielding film to shield radiation.
It is necessary to set the film thickness to or above.

次に作用効果について説明する。Next, the effects will be explained.

このような本実施例の半導体装置ではポリイミド膜７を
用いた場合と同じく、モールド樹脂８の応力１０を緩衝
することができ、これにより、半導体基板１の表面に大
きな応力が働かず、最終保護膜５のクラ・シフ１１やア
ルミ配線４の機械的変形部１２の発生を防止することが
でき、またもちろんフィラー９によるトランジスタの誤
動作も防止できる。さらにシリコンラダーポリマーは無
機高分子であるのでポリイミドに比べ耐熱性に優れてお
り、つまり５％分解開始温度はポリイミドでは４００〜
５００℃であるのに対し、シリコンラダーポリマーでは
５００〜５５０℃である。また、比誘電率ε、は３．２
．誘電正接ｔａｎδは０．０４％（ＩＫＨｚ）とポリイ
ミドに比べやや低く、絶縁破壊電界や、体積抵抗率ρ等
の電気的特性も優れており、より高性能（高速、低消費
電流）化することが可能である。In the semiconductor device of this embodiment, the stress 10 of the molding resin 8 can be buffered as in the case where the polyimide film 7 is used, so that no large stress is exerted on the surface of the semiconductor substrate 1, and the final protection It is possible to prevent cracks 11 in the film 5 and mechanically deformed portions 12 in the aluminum wiring 4 from occurring, and of course malfunction of the transistor due to the filler 9 can also be prevented. Furthermore, since silicon ladder polymer is an inorganic polymer, it has superior heat resistance compared to polyimide, meaning that the temperature at which 5% decomposition begins is 400~400℃ for polyimide.
500°C, whereas for silicon ladder polymer it is 500-550°C. Also, the relative permittivity ε is 3.2
．． The dielectric loss tangent tan δ is 0.04% (IKHz), which is slightly lower than polyimide, and the electrical properties such as dielectric breakdown electric field and volume resistivity ρ are also excellent, allowing for higher performance (high speed, low current consumption). is possible.

またポリイミドの場合塗布液自身の分子量安定性が悪く
、さらにその溶媒がＮＭＰ　（Ｎ−メチル−２−ピロリ
ドン）等の掻性溶媒で吸湿性が強く、樹脂の膜厚安定性
に悪影響を与えるなどの問題があったが、シリコンラダ
ーポリマーでは溶媒はアニソール、ＴＨＦ、トルエン等
の無極性の有機溶媒で吸湿性は弱く、又シリコンラダー
ポリマー自体の分子量安定性も優れている。従ってバッ
ファコート膜やα線遮蔽膜としてシリコンラダーポリマ
ー膜を用いた場合、その電気的特性及び信鎖性を向上で
きる。In addition, in the case of polyimide, the molecular weight stability of the coating liquid itself is poor, and the solvent used is a scratchy solvent such as NMP (N-methyl-2-pyrrolidone), which is highly hygroscopic and has a negative impact on the stability of the resin film thickness. However, silicon ladder polymers use nonpolar organic solvents such as anisole, THF, and toluene as solvents, and have weak hygroscopicity, and the silicon ladder polymer itself has excellent molecular weight stability. Therefore, when a silicon ladder polymer film is used as a buffer coat film or an α-ray shielding film, its electrical characteristics and reliability can be improved.

なお、上記実施例では、シリコンラダー構造に付与され
る官能基としてフェニール基を例に取って説明したが、
これはメチル基等のアルキル基であってもよく、官能基
の選定により更に優れたポリマーとすることも可能であ
る。又、ラダー構造を持たないシラノール（Ｓ　ｔ　　
（ＯＨ）　ａ　）で水酸基の一部をアルキル基、フェニ
ール基等の官能基と置換したものをシリコンラダーポリ
マーの代わりに用いることも可能である。In addition, in the above example, phenyl group was explained as an example of a functional group imparted to the silicon ladder structure.
This may be an alkyl group such as a methyl group, and it is also possible to obtain a more excellent polymer by selecting the functional group. In addition, silanol (S t
It is also possible to use (OH) a) in which some of the hydroxyl groups are substituted with functional groups such as alkyl groups and phenyl groups in place of the silicon ladder polymer.

（発明の効果〕 以上のように、この発明によれば、バッファコート膜、
或いはα線遮蔽膜としてシリコンラダーポリマーのよう
な無機高分子膜を用いたので、バッファコート膜及びα
線遮蔽膜の特性を改善でき、これにより信頼性が高く、
消費電流が少ない高速動作可能な半導体装置を得ること
ができる。(Effects of the Invention) As described above, according to the present invention, the buffer coat film,
Alternatively, since an inorganic polymer film such as silicon ladder polymer was used as the α-ray shielding film, the buffer coat film and
The characteristics of the radiation shielding film can be improved, which makes it highly reliable.
A semiconductor device that consumes less current and can operate at high speed can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図はこの発明の一実施例による半導体装置を示す断
面図、第２図はシリコンラダーポリマーの分子構造を示
す図、第３図は従来の半導体装置を示す断面図、第４図
は従来の半導体装置における保護膜のクラックや配線の
変形を示す断面図である。 １・・・半導体基板、２・・・トランジスタ部、３・・
・下地絶縁膜、４・・・アルミ配線、５・・・最終保護
膜、６・・・ボンディングワイヤ、８・・・モールド樹
脂、９・・・モールド樹脂のフィラー、１０・・・モー
ルド樹脂の応力、１３・・・シリコンラダーポリマー膜
。 なお図中同一符号は同−又は相当部分を示す。FIG. 1 is a cross-sectional view showing a semiconductor device according to an embodiment of the present invention, FIG. 2 is a view showing the molecular structure of silicon ladder polymer, FIG. 3 is a cross-sectional view showing a conventional semiconductor device, and FIG. 4 is a cross-sectional view showing a conventional semiconductor device. FIG. 2 is a cross-sectional view showing cracks in a protective film and deformation of wiring in a semiconductor device of FIG. 1... Semiconductor substrate, 2... Transistor section, 3...
- Base insulating film, 4... Aluminum wiring, 5... Final protective film, 6... Bonding wire, 8... Mold resin, 9... Filler for mold resin, 10... Mold resin Stress, 13...Silicon ladder polymer film. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (3)

【特許請求の範囲】[Claims] （１）素子が形成された半導体基板上に応力緩衝膜或い
はα線遮蔽膜を形成し、これらをモールド樹脂で封止し
てなる半導体装置において、 上記応力緩衝膜或いはα線遮蔽膜として無機高分子膜を
用いたことを特徴とする半導体装置。(1) In a semiconductor device in which a stress buffer film or an α-ray shielding film is formed on a semiconductor substrate on which an element is formed, and these are sealed with a mold resin, an inorganic high A semiconductor device characterized by using a molecular film. （２）上記無機高分子膜は、２μｍ以上の膜厚を持つこ
とを特徴とする特許請求の範囲第１項記載の半導体装置
。(2) The semiconductor device according to claim 1, wherein the inorganic polymer film has a thickness of 2 μm or more. （３）上記無機高分子膜は、シリコンラダーポリマー膜
であることを特徴とする特許請求の範囲第１項または第
２項記載の半導体装置。(3) The semiconductor device according to claim 1 or 2, wherein the inorganic polymer film is a silicon ladder polymer film.
JP62045840A 1987-02-27 1987-02-27 Semiconductor device Pending JPS63213347A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP62045840A JPS63213347A (en) 1987-02-27 1987-02-27 Semiconductor device
DE3805490A DE3805490A1 (en) 1987-02-27 1988-02-22 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62045840A JPS63213347A (en) 1987-02-27 1987-02-27 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS63213347A true JPS63213347A (en) 1988-09-06

Family

ID=12730418

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62045840A Pending JPS63213347A (en) 1987-02-27 1987-02-27 Semiconductor device

Country Status (2)

Country Link
JP (1) JPS63213347A (en)
DE (1) DE3805490A1 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2613128B2 (en) * 1990-10-01 1997-05-21 三菱電機株式会社 Semiconductor device
JPH04261049A (en) * 1991-01-31 1992-09-17 Mitsubishi Electric Corp Semiconductor device and manufacture thereof
JPH05326718A (en) * 1992-05-25 1993-12-10 Mitsubishi Electric Corp Semiconductor device and manufacture thereof
DE69311774T2 (en) * 1992-08-28 1998-01-08 Dow Corning Method for producing an integrated circuit with a hermetic protection based on a ceramic layer
EP0586149A1 (en) * 1992-08-31 1994-03-09 Dow Corning Corporation Hermetic protection for integrated circuits, based on a ceramic layer
CA2104340A1 (en) * 1992-08-31 1994-03-01 Grish Chandra Hermetic protection for integrated circuits
US5438022A (en) 1993-12-14 1995-08-01 At&T Global Information Solutions Company Method for using low dielectric constant material in integrated circuit fabrication
US5711987A (en) * 1996-10-04 1998-01-27 Dow Corning Corporation Electronic coatings

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5336997B2 (en) * 1973-10-12 1978-10-05
DE3019239A1 (en) * 1980-05-20 1981-11-26 SIEMENS AG AAAAA, 1000 Berlin und 8000 München Semiconductor encapsulation with layers of differing hardness layer fo - has semiconductor embedded in second layer of soft material for protection against external effects and degradation
DD160568B1 (en) * 1981-06-18 1987-08-05 Dietrich Scheller PROCESS FOR SURFACE STABILIZATION OF SILICON SEMICONDUCTOR COMPONENTS
CA1204527A (en) * 1982-08-13 1986-05-13 Theodore F. Retajczyk, Jr. Polymeric films for electronic circuits
JPS5966157A (en) * 1982-10-08 1984-04-14 Fujitsu Ltd Semiconductor device and manufacture thereof

Also Published As

Publication number Publication date
DE3805490A1 (en) 1988-09-08

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