GB2110847A - Method of establishing a rotating priority in a daisy chain - Google Patents

Abstract

Modules 4 are arranged in a daisy chain of modules contending for control of a commonly shared bus line, 2. Each module provides a GROUT signal 6 in response to an input signal 8 GRIN, if it is not contending for control of the bus. However, if it is contending for the bus it inhibits the GROUT 6 signal from being propagated further down the chain and awaits a GRIN 8 signal to determine when it can take control. Each module is able to sustain the state information that it had control of the bus last by producing a last access signal 4. The module that had control in the previous bus cycle now has the lowest priority for access. Thus the priority rotates around the daisy chain. <IMAGE>

Description

SPECIFICATION Method and means for establishing a rotating priority in a daisy chain The present invention is concerned with method and means for establishing a rotating priority in a daisy chain and is related to the invention disclosed in our co-pending United Kingdom Patent Application No.

8133083.

In a shared system comprising a number of modules, each of which is contending for control of the system through a common bus, there must exist a technique for resolving the contention among the modules. In the prior art, two techniques are typically used: the serial resolution technique and the parallel resolution technique.

In the parallel resolution technique, contending modules are assigned priorities according to a prearranged scheme. A sorting circuit external to these modules then decides which of these modules is to have control based on the priorities of the modules at the moment.

Serial resolution normally involves some kind of daisy chain circuit with contending modules in a more or less straight line. The priority of these modules is typically determined by the module location; for example, the module upstream at one end of the daisy chain might have the highest priority, and the one downstream at the opposite end of the daisy chain might have the lowest priority.

The HP 2640 is an example where a serial contention resolution method is used.

Such a technique, however, has several disadvantages. One principal disadvantage is the time required to propagate a contention signal through the length of the daisy chain. This time essentially limits the number of modules that can be in the daisy chain.

Still another disadvantage to the conventional straight line priority system of the serial resolution technique is that the priority index is fixed by slot position, or location of the module. It is possible, in such a system, for a single highest priority slot to monopolize the shared bus entirely if it requests all the cycles.

This problem of monopolization by the highest priority slot can be bypassed with the parallel resolution technique. This method, however, engenders its own disadvantage, namely, a long clock period because of the time required to poll each module and compare them to determine which has the highest priority. Furthermore, a large number of modules in the system means a more costly and complex back plane with the parallel resolution techniques.

Said bypass signal path may be a circular signal path.

The present invention provides a method of establishing a rotating priority in a circular daisy chain of modules contending for access to a common bus comprising the steps of providing a position signal corresponding to the module last in control of the common bus; propagating said position signal along the circular daisy chain to the next module in the chain; repropagating said position signal along the circular daisy chain by next noncontending modules; receiving said position signal by the next contending module and inhibiting the propagation of said position signal along the circular daisy chain by the next contending module to indicate next to control the common bus.

A method as set forth in the last preceding paragraph may further comprise the step of providing an index signal by said contending module to indicate its location as the next priority index.

In accordance with the invention, a technique of rotating the priority index among the modules in the resultant contention ring is provided to prevent monopolization of a shared bus by a single module with a high priority.

By setting priorities among the modules regardless of the location of the rotating priority index, this technique of resolving contention has the advantage of both parallel and serial resolution techniques without the major disadvantages of either.

There now follows a detailed description which is to be read with reference to the accompanying drawings of techniques for performing a method according to the present invention; it is to be clearly understood that these techniques have been selected for description to illustrate the invention by way of example and not by way of limitation.

In the accompanying drawings: Figure 1 shows an example using the technique of a rotating priority index in accordance with the present invention; Figure 2 shows the technique in accordance with the invention applied to a linear system to bridge inactive slots; Figure 3 illustrates an embodiment of modules for implementing the technique in accordance with the invention; Figure 4 illustrates a state diagram of the preferred embodiment of the technique in accordance with the invention; and Figure 4 shows the preferred embodiment of a module for use in the technique in accordance with the invention.

In a shared bus 2, a number of bus modules 4, or controllers, can be contending for control. As an example, Figure 1 depicts a system that can accommodate up to six bus modules. Each module provides a GROUT signal 6 in response to an input signal GRIN 8 to form a daisy chain and to signify noncontention for the bus. The daisy chain is made circular by looping the end back to the beginning on an auxiliary line, the LOOPBACK line 10. The LOOP BACK line 10 jumps the control of the bus grant daisy chain across any group of empty or inactive slots 12. The last module in control generates a GROUT signal 6 towards the end of a bus cycle and propagates it down the daisy chain. That GROUT signal 6 normally goes away when the bus cycle ends with some other module taking control of the bus.Each module which is not contending for control merely passes the GRIN signal 8 directly through as the GROUT signal 6. Incidentally, each noncontending module imparts a certain delay in repeating the GRIN-GROUT signals. The total delay in the daisy chain determines the number of control modules a bus can accommodate in a system for a given resolution period.

A module that is contending for control will first inhibit the GROUT signal 6 from being further propagated in the chain and then search for a GRIN signal 8 to determine when it can take control. In this manner, the contending module determines that it is next to take control, and it prevents the remaining modules from taking control.

Each module is capable of sustaining the state information that it maintained control of the shared bus last by producing a LAST ACCESS signal 14.

This LAST ACCESS signal 14 determines the location of the priority index. It also allows for idle periods, when none of the modules is contending for control of the common bus 2, without a loss of the priority index. The index is configured such that the module that had control in the prior bus cycle now has the lowest access priority. Thus, the access priority index rotates around the daisy chain with each change of module taking control. In this manner, a single module is precluded from monopolizing the shared control bus by virtue of its slot or location, as is the case in the typical serial resolution daisy chain in the prior art.

When there is a gap 16 in the daisy chain as when one or more modules are not connected into the daisy chain, thus leaving inactive slots 12, the GRIN-GROUT signal is unable to propagate through the gap 16. To circumvent this problem, two secon darysignals are propagated by the modules; forward and reverse propagation signals. The forward propagation signal 18 is repropagated by each module to the next as a signal indicating that the next module is not a first module. When a module does not receive this non-first position signal 18 being propagated, as when it is the first module after a series of inactive slots, the modules then know it is the first module after a gap 16. Similarly, each module along the daisy chain repropagates the reverse propagation signal 20 to the next as a signal to indicate that the next module is not a last module.

When a module does not receive this non-last position signal 20 being propagated, as when it is the last module before a series of inactive slots 12, the module then knows it is the last module before a gap 16.

When this situation occurs, the first and last modules switch to the LOOPBACK 10 for the GRIN 8 and GROUT 6 signals, respectively. In this way, the first module receives a GRIN signal 8 propagated by the last module as a GROUT signal 8 in spite of the presence of inactive slots 12 intervening between these modules. Hence, as long as the empty slots 12 form a single group 16, their presence or absence will not disrupt the propagation of the contention indicative GRIN-GROUT signal. In passing, it should be noted that these propagated signals can be in the form of static signals, that is, grounding signals as in the preferred embodiment in accordance with the invention.

The following example illustrates the principles of the invention described above. Figure 1 shows a representative circular daisy chain containing six slots for modules. In this example, only four slots are occupied by modules 4, thus leaving a gap 16 of two empty and inactive slots 12. Alternatively, the inactive slots 12 can be the result of unconnected or inactive module boards in physically present modules, thus still leaving a gap 16 in the chain. The modules are consecutively numbered with the first module after the gap designated module 1. Each of the modules is propagating a GROUT signal 6 initially, signifying that none is contending for control of the common bus line 2. The GROUT signal 6 is received as the GRIN signal 8 by each sequent module except for module 1.In other words, the GRIN-GROUT signal is repropagated along the daisy chain from module 1 to module 2 to module 3 to module 4. Module 4 also repropagates a GROUT signal, but because of the gap 16 of inactive slots 12, module 1 does not receive it.

Simultaneously, the modules are propagating two secondary signals in opposite directions. The first, the forward propagation signal 18, is propagated by a preceding module to the next. This signal is a position signal. The presence of this signal indicates to the next module that it is not a first module.

Conversely, the absence of this position signal indicates that it is a first module. Thus, because of the gap 16, module 1 will not be receiving this position signal. It then knows that it is a first module and therefore switches accordingly to the LOOP BACK line 10 to receive contention information normally contained in a GRIN signal 8.

Similarly, the modules are propagating a second signal, the reverse propagating signal 20, from preceding module to the next in a direction opposite to that of the forward propagation signal. This position signal indicates to the next module that it is not a last module. Conversely, the absence of this position signal indicates that it is a last module.

Thus, because of the gap 16, module 4 will not be receiving the position signal. It then knows that it is a last module and therefore switches accordingly to the LOOPBACK 10 line to propagate contention information normally contained in a GROUT signal 6.

In this manner, the integrity of the GRIN-GROUT propagation is preserved in spite of the presence of empty slots 12 in the circular daisy chain. This is important in order to have a rotating priority for the modules in the daisy chain. Of course, if, by convention, slots are filled starting from one particular end in a chain, that end slot would always be considered the first or last slot and the module filling it would be the first or last module. In such a situation, only one propagation signal is needed, since one end module is already known. Either the forward or the reverse propagation signal is used, depending upon whether the end slot is considered to be a last or a first slot, respectively.

In the present example, if module 3 is contending for control of the share common bus 2, it will inhibit the repropagation of the GRIN-GROUT signal. In other words, it will not propagate a GROUT signal 6 further along the daisy chain, thus indicating to all subsequent modules, both in time and in location along the chain, that module 3 is in contention. If module 3 is granted control of the common bus line 2, it then propagates a priority index signal, the LAST ACCESS signal 14. This signal marks module 3 as having the lowest priority in the next round of contention among the modules. Its sequent module, module 4, is accorded the highest priority next.

Thus, whichever module is granted control of the daisy chain common bus, in a contention round is accorded the lowest priority in the next round. In this example, modules 4, 1 and 2 will be granted control before module 3 in the next round of module contention. This then constitutes the rotating priority index and rotating priority status of the modules in a circular daisy chain even in the presence of a gap 16 of empty slots 12.

The technique described above for bridging a group 16 of inactive slots 12 in a circular daisy chain is equally applicable to a linear chain of modules contending for a commonly shared bus 2. In the typical linear serial resolution system in the prior art, isolated modules would not be included in any contention or priority schemes. For example, in Figure 2, a daisy chain has slots for six modules numbered 1 to 6 consecutively, but only 1, 2, 3 and 6 are occupied by modules 4, thus leaving slots 4 and 5 empty and inactive; the daisy chain typically would not be able to accommodate an isolated module like module 6. This is because the gap caused by inactive slots 3 and 4 prevents a contention signal from being propagated to isolated module 6. In the prior art, module 6 must be moved to slot 4.This then leaves slots 5 and 6 empty and inactive at the very end of the chain and the occupied and active slots together at the beginning of the chain, where the contention signal then is accessible to all the modules. The technique of bridging a gap 16 in accordance with the invention obviates this necessity of re-grouping the modules to form a single group of occupied slots in order for the system to work.

Figure 3 serves as an example of the logic circuits for implementing the technique in accordance with the invention described. In the Figure, three modules 100, 200 and 300 are used to illustrate the system in operation. Within the modules, the GRIN signal is converted to the GROUT signal by logic circuits Q1 and Q2 when there is no contention. This is illustrated by module 200 where the GROUT signal of module 100 enters it as a GRIN signal into a negated input AND gate Q1 and exits it from a NOR gate Q2 as a GROUT signal. Likewise, the GRIN signal in module 300 enters gate Q1 and is converted to the GROUT signal at gate Q2. However, when there is a gap or inactive slots between the first and last modules, as with modules 100 and 300, the GROUT signal is re-routed by a gate Q5 to the LOOPBACK line. This is shown in last module 300.First module 100 then receives the GRIN signal from the LOOP BACK line with gate Q4. Thereafter, the GRIN signal is converted and routed to the next sequent module as described above. Whenever one of the modules is contending for control of the common line, an input signal is applied to input port REQOUT. Two events occur as a consequence: (1 ) the GRIN signal stops at Q1 and (2) a REQUEST signal is transmitted to a master controller in the system. The master controllet then sorts the different request signals it receives and attaches priorities to them.

The state diagram in Figure 4 gives an example of a possible hardware implementation of the technique in accordance with the present invention. The first state 41 represents the preparation stage of a system, that is, the state just prior to the contention stage when the module is either idling or is making a decision to go into contention as in decision points 42 and 43. The next two states 44 and 45 represent the contention stage when the contending module is making a request or bid 44 and 45 for control of the common line 2. The remaining four states 47-49 and 51 constitute the control stage; SETUP stage 47 is the preparation state for control. Once control is achieved, sequent states 48 and 49 are the states during which data is exchanged between module and common line 2. When the exchange of data is complete, the module is in the HOLD state 51.

Thereafter, it passes control of the common line 2 to return to its idling state 41.

Figure 5 shows, in greater detail, the logic circuit of a preferred embodiment of the module in accordance with the present invention to achieve the implementation of Figure 4. The clocked outputs of four flip-flops 110,112, 114 and 116 determine the state of the module. Specifically, when all flip-flops 110-116 have a low output, the module is in idling state 41. When flip-flop 110 has a high output, or when both flip-flop 110 and 112 have a high output and the remaining flip-flops have a low output, the module is in the contention state, that is, in states BID 1 44 or BID 245, respectively. During the SETUP state 47, all of the outputs of flip-flops 110-116 are in the high state. When the output of flip-flop 110 turns low while the remaining flip-flops remain at a high output, the module is in the state of DATA 1 48.

When the outputs of both flip-flop 110 and 112 are low while the remainders are high, the module is in state DATA 249.

After the exchange of information between the module and common line 2, the module passes to state HOLD 51, when the outputs of flip-flops 110-114 are back at the low state with the output of flip-flop 116 at the high state only. Once the module passes control of common line 2 after state 41, the process repeats when the module wants control again.

In Figure 5, control signals are applied to the module to effectuate the various outputs from flip-flop 110-116. These control signals are mostly listed to the left of the circuit. They include signals for going into contention (e.g., LOCAL ADDRESS).

By means of the various combinations of the logic circuits shown, response signals to the applied control signals are generated. These are listed mostly to the right of the circuit (e.g., BUFFER ENABLE, BUSY, and GO in the control stage).

The circuits for implementing a rotating priority index are shown in Figure 5. When a module gains control of the common bus 2, that module becomes the priority index pointer. A flip-flop 118 is set to indicate that the module has the last access to the common line 2. When the module completes its cycle, this last-access flip-flop 118 remains set and continues to drive GROUT until some other new module gains control. When the new module gains control, it asserts a BUSY signal 123 which clears the previously set last-access flip-flop 118 of the module previously in control.

In Figure 5, a lock circuit 120 may be used by a module to avoid relinquishing control of the common bus 2 at the end of a bus cycle. The module asserts a LOCK signal 121 and a WRITECLK signal 122, thus setting up a LOCK REQUEST. This module then contends for control in the normal manner.

After control is gained, the module retains control by continuing to assert BUSY 123 even when it is idle.

This action prevents other modules from gaining control even though these other modules may be contending. At the completion of a predetermined number of BUSY cycles, the module will de-assert LOCK and again assert WRITECLK to relinquish control and to return the common bus to its normal contention mode.

Claims (2)

1. A method of establishing a rotating priority in a a circular daisy chain of modules contending for access to a common bus comprising the steps of: providing a position signal corresponding to a module last in control of the common bus; propagating said position signal along the circular daisy chain to the next module in the chain; repropagating said position signal along the circular daisy chain by next non-contending modules; receiving said position signal by the next contending module; and inhibiting the propagation of said position signal along the circular daisy chain by the next contending module to indicate next to control the common bus.

2. A method according to claim 1 and further comprising the step of: providing an index signal by said contending module to indicate its location as the next priority index.