GB2100513A - Darlington transistor circuit - Google Patents

Darlington transistor circuit Download PDF

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Publication number
GB2100513A
GB2100513A GB8214326A GB8214326A GB2100513A GB 2100513 A GB2100513 A GB 2100513A GB 8214326 A GB8214326 A GB 8214326A GB 8214326 A GB8214326 A GB 8214326A GB 2100513 A GB2100513 A GB 2100513A
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United Kingdom
Prior art keywords
transistor
base
circuit
driver
output transistor
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Granted
Application number
GB8214326A
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GB2100513B (en
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Texas Instruments Ltd
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Texas Instruments Ltd
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Priority to GB8214326A priority Critical patent/GB2100513B/en
Publication of GB2100513A publication Critical patent/GB2100513A/en
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Publication of GB2100513B publication Critical patent/GB2100513B/en
Expired legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
    • H01L27/0823Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only including vertical bipolar transistors only
    • H01L27/0825Combination of vertical direct transistors of the same conductivity type having different characteristics,(e.g. Darlington transistors)

Abstract

In an integrated Darlington transistor circuit the gain of the output transistor T3 is reduced by heavy doping of its base region 6 so that its base region has a substantially greater concentration (e.g. ten times) of dopant than the base region 4, 5, of the or each driver transistor T1, T2. The BVCEO of the output transistor is close in value to its BVCBO so that the circuit can be made safe against avalanche breakdown for higher voltages than a conventional darlington circuit. The heavy doping of the base of the output transistor means that the sheet resistance of the region is low so that debiassing is small and it is possible to remove the base charge rapidly when the circuit is switched off. The circuit may include leakage current control resistors and speed-up diodes or transistors of known type. <IMAGE>

Description

SPECIFICATION Improved darlington transistor circuit This invention relates to a darlington transistor circuit arranged to provide a rapid transition from the conducting state of the non-conducting state on the application of a signal turning offthe circuit. The circuit also is suitable for high voltage applications.
One difficulty encountered in the use of darlington transistor circuits is that the output transistor of the circuit stores minority charge carriers in its base region which keep the output transistor in a conducting state after a signal applied to the driver transistor has turned that transistor off. In order to overcome this difficulty it has been proposed to provide a diode connecting the base of the output transistor to the base terminal of the driver transistor. This diode serves to extract the charge from the base of the output transistor. Nevertheless, the transistor from the conductive state to the non-conductive state can still take an undesirably long period of time (greater than 100 ns).
It is an object of the present invention to provide an improved darlington transistor circuit in which the turn-offtime is significantly reduced.
According to the present invention there is provided a fast switching high voltage rated darlington transistor circuit formed as an integrated circuit having an output transistor and at least one driver transistor in darlington connection in the same body of semiconductor material, in which the base region of the output transistor contains a substantially greater concentration of dopant than the base region of the or each driver transistor, whereby the base of the output transistor has a low sheet resistance and the output transistor has a low gain so that its BVcEo is close in value to its BVc8o.
The provision of a low sheet resistance in the active base region of the output transistor serves to reduce debiassing effects so that the turn-off time of the circuit is significantly reduced. In one example of a circuit according to the invention the dopant concentration in the base region of the output transisor is ten times that of the base regions of the driver transistors.
The circuit may be constructed to include conventional leakage current control resistors between the bases of the different transistors so that the leakage current of the driver transistor is not amplified by subsequent driver transistors or the output transistor. The circuit may also include one or more diodes joining the bases of the transistors other than the first driver transistor to the base terminal of the circuit to improve the discharge of minority carriers in respone to an input signal turning off the circuit. Alternative arrangements, such as for example that described in British Patent Specification No. 1 448 958 may be used instead of the diodes.
In order that the invention may be fully understood and readily carried into effect it will now be described with reference to the accompanying drawings, of which: Figure 7 is a circuit diagram of one example of a darlington transistor circuit according to the present invention; and Figures 2A and 2B are cross sectional and plan view diagrams of an example of a circuit according to Figure 1.
Referring now to Figure 1, the circuit shown consists of two driver transistors T1 and T2 driving an output transistor T3. The collector electrodes of Ti, T2 and T3 are commoned and connected to a collector terminal C for the circuit. A base terminal B for the circuit is connected to the base of the transistor T1 and also through a diode D1 and resistor R1 in parallel to the emitter of the transistor T1. In addition the emitter of the transistor T1 is connected to the base of the transistor T2 and via diode D2 and resistor R2 in parallel to the ; emitter of the transistor T2.The emitter of the transistor T2 is connected to the base of the transistor T3 and through a resistor R3 to the emitter of the transistor T3 which is also connected to an emitter terminal E for the circuit.
As shown in Figure 2A, the circuit of Figure 1 is realised in a body 1 of N-type semiconductor material having an N+ region 2 formed in its underside with collector metallisation 3 over the underside major surface. The upper side of the body 1 is doped in two regions 4 and 5 to be of P-type conductivity and in a region 6 to be of P* conductivity, that is to say of P-type conductivity but having a dopant concentration of about ten times that of the regions 4 and 5. As can be seen in Figure 2B the regions 4, 5 and 6 are joined together by narrow portions of the same conductivity type which form the resistors R1 and R2. Emitter regions 7, 8 and 9 of N+ conductivity are formed in the upper surface of the regions 4, 5 and 6 respectively.
The region 9 has a narrow meandering section 10 which forms the resistor R3 and ends at a contact 23.
Emitter contacts 11, 12 and 13 are provided connected to the N+ emitter regions 7, 8 and 9 respectively.
Basic contacts 14, 15 and 16 are provided connected to the regions 4,5 and 6 respectively. In the base regions 5 and 6 are formed P+ regions 17 and 18 as the anodes of diode D1 and D2. The cathodes of the diodes D1 and D2 are formed by N+ regions 19 and 20 in the regions 17 and 18 respectively. The diodes D1 and D2 have cathode contacts 21 and 22 connected to the regions 19 and 20 respectively. Prior to metallisation a layer 24 of silicon dioxide is formed on the surface of the usual way with contact windows for the connections to the various regions of the device. The details of the metallisations are not shown in Figures 2A and 2B to avoid them obscuring the Figures but the interconnections which they would provide are indicated by the line connection.From a consideration of Figures 2A and 2B it will be apparent how the components of Figure 1 are formed and interconnected.
In Figures 2A and 2B the transistor T1 of Figure 1 is formed by regions 7, 4 and 1, the transistor T2 of Figure 1 is formed by regions 8, 5 and 1, and the output transistor T3 of Figure 1 is formed by regions 9, 6 and 1. The resistors R1, R2 and R3 of Figure 1 which serve to compensate for the leakage in the driver transistors and thereby prevent aplified leakage currents being caused to flow through the circuit as a whole, are formed in the arrangement shown in Figures 2A and 2B by the narrow portions linking the regions 4, 5 and 6 together and the meandering section 10 of the region 9. The regions 17 and 18 are more heavily doped than the regions 4, Sand 6 to prevent the diodes of which they form part having any significant transistor action.
The design of the outputtransistorT3 as one having low gain and high base region conductivity ensures that the circuit provides a rapid turn-off time. A short minority carrier charge time is achieved in the output transistor by ensuring that the excess base current over and above that required to switch on the transistor is minimised. If, because of variations in production, the highest gain transistor in the circuit takes double its base current requirement then the excess base current produces additional base chare that must be removed when the circuit is switched off. By designing the darlington circuit with high gain driver transistors and low gain output transistor the excess base current is reduced in absolute terms and this results in a shorter overall switching storage time.
The circuit arrangement shown has a good square loop switching capability and increased reverse bias switching safe area. The output transistor T3 has a very low peak gain with the result that its BVcso is close to its BVc#0,these parameters being related by the expression
For a typical transistor having hFE = 150 and a value n = 6, determined experimentally, we find that BVcEo = 0.43BVcso For the transistor T3 of the present invention the heavy doping of the base region causes the value of BVCEO to be between 70 and 80% of the value of BVcso. This means that the darlington circuit can be made safe against avalanche breakdown for higher voltage than a similar construction using a higher gain output transistor.The heavy doping of the base region of the output transistor means that the sheet resistance of the base region is low and consequently debiassing is small so that it is possible to remove base charge more rapidly when the circuit is switched off. A circuit according to the invention has been tested and it has been found that when the base region of the output transistor is heavily dopes so that the gain of that transistor is about 4, the fall time is about 40 ns, whereas with a similar construction of circuit using an output transistor of conventional base region impurity levels the output transistor had a gain of 30 but the fall time was about 120 ns.
The transistors T1 and T2 forming the driver stages of the circuit are conventional high gain units so that the overall gain of the darlington circuit is high. When the circuit is switched offthe base terminal B of Figure 1 is taken negative (NPN devices) and charge is extracted. The driver transistors T1 and T2 continue to supply base current to the output transistor T3 until the end of their switch-off charge storage period and then the output transistor T3 enters its charge storage period. During this last-mentioned storage period the transistors T1 and T2 complete their switching off so that they are fully off before the collector volts rise significantly.It follows therefore that the driver transistors Ti and T2 do not need an extended safe operating area so that their gains can be high and the BVcEo low. It is only necessary that the BVcso of the driver transistors T1 and T2 be greater than the rated operating voltage of the circuit.
An advantage of a circuit according to the invention is that economy of semiconductor material area utilisation is achieved by designing for high gain in the driver transistors where it is possible and confining the robustness restrictions to the output transistor which is the only component to require it. The structure shown in Figures 2A and 2B is only one example of a suitable structure for the circuit and, if desired, a further diode shunting the emitter-collector path of the transistor T3 may be incorporated. Alternatively, the low gain transistor circuit disclosed in British Patent Specification No. 1 448 958 may be substituted for the diodes Di and D2. Preferably the circuit is made from silicon with the dopants added by ion implantation and, if necessary, subsequent diffusion operations.
Although the embodiment of the invention described above is of N-P-N device, it will be appreciated that the invention could be embodied in a P-N-P device.

Claims (7)

1. A fast switching high voltage rated darlington transistor circuit formed as an integrated circuit having an output transistor and at least one driver transistor in darlington connection in the same body of semiconductor material, in which the base region of the output transistor contains a substantially greater concentration of dopant than the base region of the or each driver transistor, whereby the base of the output transistor has a low sheet resistance and the output transistor has a low gain so that its BVcEo is closer in value to its BVCBO than is the case for the driver(s).
2. A circuit according to claim 1 wherein the concentration of dopant in the base region of the output transistor is about ten times that in the base region of the or each driver transistor.
3. A circuit according to claim 1 or 2 including leakage current control resistors connected between the bases of the transistors, so that the leakage current of the or each driver driver transistor is not amplified by any subsequent driver transistor or the output transistor.
4. A circuit according to claim 3 including one or more diodes respectively connected from the base of the output transistor to the base of the immediately preceding driver transistor and from the base of each driver transistor to the base of the immediately preceding driver transistor (if any), the diodes being so connected as to improve the discharge of minority carriers from the bases of transistors other than the first in response to an input signal turning off the circuit.
5. A circuit according to claim 3 including one or more transistors having very low gain respectively connecting the base of the output transistor or a driver transistor to the base of the immediately preceding transistor in the signal path, in each case the base of the low gain transistor being connected to the base of the succeeding transistor in the signal path, the emitter of the low gain transistor being connected to the base of the preceding transistor in the signal path and the collector of the low gain transistor being connected to the common collector connection of the circuit, whereby the or each low gain transistor improves the rate of discharge of minority carriers from the bases of the transistors in response to an input signal turning off the circuit.
6. A circuit according to any preceding claim having two driver transistors.
7. A fast switching high voltage rated darlington transistor circuit substantially as described herein with reference to the accompanying drawings.
GB8214326A 1981-06-04 1982-05-17 Darlington transistor circuit Expired GB2100513B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB8214326A GB2100513B (en) 1981-06-04 1982-05-17 Darlington transistor circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB8117202 1981-06-04
GB8214326A GB2100513B (en) 1981-06-04 1982-05-17 Darlington transistor circuit

Publications (2)

Publication Number Publication Date
GB2100513A true GB2100513A (en) 1982-12-22
GB2100513B GB2100513B (en) 1985-06-19

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0176762A1 (en) * 1984-09-27 1986-04-09 Siemens Aktiengesellschaft Monolithic integrated bipolar Darlington circuit
EP0237933A2 (en) * 1986-03-17 1987-09-23 Kabushiki Kaisha Toshiba Semiconductor device having Darlington-connected transistor circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0176762A1 (en) * 1984-09-27 1986-04-09 Siemens Aktiengesellschaft Monolithic integrated bipolar Darlington circuit
EP0237933A2 (en) * 1986-03-17 1987-09-23 Kabushiki Kaisha Toshiba Semiconductor device having Darlington-connected transistor circuit
EP0237933A3 (en) * 1986-03-17 1989-02-08 Kabushiki Kaisha Toshiba Semiconductor device having darlington-connected transistor circuit

Also Published As

Publication number Publication date
GB2100513B (en) 1985-06-19

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PCNP Patent ceased through non-payment of renewal fee

Effective date: 19940517