GB2078453A - Sampling measurement circuits - Google Patents

Abstract

A sampling measurement circuit is arranged to enable extremely accurate amplitude measurements to be made at particular points on a complex waveform containing high frequency components. The need arises to perform such measurements in connection with television calibration instruments. A sampling circuit is used having an extremely short sampling period so that an associated storage capacitor is charged progressively in discrete steps until its voltage reaches the level of the sampled waveform. Means are provided for compensating for any voltage decay which occurs on the capacitor and for compensating for variations in the biassing characteristics of the sampling circuits. <IMAGE>

Description

SPECIFICATION Sampling measurement circuits This invention relates to sampling measurement circuits which are for use in performing measurements on repetitively recurring electrical waveforms. The invention is particularly applicable to waveforms which contain high frequency components and in which for example it is desired to measure an amplitude of a particular point on the waveform to a very high degree of accuracy.

When it is desired to accurately monitor or measure the amplitude of a repetititive high frequency signal at a precise instant in time, i.e. at a precise point on the recurring waveform the width or duration of the sample taken must be very short compared with the cycle period of the highest frequency component of interest.

If the sampled analogue amplitude is required in digital form, for example, to facilitate subsequent processing, the sample must be stored temporarily to allow the analogueto-digital conversion to take place. The time available for this conversion is very limited when the recurring waveform contains high frequency components but has a low repetition rate, because an analogue store is incapable of holding its charge to sufficient accuracy from one sample to the next. The higher the degree of accuracy required, the slower is the conversion to digital form as a larger number of digital bits are required. These conflicting requirements can impose a serious limit on the operation of a sampling measurement circuit and make it difficult to perform very accurate measurements of high frequency waveforms which have a low repetition rate.

According to this invention a sampling measurement system includes means for receiving a signal having a repetitively recurring waveform; means for repeatedly sampling at sampling intervals the signal at a particular point on the waveform so as to progressively alter the value of a sample value in steps to bring it into agreement with the value of the signal at said particular point; analogue-todigital conversion means for converting to digital form the step change in sample value representative of the difference between the current sample value and the preceding sample value; and digital cumulative summation means for producing from successive analogue-to-digital conversions a digital value representative of the value of the particular point of the received waveform.

The invention is further described by way of example with reference to the accompanying drawings in which, Figure 1 illustrates a sampling measurement circuit in accordance with the present invention, Figures 2 and 3 illustrate portions thereof in greater detail, and Figure 4 is an explanatory diagram.

The invention is particularly suitable for performing very accurate measurements on repetitively recurring electrical signals such as television waveforms which recur at line field or frame frequencies. A television waveform contains not only picture information, but also specially inserted waveforms known as insertion test signals which enable the quality of the television signal to be measured. Careful measurement of the waveform can impart valuable information about the nature of the path over which the signal is sent and the degree of distortion which it introduces. Television signals contain high frequency components and it is important that the amplitudes of the particular frequency components of the waveform are very accurately known and controlled.Relatively minor errors in amplitude can seriously degrade the quality of a television picture and the operation of a television monitor. For this reason specialised test equipment is available to generate the television waveforms and to monitor the degradation of the waveform which occurs when it has been passed over the whole or part of a television transmission link. It is, of course, necessary to calibrate the specialised test equipment and in order to establish sufficient confidence in the accuracy of the test equipment, it is calibrated to an accuracy which is at least an order of magnitude greater than the accuracy of the final measurements which it is required to perform. The present invention is suitable for performing measurements on the calibration equipment itself.

Fig. 1 shows in block diagrammatic form a sampling measurement system, which is particularly suitable for performing very accurate amplitude measurements on specified portions of a television waveform. The television video signal is applied to a sampling bridge 1 via an input terminal 2. The nature of the sampling bridge 1 is described in greater detail subsequently with reference to Fig. 2, but briefly the sampling bridge operates as a gate under the control of a gate pulse generator 3, which in effect opens the gate at an instant in time determined by a timing circuit 4. Synchronisation pulses are applied via an input terminal 5 at the television line frequency to the timing circuit 4. On receipt of the gating pulses from the gate pulse generator 3, the sampling bridge 1 becomes conductive for a short period and allows a storage capacitor 6 to charge to the sample value.Because the period for which the sampling bridge 1 is conductive is made extremely short, typically of the order of a nanosecond, the capacitor 6 does not necessarily fully charge to the level of the sampled videosignal. The sample value held on the storage capacitor 6 is passed via a coupling capacitor 7 to a buffer amplifier 8, which has unity gain. The voltage is subse quently amplified by a further amplifier 9 having an accurately pre-set gain, in this case a gain of sixty-four. After amplification the analogue signal is passed to an analogue-todigital converter 10, which is of relatively low accuracy, but fast operation. In the present context this means that the converter 10 is typically an eight-bit converter even though an accuracy corresponding to possibly sixteen bits is ultimately required.The use of an eight-bit converter allows the voltage coupled via the capacitor 7 to be rapidly converted to digital form.

It will thus be apparent that the analogueto-digital converter 10 does not provide as an output a digital word which is accurately representative of the amplitude of the sampled video signal on the first occasion that the signal is sampled. The digital word produced by the converter 10 is passed into a cumulative store 11 and also to a level monitor circuit 1 2. The cumulative store 11 operates to add the most recently received digital word to the contents already in the store. The cumulative sum held in the store 11 is then passed via a digital-to-analogue converter 1 3 to a feedback bridge 15, to a bridge bias circuit 14 and to the lower end of the storage capacitor 6.The feedback bridge 1 5 is so arranged that the capacitor 6 is forced to maintain the level of the contents of the cumulative store 11 between sampling instants and is therefore not allowed to discharge with the leakage current of the sampling bridge 1 and the leakage current of the coupling capacitor 7. The same voltage applied to the lower end of the storage capacitor 6 prevents leakage through the storage capacitor 6 between sampling instants and also minimises leakage through the storage capacitor 6 during the sampling and analogue-todigital conversion period for which time the feedback bridge 1 5 is non-conductive. The bridge bias circuit 14 operates to provide to the sampling bridge 1, two bias signals which are fixed, one positive and one negative, with respect to the level of the contents of the cumulative store 11.This ensures that the sampling bridge 1 is correctly biassed.

The feedback bridge 1 5 consists simply of four diodes 53, 54, 55, 56 connected in a bridge configuration as illustrated in Fig. 3, with the drive inputs 60 and 61 being fed from the timing circuit 4 with one of the drive pulses being inverted by an inverter 57. Terminal 50 is connected to the junction between capacitors 6 and 7, and terminal 51 is fed from the converter 13. The operation of the feedback bridge 1 5 is such that it presents a very high impedance whilst the sampling bridge is conductive so that the capacitor 6 can charge under the influence of the sampled video signal.However, once the sample value has been taken and the sampling bridge 1 has been rendered non-conductive under the control of the gate pulse generator 3, and the analogue-to-digital converter has completed its conversion cycle, the feedback bridge 1 5 is rendered fully conductive so as to transfer the output of the digital-to-analogue converter 1 3 to the capacitor 6, so as to maintain its voltage constant between sampling instants.

The clamping bridge 1 6 is identical to that shown in Fig. 3, but in this latter case the terminal 50 is connected to a point between the capacitor 7 and the amplifier 8. the terminal 51 is connected to earth, and the drive pulses are obtained from the timing circuit 4, with one of the pulses being inverted with respect to the other by pulse inverter 58.

The effect of feedback bridge 1 5 and the bridge bias circuit 1 4 is that when the sampling instant occurs, the voltage on the storage capacitor 6 which is representative of the sample value changes only by the difference between its previous value and the new sample value. Of course, if the difference is still fairly large, the capacitor 6 may not actually reach the sample value on the second occurence but may take many sample periods to accomplish this.The voltage step, i.e. the voltage by which the potential on the storage capacitor 6 changes, is passed by the coupling capacitor 7 and the amplifiers 8 and 9 to the analogue-to-digital converter 1 0. During the period that the analogue-to-digital conversion is taking place, the feedback bridge 1 5 and the clamping bridge 1 6 are rendered nonconductive, so that the voltage received by the converter 10 is not affected by the output of the digital-to-analogue converter 1 3.

The periodic sampling process continues with the storage capacitor progressively changing its voltage until eventually it reaches the value of the sampled point on the waveform. The level monitor 1 2 continually monitors the output of the analogue-to-digital converter 10, and when the output of the converter 10 becomes zero or negative the cumulative sum which is held in digital form in the cumulative store 11 is passed via a gate 1 7 and an averaging circuit 18 to a display 19.

The final measurement may be averaged from the output of the cumulative store for many samples to reduce the effect of noise on the video signal and displayed for as long as is required, after which the setting of the timing circuit may be changed to select a different point on the video signal and the measurement process repeated.

The sampling bridge 1 and the bridge bias circuit 14 are illustrated in greater detail in Fig. 2. The incoming video signal is received via terminal 2 and applied to a diode bridge 22 consisting of four diodes 23, 24, 25 and 26 connected as shown. The output of the bridge 22 is connected to the storage capacitor 6, which corresponds to the capacitor shown in Fig. 1. A resistor 21 is connected between terminal 2 and earth so as to provide a correctly matched termination for the incoming transmission line connected to terminal 2.

The sampling bridge is rendered conductive and non-conductive as required under the action of gating pulses applied to terminals 27 and 28 by the gate pulse generator 3.

These pulses are coupled to the diode bridge 22 via filters comprising capacitors 29 and 30 and inductor 31. The filters provide a low impedance path to earth at the junction points 32 and 33 for the higher frequency components of the input signal at terminal 2, which would otherwise be transmitted via the stray capacitances of the diodes 23, 24, 25 and 26 to the storage capacitor 6 causing significant errors in the sampled value during the conversion period of the analogue-to-digital converter 10, i.e. when diodes 23 to 26 are nonconductive. The sampling bridge 1 is biassed by means of a constant current path 34, which flows from a constant current source 35 through matched resistors 36 and 37 to a second current source 38.This provides bias points 39 and 40 by means of which the diodes 23 to 26 can be biassed under the control of the output of the digital-to-analogue converter 1 3 which is applied to terminl 41.

In this way, the diodes can be initially biassed to a level which is dependent on the voltage actually present on the capacitor 6. In particular both the forward transmission characteristics of the four diodes forming the sampling bridge 1 and the reverse bias conditions of the two output diodes 24, 25 of the sampling bridge remain constant even though the sampled level on the video signal at terminal 2 and the sample value stored by the capacitor 6 may change for different sampling points on the video signal.

Under normal circumstances the diodes 23 to 26 are non-conductive, but on the occurence of the gating pulses at terminals 27 and 28, they are rendered momentarily conductive aliowing capacitor 6 to be charged by the video signal present at terminal 2. The duration of the gating pulse is very short, and is typically of the order of a nanosecond.

The sequence of events is more clearly indicated in Fig. 4 in which the synchronisation pulses received at terminal 5 are illustrated in line a. It is assumed that a television video waveform is received at terminal 2 and that the synchronisation pulses are composite pulses to enable the line being sampled to be identified and to indicate the instant at which a line scan begins. The moment at which the video waveform is sampled by the sampling bridge 1 is determined by a line selector contained within the timing circuit 4 and by the magnitude of a delay produced by a variable delay circuit 20.In Fig. 4, this delay is indicated by the symbol 8 and it will be seen that shortly before the occurrence of the gating pulses, which are illustrated in line b, the feedback bridge 1 5 and the clamping bridge 1 6 are rendered non-conductive as indicated in line c. When the feedback bridge 1 5 is conductive it forces the voltage stored on the capacitor 6 to the value of the digitalto-analogue converter 13, and when the clamping bridge 1 6 is conductive it clamps the input of the buffer amplifier 8 to a fixed reference voltage, nominally zero. During this period the coupling capacitor 7 charges to an equilibrium condition via the low impedance path presented by the bridges 1 5 and 1 6.

When the bridges 1 5 and 1 6 are rendered non-conductive to enable a new sample to be taken, the charge on the coupling capacitor 7 is maintained thus transmitting to the buffer amplifier 8 the step change in the stored voltage on the capacitor 6 as the latter is charged or discharged in accordance with the amplitude of the video waveform at the instant of sampling. The feedback bridge 1 5 and clamping bridge 1 6 are rendered nonconductive for the period required by the capacitor 6 to charge and to transfer the step voltage via the capacitor 7 and amplifiers 8 and 9 to the analogue-to-digital converter 10 and for the analogue-to-digital converter 10 to perform a conversion on the step voltage, this latter event being indicated in line dof Fig. 4.

Prior to the instant at which the point on the waveform is next sampled the feedback bridge 1 5 and the clamping bridge 1 6 are again rendered conductive so as to maintain the new sample value on the capacitor 6 and reset the input of the buffer amplifier 8 to zero.

Once the conversion has been completed and the cumulative sum held in the store 11 has been up-dated, the new sum value is converted back to an analogue signal by converter 1 3 to set up the bias of the sampling bridge 1 and the storage capacitor 6 in readiness for the next sample.

It will be apparent from the preceding description that the voltage on capacitor 6 may not reach its final value until the waveform has been sampled repeatedly on a number of successive occasions, and in order to achieve a sufficient degree of accuracy by averaging out any noise present on the input signal or present within the measuring system, it is desirable to sample a large number of repetitions of the applied waveform after the measuring system to its final value. The relatively long period required to complete a particular measurement cn be undesirable when it is required to perform comparative level measurements in respect of different points on the repetitively occurring waveform.For example, waveform measurements performed on a television signal are generally difference measurements, e.g. the level of a particular point is often required relative to a black level reference point on the waveform. In principle, this could require a very high degree of long term d.c. stability both in the measurement system and in the television signal generator and to reduce this requirement, the system shown in Fig. 1 is arranged to sample two points alternately on successive occurrences of the input waveform. By interleaving the samples any off-set drift which occurs during the integrating time, i.e. the time taken for the required number of sample values to be taken and averaged will affect both sets of samples equally, and will therefore cancel when the difference between the two sets of samples is calculated.To accomodate this mode of operation, the cumulative store 11 is divided into two sections 11 a and 11 b with one half of the store handling data relating to the measurement of one point on the waveform and the other half of the store handling data relating to the second point. It is necessary to switch the store at a rate corresponding to the repetition period of the applied video signal but this can be simply achieved under the action of the timing circuit 4 in response to the received synchronisation pulses via terminal 5. Similarly the output of the cumulative store 11 is switched alternately between the two values so that at any instant the output signal provided by the digital-to-analogue converter 1 3 relates to the point on the waveform which is to be sampled next.

The averaging circuit 1 8 is also divided into two sections 1 8a and 1 8b in order to calculate the average values of the two sets of data presented by the two sections of the cumulative store 11 over the required integration perod.

By eliminating the need to provide perfect d.c. stability over a longer period of time, the integration period for a particular measurement can be extended as necessary in order to minimise the effect of noise on the input signal or in the system. By increasing the integration period, the theoretical accuracy of the comparative measurements can be considerably enhanced.

Although in Fig. 1, the cumulative store 11 and averaging circuit 1 8 are shown divided into only two section 11 a, 11 b and 18a, 1 8b they may be divided into a larger number of sections so as to enable a correspondingly larger number of individual points on the incoming waveform to be measured. For example, if comparative measurements were required for four points on the waveform, then four sections of the cumulative store and averaging circuit would be required with data being entered into a particular section on every fourth occurrence of the waveform.

In some instances it may be possible to replace the feedback bridge 1 5 and the clamping bridge 1 6 by respective resistors having carefully chosen values if the sampling repetition rate is sufficiently low. Alternatively, it is possible in principle to replace the feedback bridge 15, the clamping bridge 16, capacitor 7 and amplifiers 8 and 9 by a twoinput differential amplifier, one input of which is connected to the junction point of storage capacitor 6 and the sampling bridge 1, and the other input of which is connected to the converter 1 3. Such an amplifier could be required to provide the same gain as amplifier 9, and in addition must exhibit a very high common mode rejection characteristic. At present it is believed that the configuration shown in Fig. 1 provides the better results.

The sequence of events described, and partly illustrated in Fig. 4 could be controlled by a suitable sequencing device, or could be achieved under the control of a suitably pro-t gramme processing device. Such a device would also control the operation of the converter 10, store 11 and the averaging circuit 1 8 if desired.

Claims (11)

1. A sampling measurement system including means for receiving a signal having a repetitively recurring waveform; means for repeatedly sampling at sampling intervals the signal at a particular point on the waveform so as to progressively alter the value of a sample value in steps to bring it into agreement with the value of the signal at said particular point; analogue-to-digital conversion means for converting to digital form the step change in sample value representative of the difference between the current sample value and the preceding sample value; and digital cumulative summation means for producing from successive analogue-to-digital conversions a digital value representative of the value of the particular point of the received waveform.

2. A system as claimed in claim 1 and wherein the digital value has a greater number of digits than the digital output of the analogue-to-digital conversion means.

3. A system as claimed in claim 1 or 2 and wherein monitor means are provided for monitoring the level of the cumulative sum produced by the cumulative summation means so as to detect when the sample value has been brought into said agreement.

4. A system as claimed in claim 1, 2 or and means are provided for averaging a succession of said digital values after the sample value has been brought into said agreement so as to minimise the effect of noise present on the received signal.

5. A system as claimed in claim 2, 3 or 4 and wherein each sample value is held temporarily on a storage capacitor whilst the sample value is converted to said digital form.

6. A system as claimed in claim 5 and wherein said means for repeatedly sampling comprises a diode bridge comprising four matched switchable diodes, with the diodes being rendered conductive for those periods whilst the received signal is being sampled.

7. A system as claimed in claim 5 or 6 and wherein said storage capacitor is coupled via a coupling capacitor to said analogue-todigital conversion means.

8. A system as claimed in claim 7 and wherein a high input impedance amplifier is interposed between said coupling capacitor and said analogue-to-digital conversion means.

9. A system as claimed in claim 5, 6, 7 or 8 and wherein feedback means are provided for establishing on said capacitor at a time immediately preceding a subsequent sampling instant, a voltage corresponding to a preceding sample value.

1 0. A system as claimed in claim 9 and wherein said preceding value corresponds to the current digital value produced by the cumulative means.

11. A system as claimed in claim 10 and wherein said feedback means comprises a switchable diode bridge coupled between said storage capacitor and the output of a digitalto-analogue converter which produces an analogue signal corresponding to said current digital value.