DE3123203A1 - Sampling-type measuring circuit - Google Patents

Abstract

A sampling-type measuring circuit is described which provides for extremely accurate amplitude measurements at particular points on a complex wave train containing radio-frequency components. Such measurements are required in connection with television wave train calibration instruments. A sampling circuit having extremely short sampling switching times is used so that an associated storage capacitor is continuously charged in discrete steps until the level of the sampled wave train amplitude is reached. A voltage drop across the storage capacitor is compensated for by feedback devices and, at the same time, changes in the bias characteristics of the sampling circuit are corrected.

Description

The invention relates to sampling or sampling measurement circuits

for use when taking measurements on repetitive ones electric wave trains. The invention is particularly suitable for use in wave trains suitable which contain high frequency components, and where for example the measurement of an amplitude at a certain point on the wave train with a very high degree of accuracy is required.

If necessary, the amplitude of a recurring Precisely monitor or measure high-frequency signal at a precise point in time, i.e., at a precise point in the repetitive wave train, the width or the length of time of the measured value taken is very short compared to the repetition time the component of interest with the highest frequency.

At very high frequencies this means that the permitted sampling time length is extremely short, and can be on the order of 1 ns, and that it is impractical or is impracticable to use a sample and hold capacitor during a single To fully charge the scanning process. As a result, the capacitor voltage increases progressively at successive sampling points until they then reach the value of the sampled Amplitude reached. A change in successive in the capacitor between inclusions Samples of stored voltage creates errors, and it can compensate for the charge migration, which is inevitable in a capacitor between successive ones Sampling occurs by applying a positive feedback hold current hit the capacitor. However, this is the result of different Control states in the sampling circuit itself occurring leakage current not compensated and changes occurring here can also serious mistake introduce, which are meaningful when particularly accurate measurements are required.

According to the invention, a sampling measuring system contains a device for Recording a signal with a repetitive wave train, a device for repetitively sampling the signal at sampling intervals at a given point of the wave train, the more progressively the value of a in a storage capacitor to change the held sample size gradually so that it is in accordance with the value of the signal at the particular point is brought to a device for forcing the sample to be held at its previous value during a the next following sampling time immediately preceding period, where the sampling device between the receiving point for the signal and the storage capacitor connected diode bridge network contains and also a device for Bias the diode bridge in accordance with the previous sample so as to change the amount of change in the diode bias voltage occurring when the waveform is sampled to keep it as small as possible.

The invention is illustrated below with reference to the drawing, for example explained in more detail. The drawing shows: FIG. 1 a sampling system according to the invention or scanning measurement circuit, FIGS. 2 and 3 details of the measurement circuit from FIG and FIG. 4 shows the operating states of certain individual parts of the circuit in FIG Timing diagrams.

The invention is particularly useful for making very accurate measurements suitable for repetitive electrical signals, such as those for example Represent television wave trains that occur again with line or frame frequency. A television wave train contains not only image information, but also specially used information Wave train sections, which are used as insertion Test signals are designated and enable a measurement of the quality of the television signal. Careful measurement the waveform can provide valuable information about the type of transmission path over which the signal is sent out and the amount of distortion it creates. Television signals contain high frequency components and it is important that the amplitudes the specific frequency components of the wave train are known and monitored very precisely will. Relatively small deviations in amplitude can affect the quality of a television picture and also seriously degrade the operation of a television monitor. For this Therefore, specialized test equipment is available to generate the television wave trains and monitor the deterioration of the waveform that occurs as it traverses the all or part of the television broadcast connection.

It is of course necessary to have the specialized test equipment to calibrate, and to have sufficient confidence in the accuracy of the test equipment To achieve this, it is calibrated with an accuracy of at least an order of magnitude is above the accuracy of the final measurements to be carried out with it. The present The invention is suitable for making measurements on the calibration equipment itself.

Fig. 1 shows in block form a sampling measurement system that is particularly useful for Performing very accurate amplitude measurements on specified sections of a TV wave train is suitable. The television video signal is supplied via an input terminal 2 applied to a sensing bridge 1. The type of the sensing bridge 1 is detailed will be described later with reference to Fig. 2, but it can now briefly be said that the sensing bridge as a gate circuit under the control of a gate pulse generator 3 works, which acts in such a way that it makes the gate permeable at a point in time that is determined by a timer circuit 4. Synchronization pulses are over an input terminal 5 at the television line frequency to the timer circuit 4 created. When receiving the gate pulses from the gate pulse generator 3, the scanning bridge 1 conducts for a short period of time and allows a storage capacitor 6 charges up to the sample. Because the transmission time or conduction time of the scanning bridge 1 is extremely short, i.e. in the order of 1 ns, the capacitor charges 6 not necessarily all the way to the level of the sensed or sampled Vidcosignals on. The sample or detection value held in the storage capacitor 6 is via a coupling capacitor 7 to a buffer amplifier 8 with a gain factor 1 forwarded.

This voltage is then generated by means of a further amplifier 9 with a precisely preset gain factor, in this case the gain factor 64, reinforced. After amplification, the analog signal is sent to an analog / digital converter 10 forwarded, which has a relatively low accuracy, but very quickly is working. In connection with the present invention this means that the Converter 10 is typically an 8 bit converter, albeit possibly a 16 Bit corresponding accuracy is finally required. The use of an 8 Bit converter allows a rapid conversion of the coupled via the capacitor 7 Voltage in digital form.

It is understood that the analog / digital converter 10 as an output signal does not emit a digital word that already has an exact Representation of the amplitude of the sampled video signal forms. That from the converter 10 generated digital word is sent to a cumulative memory 11 and at the same time a level monitor circuit 12 forwarded. The cumulative memory 11 operates so that it matches the last digital word received with the one already in memory contents added. The cumulative sum in the memory 11 is then a Digital / analog converter 13 to a feedback bridge 15, to a bridge bias circuit 14 and forwarded to the lower end of the storage capacitor 6. The feedback bridge 15 is designed so that the capacitor 6 is forced to the level that corresponds to the content of the cumulative memory 11 corresponds to hold between the sampling times, and this can therefore not deal with the leakage current of the sensing bridge 1 and the Discharge leakage current of the coupling capacitor 7. The same, at the bottom of the Storage capacitor 6 applied voltage prevents leakage through the storage capacitor between the sampling times and keeps the leakage through the storage capacitor extremely low during the sampling and the analog / digital conversion time, during which the feedback bridge 15 blocks. The bridge bias circuit 14 acts so that it feeds two bias signals to the sensing bridge 1, each one positive and one negative signal, with respect to the content level of the cumulative Memory 11 are fixed. This ensures that the sensing bridge 1 has a receives correct preload.

The feedback bridge 15 simply consists of four diodes 53, 54, 55, 56, which are connected in a bridge structure as shown in Figure 3, wherein control inputs 60 and 61 from the timer circuit 4 with input signals are supplied, with a drive pulse converted via an inverter 57 or is swept. The terminal 50 of the bridge is with the junction between the Capacitors 6 and 7 are connected and terminal 51 is controlled by converter 13.

The feedback bridge 15 is operated so that it during the Conducting time of the scanning bridge 1 results in a very high impedance, so that the capacitor 6 can charge itself under the influence of the sampled video signal. As soon however, the sample is taken and the sample bridge 1 is in the blocking state got is influenced by the gate pulse generator 3 and the analog / digital converter 10 has gone through its change cycle, the feedback bridge 15 is fully conductive, so that it sends the output of the digital / analog converter 13 to the capacitor 6 transmits and thus keeps its voltage constant between the sampling times.

The clamping bridge 16 is constructed identically to the representation in Fig. 3, however, in this case the clamp 50 is connected to a junction between the Capacitor 7 and the amplifier 8 connected, the terminal 51 is connected to ground and the Drive pulses are received from the timer circuit 4, one of these Pulses reversed or inverted with respect to the other by means of the pulse inverter 58 is.

The feedback bridge 15 and the bridge bias circuit 14 act so that when the sampling time occurs, the voltage of the storage capacitor 6, which represents the sample, just care about the difference between his previously taken value and the new sample value changes. If this difference always is still quite large, the capacitor can take the actual value of the sample size not yet reached even with the second occurrence, but rather some sampling periods take until this is the case. The voltage step, i.e. the change in voltage of the storage capacitor 6, is through the coupling capacitor 7 and the amplifier 8 and 9 passed on to the analog / digital converter 10. During the period in where the analog / digital conversion takes place, the feedback bridge 15 and the clamping bridge 16 10 blocked, so that the voltage received from the converter through the output signals of the digital / analog converter 13 is not influenced.

The periodic sampling process continues with the storage capacitor progressively changes its voltage until it reaches the value of the sensed or detected Reached the point on the wave train.

The level monitor 12 continuously monitors the output signal of the Analog / digital converter 10 and, as soon as this becomes zero or negative, the in digital form cumulative sum in the cumulative memory 11 over a port 17 and a Average or average value circuit passed on to a display 19. The final reading can correspond to several samples from the output signals of the cumulative memory can be averaged to reduce the impact of noise on the video signal and can be displayed as long as required; then the setting of the The timer circuit can be changed to select a different point in the video signal, whereupon the measuring process is repeated.

The sense bridge 1 and the bridge bias circuit 14 are with more Details are shown in FIG. The incoming video signal is via the terminal 2 and to one of four diodes 23, 24, 25 and 26 shown in FIG Way connected, existing diode bridge 22 is applied.

The output of the bridge is to the storage capacitor 6 in FIG. 1 tied together. A resistor 21 is between the terminal 2 and earth, so that a correct Matched input resistance for the transmission line connected to terminal 2 is guaranteed. The sensing bridge is connected to terminals 27 under the influence of and 28 gate pulses applied by the gate pulse generator 3 in the required Wise made conductive and blocked. These pulses are sent to the diode bridge 22 coupled via filters, which each have capacitors 29 and 30 and an inductance 31 included. These filters provide a low impedance earth path at the connection points 32 and 33 for the higher-frequency components of the input signal at the terminal 2, which otherwise has the stray capacitance of diodes 23, 24, 25 and 26 would be transmitted to the storage capacitor 6 and significant errors of the sampled Value during the conversion time of the analog / digital converter 10, i.e. when the diodes 23 to 26 are blocked. The sensing bridge 1 receives its bias by means of a constant current path 34, which is adapted from a constant current source 35 via Resistors 36 and 37 leads to a second current source 38. This creates bias points 39 and 40 obtained, through which the diodes 23 to 26 influencing the on the output signal of the digital / analog converter 13 applied to the terminal 41 is biased can be. This allows the diodes to be initially biased to a value which depends on the voltage actually present on the capacitor 6. In particular the transmission properties of the four forming the scanning bridge 1 remain Diodes and the reverse voltage states of the two output diodes 24 and 25 of the sensing bridge constant even if the sampled value of the video signal at terminals 2 and the detection value stored by the capacitor 6 differs when the Sample points of the video signal changes.

Under normal circumstances, the diodes 23-26 are blocked, however they become briefly conductive when the gate impulses are applied to terminals 27 and 28 and allow the capacitor 6 to be charged by the terminal 2 applied Video signal.

The time length of the gate impulses is very short, typically in the Size of 1 ns.

The event sequence can be based on the time sequences shown in FIG. 4 can be clearly detected, with the synchronization pulses recorded at terminal 5 are shown in line a. It is assumed that a television video wave train is recorded at terminal 2 and that the synchronization pulses are composite Impulses are an identification of the line to be scanned and enable an indication of the point in time at which the line run begins. The time at which the video wave train is detected by the sensing bridge 1 becomes by a row selector contained in the timer circuit 4 and by the size a delay generated by a variable delay circuit 20 is determined. In Fig. 4 this delay is indicated by the symbol #, and it can be seen that shortly before the occurrence of the gate or sampling pulses recorded in line b the feedback bridge 15 and the clamping bridge 16 are blocked according to line c. Whom the feedback bridge 15 is conductive, it forcibly holds the in the capacitor 6 stored voltage on the output value of the digital / analog converter 13, and when the clamping bridge 16 is conductive, it clamps the input signal of the buffer amplifier 8 to a fixed reference voltage, the nominal voltage zero. During that period of time the coupling capacitor 7 charges itself to a state of equilibrium via the bridges 15 and 16 present a low impedance path. Once the bridges 15 and 16 are blocked to enable a new acquisition, the charge will be blocked held on the coupling capacitor 7 and so the buffer amplifier 8 the step change the stored voltage on the capacitor 6, as this corresponds to the Amplitude of the video wave train charged or discharged at the time of acquisition will. The feedback bridge 15 and the clamping bridge 16 are used for charging during the (or discharge) of the capacitor 6 and to transfer the step voltage over the capacitor 7 and the amplifiers 8 and 9 to the analog / digital converter 10 and required for the conversion process in the analog / digital converter 10 for the step voltage Time locked, and the last-mentioned time segment is indicated in line d of FIG. Before the point in time at which the position of the wave train is recorded the next time, are the feedback bridge 15 and the clamping bridge 16 again in Conductive state, so that they keep the newly recorded value of the capacitor 6 or set the input of the buffer amplifier 8 to zero.

As soon as the conversion process is complete and the one held in memory 11 If the cumulative total is renewed or refreshed, the new total value is due the converter 13 is converted back into an analog signal to the bias of the sensing bridge 1 and the storage capacitor 6 ready for the next sampling process.

It follows from the foregoing description that the capacitor 6 existing voltage reaches its final value only after repeated scanning or recording of a whole number of consecutive processes and, in order to achieve sufficient accuracy by averaging an approximately in the input signal or To achieve the noise present in the measurement system, it is necessary to use a large Number of repetitions of the adjacent wave train after the To capture measuring system to its final value. Those to carry out a specific Measurement required relatively long time can be undesirable if a Comparison level measurement with reference to different locations at the recurring ones Wave train is to be carried out. For example, wave train measurements are on a television signal in general, difference measurements, i.e. the level of a particular The point is often referred to as a black level reference point of the wave train second hand. In principle, this would result in a very high long-term direct current stability be required both in the measurement system and in the television signal generator, and around To reduce these requirements, the system shown in Fig. 1 is designed so that two points alternate with successive occurrences in the adjacent Wave train can be detected. Nesting the samples can cause drift within the integration period i.e. the one for the required number necessary time for scanning processes and averaging, with a constant effect can be assumed for both measured values and this drift is compensated for by when calculating the difference between the two series of samples.

The cumulative memory 11 is used to adapt to this operating mode divided into two sections 11a and 11b, each half of the memory processing data, which are each related to the measurement of a point of the wave train, while the the other half of the memory processes the data related to the second digit. It it is necessary to set the memory with a repetition period of the current To switch the video signal at the appropriate rate, however, this can easily be done under the influence the timer circuit 4 as a function of the recorded synchronization pulses can be reached at terminal 5. In the same way, the output is cumulative Memory 11 alternatively switched between the two values, so that at any time the output signal generated by the digital / analog converter 13 is based on the next pass to be scanned wave traction point relates.

The mean value circuit or the mean value circuit is also the same 18 divided into two sections 18a and 18b, the averages of the two, by the two sections of the cumulative memory 11 output data series in the to calculate the necessary integration time.

Because there is no longer a need for perfect DC stability to provide for a longer period of time, the integration time length for a given measurement can be expanded to the extent necessary to keep the Effect of the noise in the input signal or in the system is necessary. By increasing of the integration period can reduce the theoretical accuracy of comparative measurements can be increased considerably.

Instead of dividing the cumulative memory 11 and the averaging circuit 18 in two sections 11a and lib or 18a and 18b, these can also be in a larger one Number of sections can be subdivided so as to enable one accordingly larger number of individual points can be measured in the adjacent wave train. For example, if comparative measurements are required for four points on the wave train there can be four sections in the cumulative memory and in the average circuit are provided, with every fourth occurrence of the corresponding point of the Wave train the data must be entered in the appropriate section.

In some applications it may be possible to use the feedback bridge 15 and the clamping bridge 16 each through resistors with carefully selected To replace values if the sampling repetition rate is correspondingly low.

On the other hand, it is in principle possible to use the feedback bridge, the clamping bridge 16, the capacitor 7 and the amplifiers 8 and 9 by a differential amplifier with two inputs, one of which is connected to the junction between the storage capacitor 6 and the sensing bridge 1 and its other input with the converter 13 is connected. Such an amplifier would have to have the same gain factor like the amplifier 9 and should also have a very high common-mode rejection characteristic exhibit. It is currently believed that the embodiment shown in Fig. 1 is better Results.

The sequence of the processes described, some of which are shown in Fig.

4 can be influenced by a sequence control device or by an appropriately programmed processing unit. Such a device could also be used to control the converter 10, the memory 11 and the averaging circuit 18 can be used if necessary.

Claims (11)

Sampling measuring circuit claims 1. Sampling measuring system with a Sampling or sampling device for receiving a signal with a repeated Occurring wave train, thereby g e k e n n n z e i c h -n e t that facilities (1, 3, 4) for repeated sampling of the signal at a certain point on the wave train is provided in sampling periods so as to progressively increase the value of one at one Storage capacitor (6) held sample size to change gradually so that it is brought in accordance with the value of the signal at the particular point, that means (13, 15) for forcibly holding the sample his previous value during one of the following sampling times immediately previous period is provided that the scanning device (1, 3, 4) a between the receiving point (2) for the signal and the storage capacitor (6) Diode bridge network (22; 23, 24, 25, 26), and also means (14) for biasing the diode bridge (22) in accordance with what is provided above Scan bet, so the amount of change in the diode bias voltage when scanning the waves to keep it as small as possible. 2. System according to claim 1, characterized in that g e k e n n z e i c h -n e t, that a device (13) is also provided to the storage capacitor (6) Potential difference appearing immediately before the next following sampling time to hold essentially at zero. 3. System according to claim 2, characterized in that g e k e n n z e i c h -n e t, that an analog / digital converter device (10) for converting the for the difference representative between the current sample and the previous sample Step change of the sample is provided in digital form and that a digital Cumulative summing device (11) is provided to make up successive Analog to digital conversions one for the amplitude size at the particular point generate representative digital value of the recorded wave train. 4. System according to claim 3, characterized in that g e k e n n z e i c h -n e t, that the digital value has a greater number of digital digits than the digital output signal the analog / digital converter device (10) has. 5. System according to claim 4, characterized in that g e k e n n z e i c h -n e t, that the digital value is converted into an analog feedback signal, which for compulsory compliance of the sample to the previous one Value and for biasing the diode bridge (22) corresponding to the previous sample value is used. 6. System according to claim 5, characterized in that g e k e n n z e i c h n e t the analog feedback signal via a feedback diode bridge (15) to the Storage capacitor (6) is fed back to the sample on its previous one Forcibly bring value. 7. System according to claim 6, characterized in that g e k e n n z e i c h n e t that the feedback diode bridge (15) during (one nei; nimimmediate to the next Sampling time of the previous period kept permeable and otherwise blocked is held. 8. System according to claim 5, characterized in that g e k e n n z e i c h n e t the feedback signal is fed to the storage capacitor (6) so that the over the potential difference appearing on the storage capacitor during one of the following Sampling time immediately preceding period is essentially zero. 9. System according to claim 5, characterized in that g e k e n n z e i c h n e t a bridge bias circuit (14) is arranged to receive the analog feedback signal receives and the diode bridge network (22) biases accordingly. 10. System according to claim 9, characterized in that g e k e n n z e i c h n e t the bridge bias circuit (14) has a constant current path (34, 35, 36, 37, 38) two preload points (39, 40), each with opposite lying points (33, 32) of a ring consisting of four diodes (23, 24, 25, 26) (22), which forms part of the diode bridge network, are connected analog Feedback signal is designed so that it is concurrent the values at the two bias points as a function of the digital value changes. 11. System according to claim 10, characterized in that it is e k e n n z e i c h -n e t that contain two filter networks (28, 29, 30, 31r) in the diode bridge network are, each with one of the respective opposite points (33, 32) and for coupling a pulse into the four diode Ring are designed, which makes the diodes conductive at the sampling time, wherein the filter networks are designed in such a way that they are coupled in when the diodes are blocked of high frequency components of the recorded signal to the storage capacitor (6) prevent.