GB2073951B - Multilayer interconnections for an integrated circuit - Google Patents

Multilayer interconnections for an integrated circuit

Info

Publication number
GB2073951B
GB2073951B GB8111352A GB8111352A GB2073951B GB 2073951 B GB2073951 B GB 2073951B GB 8111352 A GB8111352 A GB 8111352A GB 8111352 A GB8111352 A GB 8111352A GB 2073951 B GB2073951 B GB 2073951B
Authority
GB
United Kingdom
Prior art keywords
integrated circuit
multilayer interconnections
interconnections
multilayer
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB8111352A
Other versions
GB2073951A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of GB2073951A publication Critical patent/GB2073951A/en
Application granted granted Critical
Publication of GB2073951B publication Critical patent/GB2073951B/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H01L23/5283—Cross-sectional geometry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
GB8111352A 1980-04-11 1981-04-10 Multilayer interconnections for an integrated circuit Expired GB2073951B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4826480 1980-04-11

Publications (2)

Publication Number Publication Date
GB2073951A GB2073951A (en) 1981-10-21
GB2073951B true GB2073951B (en) 1984-10-03

Family

ID=12798569

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8111352A Expired GB2073951B (en) 1980-04-11 1981-04-10 Multilayer interconnections for an integrated circuit

Country Status (2)

Country Link
DE (1) DE3114679A1 (en)
GB (1) GB2073951B (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58213450A (en) * 1982-06-04 1983-12-12 Toshiba Corp Structure of multilayer wiring of semiconductor device
DE3228399A1 (en) * 1982-07-29 1984-02-02 Siemens AG, 1000 Berlin und 8000 München METHOD FOR PRODUCING A MONOLITHICALLY INTEGRATED CIRCUIT
DE3315615A1 (en) * 1983-04-29 1984-10-31 Brown, Boveri & Cie Ag, 6800 Mannheim METHOD FOR PRODUCING A MULTILAYER CIRCUIT
GB8410101D0 (en) * 1984-04-18 1984-05-31 Gen Electric Co Plc Semiconductor devices
JPS6267851A (en) * 1985-09-20 1987-03-27 Hitachi Ltd Semiconductor integrated circuit device
JPH0763064B2 (en) * 1986-03-31 1995-07-05 株式会社日立製作所 Wiring connection method for IC element
US9269610B2 (en) * 2014-04-15 2016-02-23 Qualcomm Incorporated Pattern between pattern for low profile substrate

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4140967A (en) * 1977-06-24 1979-02-20 International Business Machines Corporation Merged array PLA device, circuit, fabrication method and testing technique

Also Published As

Publication number Publication date
DE3114679A1 (en) 1982-01-14
GB2073951A (en) 1981-10-21

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Legal Events

Date Code Title Description
PE20 Patent expired after termination of 20 years

Effective date: 20010409