GB2061654A - Improvements in and relating to frequency discriminating circuits - Google Patents
Improvements in and relating to frequency discriminating circuits Download PDFInfo
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- GB2061654A GB2061654A GB8033095A GB8033095A GB2061654A GB 2061654 A GB2061654 A GB 2061654A GB 8033095 A GB8033095 A GB 8033095A GB 8033095 A GB8033095 A GB 8033095A GB 2061654 A GB2061654 A GB 2061654A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
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Abstract
An input signal is mixed in a first mixer (12) with a reference signal and in a second mixer (14) with the reference signal displaced by 90 DEG , to produce, at two points (I, II), signals having slopes dependent on the frequency difference. Two gates (30, 36) respectively compare limited versions of the signal at one point (thus representing the sign of the signal at said point) with a signal dependent on the slope of the signal at the other point. Each gate (30, 36) produces a digital output whose level is dependent on the difference in frequency between the input signal and the reference signal - the two inputs to each gate changing state at the same time. In order to eliminate errors, such as due to circuit delays or noise, which might occur if the two signals to each gate do not change state at exactly the same time, a switching circuit (54) selects one or other of the gate outputs in dependence on the relative magnitudes of the signals at points I and II - so that neither gate output is selected when its inputs are undergoing transitions. An output is produced on line 58 having a sign dependent on the sign of the frequency difference. Analogue outputs are produced on lines 71 and 72 which are dependent on the magnitude of the frequency difference between the input and reference signals. The signal on line 71 is independent of the sign of the frequency difference. The signal on line 72 has a sign dependent on the sign of the frequency difference. <IMAGE>
Description
SPECIFICATION
Improvements in or relating to frequency discriminating circuits
The invention relates to electrical arrangements and there specifically to frequency discriminators in the form of circuit arrangements which produce an output indicating whether an input signal has a frequency above or below that of a reference frequency.
According to the present invention, there is provided an electrical cicuit arrangement for producing an output signal having a value dependent on any frequency difference between an input signal and reference signal, comprising input means producing a plurality of waveforms each of a first or a second type, one type of which has a value dependent on the sign and magnitude of the phase difference between the input signal and the reference signal and the other type of which has a value dependent on the sign and magnitude of the phase difference between the input signal and a signal 90 phase-displaced from the reference signal, first comparing means for comparing a first sign signal dependent on the sign of a said waveform of the first type with a second slope signal dependent on the slope of a said waveform of the second type whereby to produce a first intermediate signal, second comparing means for comparing a second sign signal dependent on the sign of a said waveform of the second type with a first slope signal dependent on the slope of a said waveform of the first type whereby to produce a second intermediate signal nominally the same as the first intermediate signal, selecting means responsive to a control signal for seiecting one or other of the intermediate signals as the said output signal, and control means for producing the control signal in dependence on the relative magnitudes of said waveforms of the first and second types
respectively (but independent of their respective signs), whereby the intermediate signals are selected by the selecting means for respective periods of time which do not include transitions in the signals from which the respective comparing means produce them.
According to the present invention, there is also provided an electrical circuit arrangement for producing an output signal having a value dependent on any frequency difference between an input signal and a reference signal, comprising input means producing a plurality of waveforms each of a first or a second type, one type of which has a value dependent on the sign and magnitude of the phase difference between the input signal and the reference signal and the other type of which has a value dependent on the sign and magnitude of the phase difference between the input signal and a signal 90 phase-displaced from the reference signal, selecting means responsive to first and second slope signals respectively dependent on the slopes of said waveforms of the first and second type and operative to select one or other of the slope signals in dependence on a control signal, and control means for producing the control signal in dependence on the relative magnitudes of said waveforms of the first and second types respectively (but independent of their respective signs), whereby the slope signals are selected by the selecting means for respective periods of time which do not include transitions in the selected one of them and constitute the said output signal.
According to the present invention, there is further provided an electrical circuit arrangement responsive to a variable-frequency input signal and to a fixed-frequency reference signal and to produce a ditigal output having one digital value when the frequency of the input signal exceeds the frequency of the reference signal and a second digital value when the frequency of the input signal is less than the frequency of the reference signal, comprising first and second mixing means followed by filtering means for respectively mixing the input signal with the reference signal and a signal phase-displaced by 90 from the reference signal so as to produce first and second waveforms having respective slopes each of which is dependent in magnitude and sign on the magnitude and sign of the phase difference between the signals received by the respective mixer, first and second differentiating means for respectively producing first and second slope-dependent signals having magnitudes and signs dependent on the magnitudes and signs of the slopes of the first and second waveforms, means for limiting each of the slope-dependent signals and for inverting one, only, of them whereby to produce first and second slope sign signals, means for limiting the first waveform whereby to produce a first sign signal dependent on the sign of the first waveform, means for limiting the second waveform whereby to produce a second sign signal dependent on the sign of the second waveform, a first gate connected to receive the first slope sign signal and the second sign signal whereby to produce a first intermediate signal having one digital value when both signals which it receives have the same polarities and a second digital value when they have the opposite polarities, a second gate connected to receive the second slope sign signal and the first sign signal whereby to produce a second intermediate signal having one digital value when both signals which it receives have the same polarities, and a second digital value when they have opposite polarities, selecting means for selecting one or other of the intermediate signals as the digital output signal in dependence on the value of a control signal, and means for producing the control signal in dependence on an instanta
neous comparison of the relative magnitudes,
but not the relative signs, of the first and
second waveforms, whereby the periods of
time for which each intermediate signal is
selected do not include any transitions in the levels of the signals received by the gate
producing that intermediate signal.
According to the present invention, there is
still further provided an electrical circuit ar
rangement responsive to a variable-frequency
input signal and to a fixed4requency reference
signal and to produce an output whose mag
nitude and sign depend respectively on the
magnitude and sign of the frequency differ
ence between the input signal and the refer
ence signal, comprising four mixing means
respectively connected to mix the input signal
with the reference signal, with an inverted
version of the reference signal, with the refer
ence signal phase-displaced by 90", and with
an inverted version of the 90 phase-displaced
reference signal, each followed by filtering
means, whereby to produce first, second,
third and fourth wave-forms each of which
has a magnitude proportional to the phase
difference and therefore a slope dependent on
the frequency difference between the signals
received by the respective mixer, first and
second differentiating means for respectively
producing two slope signals having magni
tudes and signs respectively dependent on the magnitude and signs of the slope of the first
and second waveforms, a selecting switch connected to receive the Said two slope sig
nals, means responsive fo the third waveform
to produce a selecting signal having one or
other of two values according to whether the
third waveform is positive or negative with
respect to a datum, means connecting the
selecting signal to control the selecting switch so that it selects either one of the said two
slope signals according to the value of the
selecting signal whereby to produce one inter
mediate Signal, third and fourth differentiating
means for respectively producing two further
slope signals having magnitudes and signs dependent on the magnitudes and signs of
the slopes of the third and fourth waveforms-, another selecting switch connected to receive
the two further slope signals, means respon
sive to the first waveform to produce another
selecting signal having one or other of two
values according- to whether the first wave
form is positive or negative with respect to a 'datum, means connecting the other PelBdfing signal to control the other selecting switch to select one or otherof the two furtherslope signalaccording to the value of the other selecting signal wherebyto produce a second intermediate signal of the same form as the first intermediate spinal, output selecting means for selecting one or other of the inter mediate signals as the said output signal in
dependence on the value of a control signal,
and means for producing the control signal in dependence on an- insrantanecus comparison of the relative magnitudes, but not- the relative signs, of- one- of the first and second waveforms with one of the third and fourth waveforms, whereby the period of time for which each intermediate signal is selected do not include any translations in the levels of the signals received by the selecting switch producing that intermediate signal.
Frequency discriminators embodying the in Invention will now be described, by way of example only, with reference to the accompanying drawings in which:
Figure 1 is a circuit diagram of one of the frequency discriminators;
Figure 2 is a circuit diagram of another of the frequency discriminators;
Figure 3 shows waveforms occurring in the frequency discriminators; and Figure- 4 shows how the frequency discrimi nator of Fig 1 or Fig. 2 may be used in a modulating system.
As shown in Fig. 1, the- input signal which may, for example, be a square wave nomi nally of 1.4 MHz, is applied on an input line 10 and fed to one input of each of twa mixers 12 and 14. The second input of mixer 12 is fed on a line 16 with the reference signal (of 1.4 MHz in this example, while the second input of mixer 14 is fed on a line 18 with the reference signal- displaced by 90 . The reference signal in this example is a square wave.
In Fig 3, waveform A shows the signal on line 16r waveform B shows the signal on line 18, and waveform C shows the input signal on line 10 which, as explained, is assumed in this example to be slightly greater than 1.4 MHz. Fig. I is annotated to show where the waveforms of Fig. 2 are produced.
Filters 20 and 22 select the lower sideband outputs of the mixers and these are then amplified by buffer amplifiers 23 and 24. The result is that triangular waveforms are produced at the amplifier outputs depending on the phase difference between the input signal and the signals on lines 16 and 18. Waveform D is the waveform at the output of amplifier 23 (point I, Fig. 1). As shown by waveform D, the output is at a maximum positive level at a point T1, when the waveforms A and C are in phase, falls to point T3 when waveform C leads waveform A by 90 , and reaches a maximum negative level at point T5 when waveform C is at 180 out of phase with waveform A.
Waveform E shows the output of amplifier 24 (point 11, Fig. 1). The waveform E is similar to waveform D, but 90 out of phase.
The output of amplifier 23 is then passed to a limiting (but not inverting) amplifier 28 and thence to one input of an EXCLUSIVE OR gate 30. In addition, the output of amplifier 23 is passed to a differentiating circuit 32 and then through a limiting and inverting amplifier 34 tD one input of a second EXCLU
SIVE OR gate 36.
The output of amplifier 24 is fed through a limiting (but not inverting) amplifier 38 to the second input of gate 36 and is also passed via a differentiating circuit 40 and limiting (but not inverting) amplifier 32 to the second input of gate 30.
The differentiating circuit 32 will produce an output (waveform F) dependent upon the sign and magnitude of the slope of waveform
D and the resultant output, after limiting and inversion in the amplifier 34, is the waveform shown at G in Fig. 3 (that is, the waveform at point Ill in Fig. 1). Waveform H is the output of the differentiating circuit 40 and waveform
I shows the corresponding waveform at point
IV in Fig. 1.
Waveforms F and H thus each have a magnitude dependent on the frequency divergence between the input signal and the reference signal.
Waveform J shows the waveform at point V in Fig. 1, that is, the output of amplifier 38, while waveform K shows the waveform at point VI, that is, the output of amplifier 28.
Therefore, gate 30 is comparing the waveforms I and K, and gate 36 is comparing the waveforms G and J. The outputs for the two gates are fed to respective inputs 50 and 52 of a switching circuit 54 which is operated, in dependence on a control signal on line 56, to connect one or other of the inputs to an output line 58.
As will be apparent from a comparison of waveforms I and K, gate 30 produces a digital output in the form of a logical "0" (in this example), waveform M, indicating that waveform C has a frequency greater than the reference frequency. Similarly, it is apparent from a comparison of waveforms G and J that gate 36 produces a logical "0" (in this example, waveform N). If the input signal had a lower frequency than the reference frequency, then each of the gates would produce a logical ''1''. It appears, therefore, that each gate is duplicating the operation of the other.
However, the operation of each gate requires that the waveforms I and K (in the case of gate 30), or waveforms G and J (in the case of gate 36) change from one level to the other at the same instant in time. If they do not, or if their transitions are not sharp because of noise or delay, then each gate may not maintain its logical "0" output (in this example) continuously but might switch temporarily to a logical ''1" producing momentary pulses P as shown on waveforms M and N. The purpose of the switching circuit 54 is to eliminate this possibility.
The control signal on line 56 for circuit 54 is produced on a comparator circuit 60. Circuit 60 has two comparators 62 and 64.
Comparator 62 has its negative input fed with an inverted form of waveform E from amplifier 24 via an inverter 66 and its positive input fed with the output of amplifier 23 (waveform
D). Comparator 64 has its positive input fed with waveform E and its negative input fed with waveform D. The comparator outputs are fed to respective inputs of an EXCLUSIVE OR gate 68. The result is that gate 68 produces waveform L (Fig. 3) which changes state each time the magnitude of one of the waveforms
D and E exceeds the other. Thus, at point T2 the magnitude of waveform E starts to become greater than that of waveform D and waveform L thus goes HIGH and remains
HIGH until time T4 where the magnitude of waveform D now begins to exceed the magnitude of waveform E.At point Te, the magnitude of waveform E once more begins to exceed the magnitude of waveform D, and waveform L therefore goes HIGH again.
Waveform L is the waveform of the control signal applied to the switching circuit 54. The switching circuit is arranged so that it connects its input 52 (the output of gate 36) to the line 58 when waveform L is HIGH, and connects its input 50 (the output of gate 30) to line 58 when waveform L is LOW. In this way, the waveform transitions taking place at time T3 (and at other corresponding times) on the inputs to gate 30 are prevented from affecting the digital output on line 58, and similarly the transitions taking place at times
T1 and T5 (and at other corresponding times) on the inputs to gate 36 are prevented from affecting the digital output on line 58.
The circuit arrangement also includes means for producing two other outputs. One such output is produced on a line 71 and is a level having a magnitude dependent on the frequency divergence between the input signal and the reference signal (but independent of the sign of this frequency divergence). The outut on line 71 may be passed to a comparator bank (not shown) which can apply various limit bands to it to assess how close the frequency of the input signal is to the reference value.
The second of these two additional outputs is an output on line 72 which is an analogue output having a magnitude and sign dependent on the frequency divergence between the input signal and the reference signal.
Line 71 is fed from a switching unit 73 under control of a further switching unit 74.
The latter is controlled by the control signal on line 56 and has an input 76 which is fed from the output of the differentiator circuit 32. This output is shown in waveform F (Fig.
3) and corresponds to waveform G-except, of course, that waveform G has been limited and inverted (as compared with waveform F) by the limiting and inverting amplifier 34.
The second input 78 of the switching circuit 74 is fed from the output of differentiating circuit 40, and this output is shown in waveform H. Waveform H corresponds to waveform I, except, of course, that the latter has been limited by amplifier 42.
When the control signal on line 56 (waveform L) is HIGH, the switching circuit 74 connects its input 76 to line 70 and therefore waveform F is fed to the switching unit 73.
When waveform L goes LOW, then the switching circuit 74 connects its input line 78 to line 70 and waveform H is thus fed to the switching unit 73.
The switching circuit 74 ensures that the signal on line 70 is isolated from the transitions of waveforms F and H.
The switching unit 73 also receives an inverted version of the signal on line 70 via an inverter 86. The switching unit 73 is controlled by a control line 75 so as to select either the signal on line 70 or its inverted version from inverter 86 and to pass the selected signal to the output line 71. Line 75 is fed with a limited version of the signal on line 70 which is produced by a limiter 92.
Therefore, the polarity of the signal on line 75 changes with the polarity of the signal on line 70 and the switching unit 73 switches in synchronism, thereby producing an output on line 71 which always has the same polarity (and a magnitude dependent on the frequency divergence between the input signal and the reference signal).
The output line 72 is fed from a third switching circuit 80. The switching circuit 80 has one input line 82 which is fed from the output (waveform F or H) on line 70, and a second input line 84 which is fed with an inverted version of the output on line 70 via the inverter 86. The switching circuit 80 is controlled by a control signal on a line 88 which is fed from the output of an EXCLU
SIVE OR gate 90. Gate 90 has one input fed by the digital output signal on line 58 and a second input fed with the output on line 70 via the limiting amplifier 92.
Therefore, when the input signal has a higher frequency than the reference signal (as in the example being considered) gate 90 will cause switch 80 to connect either line 82 or line 84 to output 72 in such sequence that the signal on output 72 always has one particular polarity and has the magnitude of the signal on line 70 (that is, a magnitude proportional to the frequency divergence between the input and reference signals). If, on the other hand, the input signal has a lower frequency than the reference signal, then the digital output on line 58 will have the opposite logical value, and gate 90 will cause switch 80 to connect lines 82 and 84 to output 72 in such sequence that the signal on output 72 will again have the magnitude of the signal on line 70 but will have the other polarity.As the output on line 72 is derived from line 70 it is (like the output on line 70) unaffected by transitions in the waveform.
Fig. 2 shows another form of frequency discriminator which produces an analogue output directly.
As shown, the input signal, which may, for example be a square wave nominally of 1.4
MHz, as in the case of the circuit arrangement of Fig. 1, is applied on an input line 110 to each of four mixers 112, 114, 116 and 118.
The second input of mixer 11 2 is fed on a line 120 with a reference signal (of 1.4 MH in this example) and the second input of mixer 114 is fed on a line 1 22 with an inverted version of the reference signal. The second input mixer 11 6 is fed on a line 1 24 with the reference signal displaced by 90 and the second input of the mixer 11 8 is fed on a line 1 26 with an inverted form of the 90 -dis- placed reference signal.
Therefore, and referring to Fig. 3, line 1 20 carries the waveform A, line 122 carries the waveform - A, line 124 carries the waveform
B, line 1 26 carries the waveform - B, and line 110 carries the waveform C.
The outputs of the mixers are fed to respective low passfilters 128, 130, 132 and 134 whose outputs in turn feed respective buffer amplifiers 136, 138, 140 and 142.
The filters select the lower sideband outputs of the mixers, and as in the case of the circuit arrangement of Fig. 1, produce triangular waveforms dependent on the phase difference between the signals mixed in the associated mixer. Therefore, amplifier 1 36 produces the waveform D, amplifier 1 38 the waveform - D, amplifier 140 the waveform E and amplifier 142 the waveform - E. Each of the amplifier outputs is fed into a respective differentiating circuit 144, 146, 148 and 1 50.
Therefore, the differentiating circuit 144 produces the waveform F, circuit 146 produces the waveform - F, circuit 148 produces the waveform H and circuit 1 50 the waveform
- H.
The waveforms F and - F are passed to a switch 152 and the waveforms H and - H are passed to a switch 1 54.
Switch 1 52 is controlled by the waveform J which is produced by a limiter 1 56 responsive to the output of amplifier 140. Switch 1 54 is controlled by waveform K which is produced by a limiter 1 58 responsive to the output of amplifier 1 36.
The operation of switch 152, therefore, is to select the waveform F or - F in synchronism with the waveform E. Switch 1 52 produces waveform N which, in this example, has a positive value indicating that the input signal (waveform C) has a frequency greater than the reference frequency. Similarly, switch 1 54 is controlled so as to select either the waveform H or the waveform - H, and thus produces the output waveform M. Again, in this example M had a positive value. In each case, the switches will produce a negative value if the input signal had a lower frequency than the reference frequency.
Waveforms M and N are fed into a third switch 106. This Is controlled by a comparator circuit 60 which is in the same form as the comparator circuit 60 of Fig. 1 and will not be described again. It therefore produces waveform L on its output line 56.
Therefore, as in the case of the circuit arrangement of Fig. 1, waveform L causes the switch 1 60 to select either the waveform M or the waveform N, in synchronism with waveform L, so as to produce the selected waveform at its output on line 1 62. The output on line 1 62 corresponds to the output on line 72 of the circuit arrangement of Fig. 1 in that it is an analogue output having a magnitude and sign dependent on the frequency divergence between the input signal and the reference signal. This output can be fed through a limiting amplifier 1 64 to produce a digital output on line 166, indicating the sign of the frequency divergence.
If required, circuitry corresponding to that in the circuit arrangement of Fig. 1 can be provided to produce an output corresponding to that produced on line 71 of Fig. 1, that is, a signal having a magnitude dependent on the frequency of phase divergence between the input signal and the reference signal but independent of the sign of this divergence.
The frequency discriminator of Fig. 1 is advantageous over that described with reference to Fig. 1 in that the signal on line 1 62 is free from momentary pulses whereas the signals on lines 71 and 72 do suffer from momentary pulses due to the finite delays through inverter 86 and limiter 92.
Although the circuit description has been given on the basis that the input signal and the reference signal are in the form of square waves, they could be sine waves, but in this case only output 58 of Fig. 1 or output 1 66 of Fig. 2 would be valid.
The modulating system of Fig. 4 shows how either the frequency discriminator shown in Fig. 1 or that shown in Fig. 2 can be used to produce frequency modulation.
As shown in Fig. 4, the system includes a voltage-controlled oscillator (VCO) 200 whose output F0 is fed (as the waveform C, Fig. 3) to the frequency discriminator (according to the circuit of Fig. 1 or Fig. 2) which is indicated by the block 202. The reference frequency,
Fr, (waveform A of Fig. 3) is fed to the discriminator 200 on a line 204, and inverting and phase shifting circuitry is provided within the block 202 to produce the waveform - A, B and - B.
The frequency discriminator 202 therefore produces an analogue output on a line 206 which is given by V = K(F-F,), and is the signal produced on line 72 of the discriminator of Fig. 1 or on line 1 62 of the discriminator of Fig. 2; K is a constant. This signal is fed into the inverting input of a differential amplifier 208. The non-inverting input of the amplifier receives a signal Vm on a line 210 which is a waveform representing the data for modulation. The output of amplifier 208 is fed through a loop filter 212 to control the frequency of the VCO 200.
Because the system is connected in a closed loop, it tends to a condition in which: VmK (FoFr) = O, or
Vm F0 = Fr +
K as required. The modulated output is therefore produced on a line 214.
The advantage of the frequency modulating system shown in Fig. 4 is that it has a high stability which is related to the high stability of the reference frequency. Furthermore, an arbitrary modulating voltage Vm can be used.
For example, it can have very low frequency components.
Claims (23)
1. An electrical circuit arrangement for producing an output signal having a value dependent on any frequency difference between an input signal and a reference signal, comprising input means producing a plurality of waveforms each of a first or a second type, one type of which has a value dependent on the sign and magnitude of the phase difference betwen the input signal and the reference signal and the other type of which has a value dependent on the sign and magnitude of the phase difference between the input signal and a signal 90t phase-displaced from the reference signal, first comparing means for comparing a first sign signal dependent on the sign of a said waveform of the first type with a second slope signal dependent on the slope of a said waveform of the second type whereby to produce a first intermediate signal, second comparing means for comparing a second sign signal dependent on the sign of a said waveform of the second type with a first slope signal dependent on the slope of a said waveform of the first type whereby to produce a second intermediate signal nominally the same as the first intermediate signal, selecting means responsive to a control signal for selecting one or other of the intermediate signals as the said output signal, and control means for producing the control signal in dependence on the relative magnitudes of said waveforms of the first and second types respectively (but independent of their respective signs), whereby the intermediate signals are selected by the selecting means for respective periods of time which do not include transitions in the signals from which the respective comparing means produce them.
2. An electrical circuit arrangement for producing an output signal having a value dependent on any frequency difference between an input signal and a reference signal, comprising input means producing a plurality of waveforms each of a first or a second type, one type of which has a value dependent on the sign and magnitude of the phase difference between the input signal and the reference signal and the other type of which has a value dependent on the sign and magnitude of the phase difference between the input signal and a signal 90 phase-displaced from the reference signal, selecting means responsive to first and second slope signals respectively dependent on the slopes of said waveforms of the first and second type and operative to select one or other of the slope signals in dependence on a control signal, and control means for producing the control signal in dependence on the relative magnitudes of said waveforms of the first and second types respectively (but independent of their respective signs), whereby the slope signals are selected by the selecting means for respective periods of time which do not include transitions in the selected one of them and constitute the said output signal.
3. A circuit arrangement according to claim 2, including inverting means for inverting the selected slope signal each time it has a particular polarity whereby to produce the said output signal which always has the other said polarity and a magnitude dependent on the magnitude of the said phase difference.
4. A circuit arrangement according to claim 2 or 3, in which there are two said waveforms, one of each said type, and including first and second differentiating means respectively connected to receive said waveforms and operative to produce the first and second slope signals.
5. A circuit arrangement according to claim 1, in which there are two said waveforms, one of the first type and one of the second type, and including first limiting means connected to receive the waveform of the first type and to produce therefrom the said first sign signal, differentiating means connected to receive and differentiate the waveform of the second type thereby to produce the said second slope signal, second limiting means connected to receive the waveform of the second type and to produce therefrom the said second sign signal, and further differentiating means connected to receive, differentiate and invert the waveform of the first type and thereby to produce the said first slope signal, and in which the said comparing means comprise respective two-input gates each arranged to produce a respective digital signal constituting the respective intermediate signal, each gate producing a digital signal of one binary value when both its inputs have the same sign with respect to a datum and a digital signal of the opposite binary value when its two inputs have opposite signs with
respect to the said datum.
6. A circuit arrangement according to
claim 5, including limiting means for limiting
the output of each differentiating means.
7. A circuit arrangement according to
claim 5 or 6, including second selecting
means connected to receive the first and sec
ond slope signals, the second selecting means
being responsive to the said control signal
whereby to select one or other of these two
signals, in accordance with the instantaneous
value of the control signal, for respective
periods of time which do not include transi
tions in the selected one of the said slope I signals, and inverting means operative to in
vert the said selected one of the said slope
signals each time it has a particular polarity
whereby to produce an output which always
has the other said polarity and a magnitude
dependent on the slope af one said waveform
and thereby dependent on the magnitude of
the said frequency difference.
8. A circuit arrangement according to any
one of claims 5 to 7, including analogue
output means for producing an analogue out
put having a magnitude and sign dependent
on the magnitude and sign of the said fre
quency difference.
9. A circuit arrangement according to
claim 7, including third selecting means con
nected to receive the signal selected by the
second selected means and an inverted ver
sion of that signal and to select one or other
of these two signals in accordance with the
value of a further control signal, and means
operative to produce the further control signal
in dependence on the value of the said output
signal.
10. A circuit arrangement according to
any one of claims 3, 4 and 7 to 9, including
comparing means for comparing the magni
tude of the output of the inverting means with
one or more predetermined reference limits
whereby to compare the actual frequency dif reference represented by that magnitude with
the values thereof represented by those limits.
11. A circuit arrangement according to
any one of claims 2 to 10, in which the input
means comprises first and second mixing cir
cuits each followed by a respective low pass
filter, the first mixing circuit being connected
to receive the input signal and the reference
signal whereby the output of the respective
filter is the waveform of the first type, and the
second mixing circuit being connected to re
ceive the input signal and the signal phase
displaced by 90 from the reference signal
whereby the output of the respective filter is
the waveform af the said second type.
1 2. A circuit arrangement according to
claim 1, in which there are four said input
waveforms, two of the said first type one of
which is an inverted form of the other, and
two of the said second type one of which is F an inverted form of the other, and in which the first and second comparing means are, first and second selecting gates respectively, and including means connecting the first selecting gate to receive two said second slope signals respectively dependent on the slopes of the two waveforms of the second type whereby the selecting means selects one or other of them as the first intermediate signal according to the value of the first sign signal, and means connecting the second selecting gate to receive two said first slope signals respectively dependent on the slopes of the two waveforms of the first type whereby the selecting means selects one or other of them as the second intermediate signal according to the value of the second sign signal.
1 3. A circuit arrangement according to claim 12, including first and second differentiating means respectively connected to receive and differentiate the two waveforms of the first type whereby to produce the said two first slope signals one of which is the inverse of the other, selecting switch limiting means connected to produce a limited version of one of the wave forms of the said first type and constituting the first sign signal, third and fourth differentiating means respectively connected to receive and differentiate the waveforms of the said second type so as to produce the two said second slope sign signals one of which is the inverse of the other, and limiting means connected to produce a limited version of one of the waveform of the said second type and constituting the second sign signal.
14. A circuit arrangement according to claim 12 or 13, in which the input means comprises a first mixing circuit connected to receive the input signal and the reference signal and followed by a first low pass filter whereby to produce one of the said waveforms of the first type which has a value dependent on the phase difference between the input signal and the reference signal, a second mixing circuit connected to receive the input signal and a signal 180D phase-displaced from the reference signal and followed by a second low pass filter whereby to produce the other waveform of the second type and which has a value dependent on the phase difference between the input signal and the signal 180 phase-displaced from the reference signal, third mixing means connected to receive the input signal and a signal 90 phase-displaced from the reference signal and followed by a third low pass filter whereby to produce one of the waveforms of the second type and which has a value dependent on the phase difference between the input signal and the signal 90 phase-displaced from the reference signal, and fourth mixing means connected to receive the input signal and a signal 270 phase-displaced from the reference signal and followed by a fourth low pass filter whereby to produce the other waveform of the said second type and which has a value dependent on the phase difference between the input signal and the signal 270 phasedisplaced from the reference signal.
1 5. An electrical circuit arrangement responsive to a variable-frequency input signal and to a fixed-frequency reference signal and to produce a digital output having one digital value when the frequency of the input signal exceeds the frequency of the reference signal and a second digital value when the frequency of the input signal is less than the frequency of the reference signal, comprising first and second mixing means followed by filtering means for respectively mixing the input signal with the reference signal and a signal phase-displaced by 90 from the reference signal so as to produce first and second waveforms having respective slopes each of which is dependent in magnitude and sign on the magnitude and sign of the frequency difference between the signals received by the respective mixer, first and second differentiating means for respectively producing first and second slope-dependent signals having magnitudes and signs dependent on the magnitudes and signs of the slopes of the first and second waveforms, means for limiting each of the slope-dependent signals and for inverting one, only, of them whereby to produce first and second slope sign signals, means for limiting the first waveform whereby to produce a first sign signal dependent on the sign of the first waveform, means for limiting the second waveform whereby to produce a second sign signal dependent on the sign of the second waveform, a first gate connected to receive the first slope sign signal and the second sign signal whereby to produce a first intermediate signal having one digital value when both signals which it receives have the same polarities and a second digital value when they have the opposite polarities, a second gate connected to receive the second slope sign signal and the first sign signal whereby to produce a second intermediate signal having one digital value when both signals which it receives have the same polarities, and a second digital value when they have opposite polarities, selecting means for selecting one or other of the intermediate signals as the digital output signal in dependence on the value of a control signal, and means for producing the control signal in dependence on an instantaneous comparison of the relative magnitudes, but not the relative signs, of the first and second waveforms, whereby the periods of time for which each intermediate signal is selected do not include any transitions in the levels of the signals received by the gate producing that intermediate signal.
1 6. A circuit arrangement according to any one of claims 1 to 11, in which the control means comprises first and second comparators, the first comparator being con nected to receive two said waveforms of first and second type respectively whereby to produce a binary output having one binary value when one of its inputs is positive with respect to the other and the other binary value when that input is negative with respect to the other, the second comparator being connected to receive one of the said two waveforms and an inverted version of the other whereby to produce a binary output having one binary value when one of its inputs is positive with respect to the other and the other binary value when that input is negative with respect to the other, and a two-input gate connected to receive the two binary outputs whereby to produce the said control signal.
1 7. An electrical circuit arrangement responsive to a variable-frequency input signal and to a fixed-frequency reference signal and to produce an output whose magnitude and sign depend respectively on the magnitude and sign of the frequency difference between the input signal and the reference signal, comprising four mixing means respectively connected to mix the input signal with the reference signal, with an inverted version of the reference signal, with the reference signal phase-displaced by 90 , and with an inverted version of the 90 phase-displaced reference signal, each followed by filtering means whereby to produce first, second, third and fourth waveforms each of which has a magnitude proportional to the phase difference and therefore a slope dependent on the frequency difference between the signals received by the respective mixer, first and second differentiating means for respectively producing two slope signals having magnitudes and signs respectively dependent on the magnitude and signs of the slopes of the first and second waveforms, a selecting switch connected to receive the said two slope signals, means responsive to the third waveform to produce a selecting signal having one or other of two values according to whether the third waveform is positive or negative with respect to a datum, means connecting the selecting signal to control the selecting switch so that it selects either one of the said two slope signals according to the value of the selecting signal whereby to produce one intermediate signal, third and fourth differentiating means for respectively producing two further slope signals having magnitudes and signs dependent on the magnitudes and signs of the slopes of the third and fourth waveforms, another selecting switch connected to receive the two further slope signals, means responsive to the first waveform to produce another selecting signal having one or other of two values according to whether the first waveform is positive or negative with respect to a datum, means connecting the other selecting signal to control the other selecting switch to select one or other of the two further slope signals according to the value of the other selecting signal whereby to produce a second intermediate signal of the same form as the first intermediate signal, output selecting means for selecting one or other of the intermediate signals as the said output signal in dependence on the value of a control signal, and means for producing the control signal in dependence on an instantaneous comparison of the relative magnitudes, but not the relative signs, of one of the first and second waveforms with one of the third and fourth waveforms, whereby the periods of time for which each intermediate signal is selected do not include any transitions in the levels of the signals received by the selecting switch producing that intermediate signal.
18. A circuit arrangement according to any one of claims 12 to 14 and 17, in which the control means comprises first and second comparators, the first comparator having two inputs respectively connected to receive one of the waveforms of the first type and one of the waveforms of the second type whereby to produce a binary output having one binary value when one of its inputs is positive with respect to the other and having the other binary value when the said one input is negative with respect to the other, the second comparator having one of its inputs connected to receive the other waveform of the said first type and the said one waveform of the said second type whereby to produce a binary output having one binary value when one of its inputs is positive with respect to the other and having the other binary value when the said one input is negative with respect to the other, and a two-input gate responsive to the two binary outputs to produce the said control signal.
1 9. An electrical modulating circuit, comprising an electrical circuit arrangement according to any preceding claim, an adjustable oscillator producing a variable output frequency constituting the input signal of the said electrical circuit arrangement, a differential amplifier connected to receive the said output signal of the electrical circuit arrangement and a modulating signal and to produce difference output dependent on their difference, and means connecting the said difference output to control the output frequency of the oscillator in a sense such as to reduce the said difference output towards zero, whereby the output frequency of the oscillator constitutes the modulated output frequency.
20. A system according to claim 19, in which the modulating signal is a digital modulating signal.
21. A frequency discriminator, substantially as described with reference to Figs. 1 and 3 of the accompanying drawings.
22. A frequency discriminator, substan tally as described with reference to Figs. 2 and 3 of the accompanying drawings.
23. An electrical modulating system, substantially as described with reference to Fig. 4 of the accompanying drawings.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB8033095A GB2061654B (en) | 1979-10-20 | 1980-10-14 | Frequency discriminating circuits |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB7936482 | 1979-10-20 | ||
GB8033095A GB2061654B (en) | 1979-10-20 | 1980-10-14 | Frequency discriminating circuits |
Publications (2)
Publication Number | Publication Date |
---|---|
GB2061654A true GB2061654A (en) | 1981-05-13 |
GB2061654B GB2061654B (en) | 1983-07-27 |
Family
ID=26273290
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB8033095A Expired GB2061654B (en) | 1979-10-20 | 1980-10-14 | Frequency discriminating circuits |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2061654B (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0094837A2 (en) * | 1982-05-19 | 1983-11-23 | Westinghouse Electric Corporation | Phase-locked circuit loop having improved locking capabilities |
EP0500473A1 (en) * | 1991-02-22 | 1992-08-26 | SAT (Société Anonyme de Télécommunications) | Phase/frequency comparator for a clock recovery circuit |
-
1980
- 1980-10-14 GB GB8033095A patent/GB2061654B/en not_active Expired
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0094837A2 (en) * | 1982-05-19 | 1983-11-23 | Westinghouse Electric Corporation | Phase-locked circuit loop having improved locking capabilities |
EP0094837A3 (en) * | 1982-05-19 | 1985-06-12 | Westinghouse Electric Corporation | Phase-locked circuit loop having improved locking capabilities |
EP0500473A1 (en) * | 1991-02-22 | 1992-08-26 | SAT (Société Anonyme de Télécommunications) | Phase/frequency comparator for a clock recovery circuit |
FR2673344A1 (en) * | 1991-02-22 | 1992-08-28 | Telecommunications Sa | PHASE / FREQUENCY COMPARATOR FOR RHYTHM RECOVERY CIRCUIT. |
Also Published As
Publication number | Publication date |
---|---|
GB2061654B (en) | 1983-07-27 |
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