GB2029657A

GB2029657A - Measuring pulse frequency

Info

Publication number: GB2029657A
Application number: GB7849259A
Authority: GB
Original assignee: Siemens AG
Current assignee: Siemens AG
Priority date: 1978-05-26
Filing date: 1978-12-20
Publication date: 1980-03-19
Also published as: GB2029657B

Abstract

Pulse monitoring of the number of pulses received over a predetermined metering period, the beginning and end of which advances with respect to time, is achieved by supplying the pulses to a counter (2) which counts the pulses and provides an n-bit parallel output signal indicative of the number of pulses counted; the pulses are at the same time supplied to the forward counting input of a bidirectional counter (3). An n x k bit shift register (4) is provided into which the output signals from the counter (2) are read and shifted at a frequency not less than <IMAGE> of the maximum expected frequency of pulses to be monitored. Each shift pulse subsequently clears the counter (2). At the same time a signal appears at the output of the shift register (4) and is supplied via a decoding means (6), to the backward counting input of the bidirectional counter (3). The value in the bidirectional counter (3) is therefore dependent at any one time on the mean frequency of pulses received over the preceding metering period, which pulses may be representative of a particular quantity, such as electrical power consumed. The shift register (4) requires a relatively small number of storage locations. <IMAGE>

Description

SPECIFICATION Pulse monitoring This invention relates to a device for, and a method of, monitoring the number of pulses received over a predetermined metering period, the beginning and end of which advances with respect to time.

According to one aspect of the present invention, there is provided a device for monitoring the number of pulses received over a predetermined metering period, the beginning and end of which advances with respect to time, which device includes: a) a counter for counting the pulses and for providing n-bit parallel output signals; b) ann x k bit shaft register for storing the output signals from the counter so that at any one time the content of the shift register is dependent on the number of pulses received over the preceding metering period; and c) timing means for supplying timing pulses of a frequency not less than

of the maximum expected frequency of pulses to be monitored, each timing pulse serving to shift the contents of the shift register and to subsequent clear the counter.

According to another aspect of the present invention, there is provided a method of monitoring the number of pulses received in a predetermined metering period, the beginning and end of which advances with respect to time, which method includes supplying the pulses received to a counter which provides n-bit parallel output signals and supplying an output signal from the counter to an n x k bit shift register each time a timing pulse is supplied to the shift register, which timing pulse serves not only to shift the contents of the shift register but also to subsequently clear the counter, so that at any one time the content of the shift register is dependent on the number of pulses received over the preceding metering period.

The pulses to be monitored are preferably pulses of constant magnitude whose frequency is representative of a particular quantity, for example the electrical power supplied to a consumer. The metering period over which the pulses are monitored is of constant length and substantially continually advances at a constant rate with respect to time, so that the device continuously provides a value proportional to the mean frequency of the pulses received by the device over an immediately preceding period of predetermined length. Timing means are coupled to the shift register so as to supply an output signal from the counter to the shift register each time a timing pulse is supplied by the timing means.The frequency of the timing pulses and the magnitude of the value k indicating the number of serial bits provided within the shift register are chosen such that the contents of the shift register are at all times indicative of the distribution of the pulses received over the preceding metering period. So as to ensure that the counter has sufficient capacity even when the pulses received by the device are of the highest frequency, the frequency of the timing pulses is chosen to be not less than

of the maximum expected frequency of pulses to be monitored.

A device for monitoring the number of pulses received over a metering period, the beginning and end of which advances with respect to time, is known from German Offenlegungsschrift No. 2446 602. This known device includes a shift register, the input and output of which are connected respectiveliy to the forward counting input and the backward counting input of a bidirectional counter, the state of the bidirectional counter being continuously displayed with the aid of an LED display unit. Thus, each time a pulse is supplied to the forward counting input of the bidirectional counter, the value displayed by the display unit increases by 1, and, each time a pulse is supplied to the backward counting input of the bidirectional counter, the value displayed by the display unit decreases by 1.The pulses to be monitored are applied simultaneously to the input of the shift register and the forward counting input of the bidirectional counter. The delay introduced by the shift register is arranged to be equal to the chosen metering period so that the pulses at the output of the shift register are delayed with respect to the pulses supplied to the input of the shift register by this metering period. It will thus be appreciated that the value displayed by the display unit at any one time will correspond to the particular content of the shift register at that time and thus to the mean frequency ofthe pulses monitored over the immediate preceding metering period.

A similar device, but comprising not merely electronic components, but also electromechanical components, is described in the Applicants' Copending Patent Application No. 18986/77. In this case, the pulses to be monitored are supplied simultaneously to the input of a shift register and to an electromechanical device so as to rotate a shaft connected to a display mechanism stepwise in one direction at a rate proportional to the frequency of the pulses. The pulses emitted at the output of the shift register are supplied to the same electromechanical device so as to rotate the shaft stepwise in the opposite direction. Thus, at any one time, the angle of deflection of the shaft will correspond to the content of the shift register at that time and thus to the mean frequency of the pulses over the preceding metering period.

In the case of both these prior art devices, the pulses to be monitored are inserted into the shift register serially bit by bit and are shifted within the shift register by means of timing pulses of constant frequency not less than the maximum expected frequency of the pulses to be monitored. For achieving a predetermined degree of metering accuracy, at least 2000 pulses are preferably monitored in a metering period at the maximum frequency of the pulses, so that the shift register should have a capacity of at least 2000 bits. Such shift registers are relatively costly due to the large storage location requirement.

In order that the present invention may be more fully understood, an embodiment of a device according to the present invention will now be described, by way of example, with reference to the accompanying drawing, in which the single figure shows a block circuit diagram of the embodiment.

This embodiment comprises a pulse emitter counter 1 which supplies pulses at its output whose frequency is proportional to the instantaneous consumption of a specific quantity. This quantity can be, for example, a flowing liquid or a flowing gas or the electrical power drawn from an electrical power supply. The output pulses of the pulse emitter counter 1 are supplied to a counter 2 as well as to the forward counting input of a bidirectional counter 3, so that the value stored in this counter 3 is increased each time a pulse is supplied by the counter 1. The output pulses of the pulse emitter counter 1 are of the right form and size to actuate the counter 2 and the bidirectional counter 3. The value counted by the counter 2 is permanently available at its n-bit parallel output, the counter 2 being capable of counting up to 2"-1 pulses.In the exemplary embodiment, the counter 2 has four outputs of differing valency and can thus receive a maximum of 15 pulses during each counting step. The output signal of the counter 2, which is coded in the form of a tetrad, is permanently supplied to the inputs of an n x k organised shift register 4. In the exemplary embodiment, n = 4 and k = 128. The valuekis chosen such that at any one time the content of the shift register is dependent on the number of pulses received over an immediately preceding metering period. The shift register 4 additionally has a timing input T which is connected to the output of timing means 5. Transference of an output signal from the counter 2 to the shift register 4 takes place on supply of a timing pulse from the timing means 5 to the timing input T.

At the same time, on supply of a timing pulse, the values stored in the shift register 4 are shifted on by one position, so that the value previously stored in the final storage location of the shift register 4, which is coded as a tetrad, forms an output signal of the shift register 4 which is supplied as input signal to a decoder 6. The decoder 6 transforms the bit parallel input signal into an output signal consisting of a series of pulses. This output signal is supplied to the backward counting input of the bidirectional counter 3 so that, after each timing pulse, the value stored in the bidirectional counter 3 is reduced by the value previously stored in the final storage location of the shift register 4. The value stored in the bidirectional counter 3 may be made visible via a display unit 7.

This display unit 7 can be, for example, a LED display unit. Thus the value in the bidirectional counter 3 at any one time is dependent on the number, and therefore the mean frequency, of pulses emitted by the counter 1 over the preceding metering period.

After each transference into the shift register 4 of a bit-parallel output signal from the counter 2, the counter 2 must be reset to zero. The counter 2 is reset on receipt of a reset pulse at the reset input R.

Suitable reset pulses are derived from the timing pulses of the timing means 5 via a delay element 8.

Such an element ensures that the value stored in the counter 2 is erased only after this value has been transferred to the shift register 4. Aiternatively, the same effect can be achieved without the use of a delay element 8 by using the first flank of each timing pulse to control the shift register and the second flank of each timing pulse to reset the counter 2.

The frequency of the timing pulses must be selected such that, even when the pulse emitter counter 1 is operating at a maximum frequency, the counter 2 does not overflow. In the case of the exemplary embodiment, this means that, at the maximum frequency of the pulse emitter counter 1, the timing means 5 must emit a timing pulse before the 16th pulse enters the counter 2, as otherwise the counter 2 would overflow and no accurate information would be available for transference into the shift register 4. In general, this means that the frequency of the timing pulses must be equal to or greater than 1/(2"-1) of the maximum frequency of the pulse emitter counter 1.

The advantage of such a device may be illustrated with reference to an example in which up to 2048 pulses are received in a metering period. If the pulses to be monitored were merely supplied to a monitoring device comprising a shift register and a bidirectional counter in parallel as suggested in German Offenlegungeschrift No. 24 46 602, the pulses being inserted serially bit by bit into the shift register, it would be necessary for the shift register employed to have a capacity of 2048 x 1 bits.

However, if instead, the pulses are supplied to the embodiment of device according to the present invention just described and are counted within the first mentioned counter to form an n-bit parallel coded value which is then supplied to the n x k bit shift register, the shift register need have only n x 2048/2n storage locations. If, for example, the coun- ter is chosen to provide a 4 bit parallel output signal (tetrad), then the pulses are counted over 24 = 16 pulse periods of pulses of the maximum expected frequency and the value supplied to the shift register is shifted on only after 16 pulse periods. In this case a shift register having only

storage locations is required which is only 25% of the storage locations required in the case of the prior art construction. Thus a smaller shift register having fewer storage locations may be used. In the most disadvantageous case, again considering an arrangement in which up to 2048 pulses are received in a metering period, the value detected by the embodiment according to the present invention will differ by 16/2048 = 0.781% of the value detected by the prior art device. The timing pulse frequency of the shift register of this embodiment is reduced by about 1/2" with respect to the timing pulse frequency of the shift register of the prior art construction.

Claims

1. A device for monitoring the number of pulses received over a pedetermined metering period, the beginning and end ofwhich advances with respect to time, which device includes: a) a counter for counting the pulses and for providing n-bit parallel output signals; b) an n x k bit shift register for storing the output signals from the counter so that at any one time the content of the shift register is dependent on the number of pulses received over the preceding metering period; and c) timing means for supplying timing pulses of a frequency not less than

of the maximum expected frequency of pulses to be monitored, each timing pulse serving to shift the contents of the shift register and to subsequently clear the counter.

2. A device according to claim 1, further comprising a bidirectional counter to one input of which the pulses supplied to the first mentioned counter are supplied and to the other input of which pulses are supplied from decoding means connected to the output of the shift register, in use, so that the value in the bidirectional counter at any one time is dependent on the number of pulses received over the preceding metering period.

5. A device according to any preceding claim, wherein the timing means is arranged to shift the contents of the shift register by means of a first flank of each timing pulse and to clear the first mentioned counter by means of a second flank of each timing pulse.

6. A device according to any one of claims 1 to 4, wherein the timing means is arranged to reset the first mentioned counter by way of a delay element.

7. A device for monitoring the number of pulses received over a predetermined metering period, which device is substantially as hereinbefore described with reference to the accompanying drawing.

8. A method of monitoring the number of pulses received in a predetermined metering period, the beginning and end of which advances with respect to time, which method includes supplying the pulses received to a counter which provides n-bit parallel output signals, and supplying an output signal from the counter to an n x k bit shift register each time a timing pulse is supplied to the shift register, which timing pulse serves not only to shift the contents of the shift register but also to subsequently clear the counter, so that at any time the content of the shift register is dependent on the number of pulses received over the preceding metering period.

9. A method of monitoring the number of pulses received over a predetermined metering period, which method is substantially as hereinbefore described with reference to the accompanying drawing.