GB201414515D0 - Translation layer partitioned between host and controller - Google Patents

Translation layer partitioned between host and controller

Info

Publication number
GB201414515D0
GB201414515D0 GB201414515A GB201414515A GB201414515D0 GB 201414515 D0 GB201414515 D0 GB 201414515D0 GB 201414515 A GB201414515 A GB 201414515A GB 201414515 A GB201414515 A GB 201414515A GB 201414515 D0 GB201414515 D0 GB 201414515D0
Authority
GB
United Kingdom
Prior art keywords
host
controller
translation layer
layer partitioned
partitioned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB201414515A
Other versions
GB2519211A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LSI Corp
Original Assignee
LSI Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US14/060,799 external-priority patent/US9329991B2/en
Application filed by LSI Corp filed Critical LSI Corp
Publication of GB201414515D0 publication Critical patent/GB201414515D0/en
Publication of GB2519211A publication Critical patent/GB2519211A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • G06F11/108Parity data distribution in semiconductor storages, e.g. in SSD
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/04Addressing variable-length words or parts of words
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0608Saving storage space on storage systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0638Organizing or formatting or addressing of data
    • G06F3/064Management of blocks
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0292User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1016Performance improvement
    • G06F2212/1024Latency reduction
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/40Specific encoding of data in memory or cache
    • G06F2212/401Compressed data
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7201Logical to physical mapping or translation of blocks or pages
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7208Multiple device management, e.g. distributing data over multiple flash devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
GB1414515.5A 2013-08-16 2014-08-15 Translation layer partitioned between host and controller Withdrawn GB2519211A (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201361866672P 2013-08-16 2013-08-16
US201361873357P 2013-09-03 2013-09-03
US201361888681P 2013-10-09 2013-10-09
US201361893383P 2013-10-21 2013-10-21
US14/060,799 US9329991B2 (en) 2013-01-22 2013-10-23 Translation layer partitioned between host and controller

Publications (2)

Publication Number Publication Date
GB201414515D0 true GB201414515D0 (en) 2014-10-01
GB2519211A GB2519211A (en) 2015-04-15

Family

ID=51662491

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1414515.5A Withdrawn GB2519211A (en) 2013-08-16 2014-08-15 Translation layer partitioned between host and controller

Country Status (6)

Country Link
JP (1) JP6443794B2 (en)
KR (1) KR102328612B1 (en)
CN (1) CN104679446B (en)
DE (1) DE102014111670A1 (en)
GB (1) GB2519211A (en)
TW (1) TWI637262B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109669883A (en) * 2017-10-13 2019-04-23 质子世界国际公司 Logic storage unit for flash memory

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WO2016139749A1 (en) * 2015-03-03 2016-09-09 株式会社日立製作所 Computer system and storage control method
CN106101096B (en) * 2016-06-10 2022-06-28 北京数盾信息科技有限公司 High-speed encryption module based on interface bus separation
US10236909B2 (en) * 2017-03-31 2019-03-19 Sandisk Technologies Llc Bit-order modification for different memory areas of a storage device
US10534718B2 (en) * 2017-07-31 2020-01-14 Micron Technology, Inc. Variable-size table for address translation
US10354732B2 (en) * 2017-08-30 2019-07-16 Micron Technology, Inc. NAND temperature data management
JP6785205B2 (en) * 2017-09-21 2020-11-18 キオクシア株式会社 Memory system and control method
JP6785204B2 (en) 2017-09-21 2020-11-18 キオクシア株式会社 Memory system and control method
JP6982468B2 (en) * 2017-10-27 2021-12-17 キオクシア株式会社 Memory system and control method
CN107861752A (en) * 2017-11-29 2018-03-30 英业达科技有限公司 Server system
US10878859B2 (en) 2017-12-20 2020-12-29 Micron Technology, Inc. Utilizing write stream attributes in storage write commands
CN108319429B (en) * 2018-01-10 2021-02-19 北京思特奇信息技术股份有限公司 Method for accelerating file reading and computer equipment
JP6960877B2 (en) 2018-03-22 2021-11-05 キオクシア株式会社 Memory system
US11803325B2 (en) 2018-03-27 2023-10-31 Micron Technology, Inc. Specifying media type in write commands
CN109471596B (en) * 2018-10-31 2022-03-18 北京小米移动软件有限公司 Data writing method, device, equipment and storage medium
US11048413B2 (en) * 2019-06-12 2021-06-29 Samsung Electronics Co., Ltd. Method for reducing read ports and accelerating decompression in memory systems
US11188459B2 (en) * 2019-12-23 2021-11-30 Micron Technology, Inc. Data block switching at a memory sub-system
KR102267477B1 (en) 2020-02-20 2021-06-22 삼성전자주식회사 Storage device and operating method of the same
US11481115B2 (en) * 2020-08-17 2022-10-25 Western Digital Technologies, Inc. Host-managed hardware compression with zoned namespaces
GB2603459B (en) * 2021-01-22 2023-05-10 Advanced Risc Mach Ltd Data processing systems
CN113419678A (en) * 2021-06-18 2021-09-21 上海盈方微电子有限公司 Storage management method for embedded system

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GB9113469D0 (en) * 1991-06-21 1991-08-07 Anamartic Ltd Data storage management systems
US5943692A (en) * 1997-04-30 1999-08-24 International Business Machines Corporation Mobile client computer system with flash memory management utilizing a virtual address map and variable length data
JP3766188B2 (en) * 1997-08-22 2006-04-12 沖電気工業株式会社 Logical format conversion method and data storage medium
JP2000076117A (en) * 1998-08-31 2000-03-14 Kano Densan Hongkong Yugenkoshi Electronic device, control method therefor and storage medium
JP2001101071A (en) * 1999-09-29 2001-04-13 Victor Co Of Japan Ltd Data storage device using flash type memory and data managing method for the same memory
KR100706242B1 (en) * 2005-02-07 2007-04-11 삼성전자주식회사 Memory system and run level address mapping table forming method thereof
TW200832440A (en) * 2007-01-25 2008-08-01 Genesys Logic Inc Flash memory translation layer system
US7836226B2 (en) * 2007-12-06 2010-11-16 Fusion-Io, Inc. Apparatus, system, and method for coordinating storage requests in a multi-processor/multi-thread environment
WO2009110377A1 (en) * 2008-03-05 2009-09-11 日本電気株式会社 Metaserver and file management system
US7933303B2 (en) 2009-06-17 2011-04-26 Sumitomo Electric Industries, Ltd. Group-III nitride semiconductor laser device, and method for fabricating group-III nitride semiconductor laser device
US9058047B2 (en) 2010-08-26 2015-06-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
EP2646922A4 (en) * 2010-12-01 2015-11-25 Lsi Corp Dynamic higher-level redundancy mode management with independent silicon elements
CN103415844B (en) * 2011-01-18 2016-04-20 希捷科技有限公司 For the system and method that senior redundant information calculates
US8880839B2 (en) * 2011-04-14 2014-11-04 International Business Machines Corporation Writing adjacent tracks to a stride, based on a comparison of a destaging of tracks to a defragmentation of the stride

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109669883A (en) * 2017-10-13 2019-04-23 质子世界国际公司 Logic storage unit for flash memory
CN109669883B (en) * 2017-10-13 2023-11-03 质子世界国际公司 Logical memory cell for flash memory

Also Published As

Publication number Publication date
KR20150020136A (en) 2015-02-25
TWI637262B (en) 2018-10-01
KR102328612B1 (en) 2021-11-17
DE102014111670A1 (en) 2015-02-19
CN104679446A (en) 2015-06-03
JP6443794B2 (en) 2018-12-26
JP2015036982A (en) 2015-02-23
GB2519211A (en) 2015-04-15
TW201518944A (en) 2015-05-16
CN104679446B (en) 2017-10-03

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)