GB2007158A - Forming a Resist Pattern on a Substrate - Google Patents

Forming a Resist Pattern on a Substrate

Info

Publication number
GB2007158A
GB2007158A GB7841204A GB7841204A GB2007158A GB 2007158 A GB2007158 A GB 2007158A GB 7841204 A GB7841204 A GB 7841204A GB 7841204 A GB7841204 A GB 7841204A GB 2007158 A GB2007158 A GB 2007158A
Authority
GB
United Kingdom
Prior art keywords
substrate
resist pattern
resist
forming
built
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB7841204A
Other versions
GB2007158B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB2007158A publication Critical patent/GB2007158A/en
Application granted granted Critical
Publication of GB2007158B publication Critical patent/GB2007158B/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0277Electrolithographic processes
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004Photosensitive materials
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004Photosensitive materials
    • G03F7/075Silicon-containing compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si

Abstract

A method of forming a resist pattern on a substrate by the contamination resist technique involves forming a resist pattern 6 on the surface of a substrate 11 by selectively exposing the surface to a focussed electron beam 2, the resist pattern 6 being built up in thickness by the beam from an initial thin layer 5 of a suitable substance e.g. a silicone oil present on the substrate surface as an incidental or deliberately applied contaminant. The thickness of the pattern (and hence indirectly its line width) is monitored as it is being built up by monitoring electron scattering from the vicinity of the point of impact of the beam on the resist. In the preferred embodiment this is achieved by supporting the substrate 11, which is a thin metal film, on a thin non- backscattering member 12 of carbon, and measuring the number of electrons per unit time entering an aperture in a plate 14 on the opposite side of the substrate 11 to the beam 2. A detector 9 controls the electron beam source 8 in accordance with the measured number of electrons. <IMAGE>
GB7841204A 1977-10-26 1978-10-19 Forming a resist pattern ao a substrate Expired GB2007158B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US84552777A 1977-10-26 1977-10-26

Publications (2)

Publication Number Publication Date
GB2007158A true GB2007158A (en) 1979-05-16
GB2007158B GB2007158B (en) 1982-02-10

Family

ID=25295430

Family Applications (1)

Application Number Title Priority Date Filing Date
GB7841204A Expired GB2007158B (en) 1977-10-26 1978-10-19 Forming a resist pattern ao a substrate

Country Status (4)

Country Link
JP (1) JPS5496372A (en)
DE (1) DE2840553A1 (en)
FR (1) FR2407499A1 (en)
GB (1) GB2007158B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE14259T1 (en) * 1981-08-07 1985-07-15 Fraunhofer Ges Forschung PROCESSES FOR THE MANUFACTURE OF MICROSTRUCTURES ON SOLID BODIES.
DE3235064A1 (en) * 1982-09-22 1984-03-22 Siemens AG, 1000 Berlin und 8000 München TUNNEL CATHODE MASK FOR ELECTRON LITHOGRAPHY, METHOD FOR THEIR PRODUCTION AND METHOD FOR THEIR OPERATION
DE3533632A1 (en) * 1985-09-20 1987-04-02 Siemens Ag Method for producing a gate array at the customer's
US6042994A (en) * 1998-01-20 2000-03-28 Alliedsignal Inc. Nanoporous silica dielectric films modified by electron beam exposure and having low dielectric constant and low water content

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3080481A (en) * 1959-04-17 1963-03-05 Sprague Electric Co Method of making transistors

Also Published As

Publication number Publication date
FR2407499B1 (en) 1982-07-09
JPS5653207B2 (en) 1981-12-17
GB2007158B (en) 1982-02-10
DE2840553A1 (en) 1979-05-03
FR2407499A1 (en) 1979-05-25
JPS5496372A (en) 1979-07-30

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19961019