GB2006523B - Dynamic ram memory and vertical charge coupled dynamic storage cell therefor - Google Patents

Dynamic ram memory and vertical charge coupled dynamic storage cell therefor

Info

Publication number
GB2006523B
GB2006523B GB7839260A GB7839260A GB2006523B GB 2006523 B GB2006523 B GB 2006523B GB 7839260 A GB7839260 A GB 7839260A GB 7839260 A GB7839260 A GB 7839260A GB 2006523 B GB2006523 B GB 2006523B
Authority
GB
United Kingdom
Prior art keywords
storage cell
charge coupled
ram memory
vertical charge
dynamic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB7839260A
Other versions
GB2006523A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mohsen A M
Original Assignee
Mohsen A M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mohsen A M filed Critical Mohsen A M
Publication of GB2006523A publication Critical patent/GB2006523A/en
Application granted granted Critical
Publication of GB2006523B publication Critical patent/GB2006523B/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/35—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices with charge storage in a depletion layer, e.g. charge coupled devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/535—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/107—Substrate region of field-effect devices
    • H01L29/1075—Substrate region of field-effect devices of field-effect transistors
    • H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Memories (AREA)
GB7839260A 1977-10-13 1978-10-04 Dynamic ram memory and vertical charge coupled dynamic storage cell therefor Expired GB2006523B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US84173577A 1977-10-13 1977-10-13

Publications (2)

Publication Number Publication Date
GB2006523A GB2006523A (en) 1979-05-02
GB2006523B true GB2006523B (en) 1982-12-01

Family

ID=25285575

Family Applications (2)

Application Number Title Priority Date Filing Date
GB7839260A Expired GB2006523B (en) 1977-10-13 1978-10-04 Dynamic ram memory and vertical charge coupled dynamic storage cell therefor
GB8136432A Expired GB2095901B (en) 1977-10-13 1978-10-04 An mos transistor

Family Applications After (1)

Application Number Title Priority Date Filing Date
GB8136432A Expired GB2095901B (en) 1977-10-13 1978-10-04 An mos transistor

Country Status (4)

Country Link
JP (1) JPS5465489A (en)
DE (1) DE2844762A1 (en)
FR (1) FR2406286A1 (en)
GB (2) GB2006523B (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1979000474A1 (en) * 1978-01-03 1979-07-26 D Erb A stratified charge memory device
DE2855079A1 (en) * 1978-12-20 1980-07-17 Siemens Ag SEMICONDUCTOR MEMORY CIRCUIT
GB2070329B (en) 1980-01-25 1983-10-26 Tokyo Shibaura Electric Co Semiconductor memory device
US4335450A (en) * 1980-01-30 1982-06-15 International Business Machines Corporation Non-destructive read out field effect transistor memory cell system
CN113363323B (en) * 2020-03-05 2023-08-18 苏州大学 Single gate field effect transistor device and method for regulating and controlling driving current thereof
KR20230165567A (en) * 2022-05-27 2023-12-05 삼성전자주식회사 Semiconductor memory device and method for manufacturing the same

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3740731A (en) * 1971-08-02 1973-06-19 Texas Instruments Inc One transistor dynamic memory cell
GB1412132A (en) * 1972-10-10 1975-10-29 Texas Instruments Inc Dynamic data storage cell
CA1030263A (en) * 1973-05-21 1978-04-25 James A. Marley (Jr.) Single bipolar transistor memory cell and method
FR2326761A1 (en) * 1975-09-30 1977-04-29 Siemens Ag MEMORY OF INFORMATION FOR STORING INFORMATION IN THE FORM OF ELECTRIC CHARGERS AND PROCESS FOR ITS IMPLEMENTATION
US4003036A (en) * 1975-10-23 1977-01-11 American Micro-Systems, Inc. Single IGFET memory cell with buried storage element

Also Published As

Publication number Publication date
GB2095901B (en) 1983-02-23
FR2406286A1 (en) 1979-05-11
DE2844762A1 (en) 1979-04-19
FR2406286B1 (en) 1983-04-15
GB2095901A (en) 1982-10-06
JPS5465489A (en) 1979-05-26
GB2006523A (en) 1979-05-02

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee