GB1586597A - System for suppressing undesirable echoes in a pulse coherent radar - Google Patents

System for suppressing undesirable echoes in a pulse coherent radar Download PDF

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GB1586597A
GB1586597A GB2478977A GB2478977A GB1586597A GB 1586597 A GB1586597 A GB 1586597A GB 2478977 A GB2478977 A GB 2478977A GB 2478977 A GB2478977 A GB 2478977A GB 1586597 A GB1586597 A GB 1586597A
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signal
delay
canceller
equal
inputs
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Leonardo SpA
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Selenia Industrie Elettroniche Associate SpA
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S13/00Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
    • G01S13/02Systems using reflection of radio waves, e.g. primary radar systems; Analogous systems
    • G01S13/50Systems of measurement based on relative movement of target
    • G01S13/52Discriminating between fixed and moving objects or between objects moving at different speeds
    • G01S13/522Discriminating between fixed and moving objects or between objects moving at different speeds using transmissions of interrupted pulse modulated waves
    • G01S13/524Discriminating between fixed and moving objects or between objects moving at different speeds using transmissions of interrupted pulse modulated waves based upon the phase or frequency shift resulting from movement of objects, with reference to the transmitted signals, e.g. coherent MTi
    • G01S13/5244Adaptive clutter cancellation

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  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Radar Systems Or Details Thereof (AREA)

Description

(54) A SYSTEM FOR SUPPRESSING UNDESIRABLE ECHOES IN A PULSE COHERENT RADAR (71) We, SELENIA INDUSTRIE ELETTRONICHE ASSOCIATE S.p.A., an Italian Body Corporate of Via Tiburtina, Km 12,40000131 Rome, Italy, do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement:- The invention relates to a system for the suppression, by adaptive or matching technique, of undesirable echoes in pulse coherent radars. More particularly, the invention relates to a system in which the cancelling of undesirable echoes can be carried out by adaptive or matching technique, if these echoes are caused by obstacles moving at a certain speed relative to the radar.
The totality of these undesirable echoes, caused for example by reflections from the terrain, the sea or rain, will be referred to as clutter. The problem of cancelling clutter in radar displays has generally been dealt with by the use of MTI (Moving Target Indicator) cancellers. These moving target indicator cancellers are nothing but filters, the parameters of which are determined once and for all during the design stage.
The functioning of such a canceller is based on the analysis of the Doppler signal obtained from the radar echo and from a coherent generator. The design of conventional MTIs is normally carried out in such a way that the frequency response is zero when the Doppler frequency is zero, which leads to the cancelling only of those unwanted echoes which are due to obstacles that are not moving relative to the radar.
Generally, however, there emerges as an important problem the cancellation also echoes which are due to obstacles that are moving relative to the radar, such as in typical cases echoes caused by rain, sea or terrain. Under these conditions an MTI of this fixed weight type is not capable of delivering acceptable average values of improvement for the signal/clutter ratio.
To solve the first of these problems there has been developed the AMTI (Airborne Moving Target Indicator) system, specifically for mobile platform radars. In these systems the relative speed of the mobile platform is compensated for by varying the frequency of the coherent oscillator in such a way as to have a zero Doppler frequency for fixed obstacles.
In the AMTI the frequency of the coherent oscillator can change at most once for each scan. Thus if during the same scan terrain clutter and rain clutter are present at different distances, the AMTI permits an effective cancellation of the stronger clutter and a poor cancellation of the other. In the case of a stationary radar and moving clutter no satisfactory solutions have so far been found within the framework of erasure using the MTI. Instead, other techniques have been used (for example, batteries of Doppler filters) which however involve an excessive circuit complexity.To eliminate the disadvantages mentioned so far, a system has been developed based on the invention to be described, the basic purpose of which is to allow the erasure of unwanted echoes caused both by obstacles that are stationary with respect to the radar as well as by obstacles having a relative speed not equal to zero.
To reach this goal- a system has been proposed which is made up of a conventional type canceller having at one input a signal having a constant weight equal to 1 and at the other input a weighted signal that is varied by matching. That is to say, this weight of this signal is variable in such a way as to make the frequency response of the canceller equal to zero from one instant to the next for a Doppler frequency value equal to the average frequency of the unwanted echoes.
Accordingly the invention provides a system for suppressing undesirable echoes in a pulse coherent radar, wherein the suppression of the undesirable echoes is carried out in an adaptive or matching manner by applying two successive scanning signals to respective inputs of a canceller and by making use of a variable weighting signal which is determined by processing the complex video signal relating to the two successive scans, converting one of these video signals into its conjungated complex, subsequently multiplying this latter signal by that relating to the other scan, introducing into the multiplicand an even number of successive delays all of a magnitude equal to the width of the range resolution cell, summing the contributions of the various signals thus delayed, with the exception of one to which there has been applied the mean number of the said successive delays, and normalising to the value 1 the total signal obtained by means of the summing operation, the normalised signal being the said variable weighting signal wherein the said variable weighting signal is utilised to multiply the signal relating to one scan before the latter is sent to one of the inputs of the canceller, at the other input of the canceller there is provided, with the weight 1, the signal relating to the succeeding scan and the signals relating to these two scans are delayed such that the output signal of the canceller is delayed by a time equal to the width of the resolution cell multiplied by one-half of the said even number of delays.
The invention will now be described, by way of example, with reference to the accompanying diagrammatic drawings, in which: Fig. 1 is a block diagram of a system incorporating the invention, and which is used for a simple illustration of its mode of functioning, Fig. 2 is a block diagram similar to Figure 1 in which the method of using multiple cancellers is illustrated, Fig. 3 is a block diagram of a system incorporating the invention in which cancellation is effected by a recursive AMTI of the conventional type, Fig. 4 represents a block diagram similar to Figure 2, but takes into account the complex nature of the incoming radar signal, and shows the operators which act on the two components, phase and quadrature of the signal itself, and Fig. 4a is a detailed block diagram of the complex multiplier of Figure 1.
In order to make the functioning of the circuit easier to understand there is now given a short mathematical introduction concerning the principles involved in the working of the circuit.
To obtain an estimate of the average Doppler frequency of the clutter fD or, in other words, the Doppler phase 4)D=27rfnT (T=repetition time), it is sufficient to consider the clutter voltages for two successive scans, even if the canceller involves more than two scans. Thus, indicating with V, and V, the complex video voltages, separated by a repetition time, at the input to the MTI, we obtain E[V,*V2]-p1C2eivD where C2=the average freqency of the clutter p,=the correlation coefficient V,*=the complex conjugated value of V1 E[V,*V2=the estimated value of the product V1*V2.
We can obtain the Doppler phase with the operation: ElV1*V2l =ei?D ( I ) lE[V1*V2*ll Therefore to find the Doppler phase Ds or more precisely the complex number eivD it is necessary to have an estimate of the complex quantity V1*V2 This can be done for a clutter spread over a wider area by setting an average distance. The estimate of the complex number must be based on a necessarily limited number of range cells, so that there occurs a fluctuating time error which creates a loss of improvement in the signal/clutter ratio compared with a nonmatching canceller working with clutter at an average Doppler frequency equal to zero.From the tests that have been carried out, it has been determined that this loss is very small and specifically turns out to be less than 1--2 dB for values of the correlation coefficient between 0.95 and 0.995.
It is seen that in the case of a simple canceller, the weights needed to bring the zero of its frequency response to the frequency f0 are 1 and ei2XfDT. In fact adopting these weights, the output signal VU(F) of the canceller and the input signal V, (f) are linked by the following equation:: Vu(f)=Vj(f)[l=-exp (~j27c(f-f,)T)1 from which derives Vu(f) =1-exp [~i27c(f--f,)T] Vj(f) and also Vu(f) =2lsin7r(ffD)T V,(F) which coincides with the frequency response of the simple canceller with weights of 1 and -1 centered on the frequency fD- It is possible, as shown in Figure 2 to arrange a multiple canceller with zeroes of its frequency response centered on the frequency fD, simply by setting up several simple cancellers in cascade connection, each of them with the zero centered on the frequency fD- Referring now to Figure 1, there is described in greater detail the mode of operation of the system incorporating the invention.
The incoming complex video signal Vl is fed into the circuit D, which introduces a delay T equal to the repetition time.
Therefore at branch points 1 and 2 signals V1 and V2 respectively will be present at the same time, which represent the incoming signal from two successive scans.
The operator C transforms the complex signal V1 into its conjungate V1*, which is brought to the input of the multiplier M1, at the other input of which is present the signal V2. The multiplier will then emit the outgoing complex signal V,*V2 which, as already has been noted (from equation 1), permits us to find the Doppler phase.
The output from the multiplier Mr is connected with a series of delay circuits R1, each of which create a delay equal to the breadth of the range resolution cell. In the Figure, merely for purposes of an example, there appear four delay circuits At the output of the R, circuits are available the values of the product V,*V2, regarding successive resolution cells. The weight estimate is carried out by adding, by means of the adder S, the signals indicated as V1*V2, with the exception of the one which is located at the output of the second delay circuit R1, for a reason which will be explained later.
The output of this operator S is normalized at a value of 1 by means of a coherent limiter L which thus provides the estimated value eivD. The cancellation element (canceller) E by means of the delay circuit R2 receives at one input the delayed signal V2 with a delay equal to 21, or in other words twice the breadth of the resolution cell. The signal V1 arrives at the second input E, after this signal has been delayed for a time 2T by a second delay circuit R2 and weighted with the factor eivD by means of the multiplier M2 Because of the presence of the delays R2 the canceller E operates on video signals coming from two successive sweeps, whose arrival at the input has preceded by a time 27 the current input signal V,.
It must be noted that it is necessary to avoid obtaining a weight signal for application to the multiplier M2 by using the video signal which is derived from a video input signal that is contemporaneous with the one present at the canceller positive input, weighted as one because this would lead to a partial cancellation of the useful signal as well. For this reason the signal which is leaving the central circuit of the chain of delays R1, and which is delayed to the same extent as the signal which is going through the delays R2, is not, as has been mentioned, sent to the adder S and therefore does not make up part of the weight eivD, thus avoiding the undesired cancellation effect already pointed out.
For the case in which the number of cells R1 is not four, as we assumed in Figure 1 for purposes of illustration, but has the general value of n, the delay introduced by each of the circuits R2 must be equal to n/21. In fact, as has already been pointed out, to avoid the partial cancellation of the useful signal it is always necessary for the delay introduced by R2 to be equal to half of the delay introduced by the whole chain of circuits R1.
Figure 2 illustrates a different version of the diagram of Figure 1 using an N-level matching canceller made up of a cascade series of N individual cancellers, each having a matching weight equal to that provided by the single estimate block B.
In yet another version the canceller can be replaced with a recursive MTI with weights dependent on the estimated fD so as to bring the zero of the frequency response of the MTI to the value of this fD. A block diagram of this version is given in Figure 3.
It should be mentioned at this point that Figures 1, 2 and 3 represent only outlines of the principle involved since these figures, for greater simplicity of description, does not show the electrical signals as being made up of the two components, real and imaginary, which in reality are present, since we are dealing here with complex magnitudes.
Figure 4 therefor represents a block diagram similar to that of Figure 1 which shows instead the circuit structure necessary for working on the two components of the signal that have been mentioned.
In this Figure we have used the same references as in Figure 1 to indicate operators that are carrying out similar functions.
As regards Figure 4, the symbols xj and y, indicate, respectively, the in phase component and the quadrature phase component of the incoming video signal V,.
Each of these components is delayed by a time of T, equal to the repetition time, delay circuit D.
The complex signal present at the input to the pair of circuits D will be indicated as V2 and the signal at the output of these circuits will be designated as V1, in conformity with the annotation of Figure 1.
The imaginary component of the signal thus delayed has its sign changed by the inverter I and, together with the real component of the delayed signal, constitutes the signal V,* conjugated with V,. The signal V,* is fed into the complex multiplier M1, into which is also fed the incoming video signal in its two components, xj and yj.
The phase and quadrature components of the signal V,*V2 are present at the output from the multiplier. Each of these components is fed into a series of delay circuits R1 One circuit S adds up the sum of the phase components of the signals V1*V2, which are present at the output of the multiplier M1, and of the delays R1 with the exception of the signal present at the output of the second delay. The reason for this has already been given.
Similarly, a second circuit S adds up the sum of the corresponding phase components of the delayed signals.
The two signals present at the output of the two adders make up, after the subsequent normalization carried out by the coherent limiter, the estimated value of eis9D, or in other words the matching weight in its two components. One of two cancellers E receives at one input a component of the signal V2 delayed by circuit R2 for a time 2 equal to twice the breadth of the resolution cell. Into the other input of the same element is fed the corresponding component of the outgoing signal from the complex multiplier M2, into whose input are fed the components of V1, each delayed by the delay circuits R2 for a time 2T mentioned above.The second canceller E works in a similar way on the other signal component V2 which in turn is also delayed by a further circuit R2, as well as on the corresponding component of the outgoing signal from the multiplier M2. It must be borne in mind that the indicated delay circuits R2 create a delay time equal to 21 when the number of relays R1 is equal to four. As has already been said, whenever the number of delays is equal to n these delays R2 will create a delay equal to n/21.
Into the multiplier M2 mentioned above are fed the two components of the estimated and normalized value of the signal V1*V2=eivD which therefore makes up the matching weight of the canceller.
The structure of the two complex multipliers M1 and M2 is illustrated in greater detail in Figure 4a.
Here with the symbols IR, 1I, 2R, 21 we indicate respectively the real and imaginary components of two signals which are subject to multiplication. With UR and Ul we indicate the same components of the signal produced which is present in the output of the multiplier.
This multiplier is made up of four conventional multipliers (Il, 12, 13 and 14).
The first of these, 11 works on the two real components IR and 2R of the incoming signals, while the second, 12, handles the two corresponding imaginary components II and 21. The outputs of multipliers 11 and 12 are connected with the addition circuit SI, which is of conventional type, and which provides the real component UR of the outgoing signal of the complex multiplier.
Multiplier 13 gives the product of the real component IR and the imaginary component 21 of the incoming signals while multiplier 14 gives the product of the components 11, 2R of these signals.
The outgoing signals of multipliers 13 and 14 after the sum added up by the adder S2 make up the imaginary component of the outgoing signal from the complex multipler.
The system incorporating the invention in question depicted in Figure 4 in its preferred version can be set up using digital components, with all the obvious advantages that this technique makes possible.
In a typical version using digital techniques we have employed four bits to represent the parts of the complex magnitudes involved in the functioning so as to keep the complexity of the circuitry within limits and without creating a significant reduction in the improvement of the signal/clutter ratio for the case of a single canceller.
If the use of a multiple canceller is desired, it may be appropriate to use a larger number of bits.
In the four bit version, we have used 5 printed circuit cards of 213.3 mm by 196.8 mm, each capable of holding up to 45 micrologics to put together the part of the circuit that carries out the weight estimate (B).
It must be underlined at this point that all the operators, multipliers, adders, delays, inverters and cancellers are of the most conventional type and well known to experts in the field. We have therefor not included any description of them. As far as the coherent limiter is concerned, in the preferred version we have employed Programmable Read Only Memories (PROM). These are set up according to the input-output configuration that it is desired to obtain, writing in the memory cells which correspond to t'ne various input values the values of the desired output. In other words, the input is the address of a memory cell in which is written the corresponding output.
All the components required to set up the preferred version already described are widely available and are generally manufactured on medium scale in integrated form (MSI) by such companies as Texas Fairchild, and others.
The invention in question has been described and illustrated in a specific form of application, but it must be understood that this invention can be subjected to changes and substitutions both in components and in circuit logics without for that reason losing its established patent protection.
WHAT WE CLAIM IS: 1. A system for suppressing undesirable echoes in a pulse coherent radar, wherein the suppression of the undesirable echoes is carried out in an adaptive or matching manner by applying two successive scanning signals to respective inputs of a canceller and by making use of a variable weighting signal which is determined by processing the complex video signals relating to the two successive scans, converting one of these video signals into its conjugated complex, subsequently multiplying this latter signal by that relating to the other scan, introducing into the multiplicant an even number of successive delays all of a magnitude equal to the width of the range resolution cell, summing the contributions of the various signals thus delayed, with the exception of one to which there has been applied the mean number of the said successive delays, and normalising to the value 1 the total signal obtained by means of the summing operation, the normalised signal being the said variable weighting signal wherein the said variable weighting signal is utilised to multiply the signal relating to one scan before the latter is sent to one of the inputs of the canceller, at the other input of the canceller there is provided, with the weight 1, the signal relating to the succeeding scan and the signals relating to these two scans are delayed such that the output signal of the canceller is delayed by a time equal to the width of the resolution cell multiplied by one-half of the said even number of delays.
2. A system according to Claim 1, wherein the said complex video signals relating to two successive scans are present simultaneously at the input and the output of a delay element which introduces a delay equal to the period of repetition of the radar.
3. A system according to Claim 2, wherein the said canceller has a plurality of single stages of cancellation connected together in cascade, each of which is adjusted by the same variable weight.
4. A system according to Claim 3, wherein the said canceller includes a recursive MTI circuit.
5. A system according to Claim 2, wherein the two real and imaginary signal components of the input video signal are applied respectively to two initial delay circuits, which introduce delays in said signal components equal to the period of repetition, the outputs of which, after the inversion of the imaginary component carried out by an inverter, are applied to a pair of inputs of a first complex multiplier, to the other pair of inputs of which there are applied the said real and imaginary components of the video input signal, the outputs of the said complex multiplier being connected respectively to a first and second delay circuit and totalising circuit, each of which operates by introducing successive delays equal to one another and equal to the width of the resolution cell in distance and then totalling the successive delayed signals except the one which has a mean delay, wherein the outputs of the said first and second delay circuits and totalising circuits are connected to the two inputs of a coherent limiter having two outputs which are applied to a pair of inputs of a second complex multiplier, to another pair of inputs of which there are connected the outputs of the two said initial delay circuits, via a pair of additional delay circuits, each introducing a delay equal to the said mean delay, and wherein the two outputs of the said second multiplier are connectedrespectively to one of the two inputs of two cancellers, each having respectively on the other input the said two real and imaginary components of the video input signal previously delayed by means of two further delay circuits, by a time equal to the said mean delay, and the outputs of the said cancellers are connected to form the output signal of the system in its two real and imaginary components.
6. A system according to Claim 5, wherein all the operators function in a digital manner.
7. A system according to Claim 6, wherein the said coherent limiter consists of a
**WARNING** end of DESC field may overlap start of CLMS **.

Claims (8)

**WARNING** start of CLMS field may overlap end of DESC **. manufactured on medium scale in integrated form (MSI) by such companies as Texas Fairchild, and others. The invention in question has been described and illustrated in a specific form of application, but it must be understood that this invention can be subjected to changes and substitutions both in components and in circuit logics without for that reason losing its established patent protection. WHAT WE CLAIM IS:
1. A system for suppressing undesirable echoes in a pulse coherent radar, wherein the suppression of the undesirable echoes is carried out in an adaptive or matching manner by applying two successive scanning signals to respective inputs of a canceller and by making use of a variable weighting signal which is determined by processing the complex video signals relating to the two successive scans, converting one of these video signals into its conjugated complex, subsequently multiplying this latter signal by that relating to the other scan, introducing into the multiplicant an even number of successive delays all of a magnitude equal to the width of the range resolution cell, summing the contributions of the various signals thus delayed, with the exception of one to which there has been applied the mean number of the said successive delays, and normalising to the value 1 the total signal obtained by means of the summing operation, the normalised signal being the said variable weighting signal wherein the said variable weighting signal is utilised to multiply the signal relating to one scan before the latter is sent to one of the inputs of the canceller, at the other input of the canceller there is provided, with the weight 1, the signal relating to the succeeding scan and the signals relating to these two scans are delayed such that the output signal of the canceller is delayed by a time equal to the width of the resolution cell multiplied by one-half of the said even number of delays.
2. A system according to Claim 1, wherein the said complex video signals relating to two successive scans are present simultaneously at the input and the output of a delay element which introduces a delay equal to the period of repetition of the radar.
3. A system according to Claim 2, wherein the said canceller has a plurality of single stages of cancellation connected together in cascade, each of which is adjusted by the same variable weight.
4. A system according to Claim 3, wherein the said canceller includes a recursive MTI circuit.
5. A system according to Claim 2, wherein the two real and imaginary signal components of the input video signal are applied respectively to two initial delay circuits, which introduce delays in said signal components equal to the period of repetition, the outputs of which, after the inversion of the imaginary component carried out by an inverter, are applied to a pair of inputs of a first complex multiplier, to the other pair of inputs of which there are applied the said real and imaginary components of the video input signal, the outputs of the said complex multiplier being connected respectively to a first and second delay circuit and totalising circuit, each of which operates by introducing successive delays equal to one another and equal to the width of the resolution cell in distance and then totalling the successive delayed signals except the one which has a mean delay, wherein the outputs of the said first and second delay circuits and totalising circuits are connected to the two inputs of a coherent limiter having two outputs which are applied to a pair of inputs of a second complex multiplier, to another pair of inputs of which there are connected the outputs of the two said initial delay circuits, via a pair of additional delay circuits, each introducing a delay equal to the said mean delay, and wherein the two outputs of the said second multiplier are connectedrespectively to one of the two inputs of two cancellers, each having respectively on the other input the said two real and imaginary components of the video input signal previously delayed by means of two further delay circuits, by a time equal to the said mean delay, and the outputs of the said cancellers are connected to form the output signal of the system in its two real and imaginary components.
6. A system according to Claim 5, wherein all the operators function in a digital manner.
7. A system according to Claim 6, wherein the said coherent limiter consists of a
programmable read only memory (PROM).
8. Systems for suppressing undesirable echoes in pulse coherent radars substantially as herein described with reference to and as shown in the accompanying drawings.
GB2478977A 1976-06-15 1977-06-14 System for suppressing undesirable echoes in a pulse coherent radar Expired GB1586597A (en)

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IT4995376A IT1066425B (en) 1976-06-15 1976-06-15 SYSTEM FOR THE SUPPRESSION WITH ADJUSTIVE TECHNIQUE OF UNDESIRABLE ECHES IN PULSE COHERENT RADARS

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2151426A (en) * 1983-12-09 1985-07-17 Plessey Co Plc Radar clutter filter

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2632420B1 (en) * 1987-10-16 1990-10-12 Thomson Csf METHOD AND DEVICE FOR COMPENSATING THE SPEED OF CLOUD IN A COHERENT DOPPLER RADAR AT AMBIGUOUS VARIABLE SPEED

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2151426A (en) * 1983-12-09 1985-07-17 Plessey Co Plc Radar clutter filter

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FR2355301A1 (en) 1978-01-13
DE2726700A1 (en) 1977-12-29
NL7706582A (en) 1977-12-19
DE2726700C2 (en) 1985-06-27
IT1066425B (en) 1985-03-12

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