GB1507335A - Fm demodulators - Google Patents
Fm demodulatorsInfo
- Publication number
- GB1507335A GB1507335A GB3939475A GB3939475A GB1507335A GB 1507335 A GB1507335 A GB 1507335A GB 3939475 A GB3939475 A GB 3939475A GB 3939475 A GB3939475 A GB 3939475A GB 1507335 A GB1507335 A GB 1507335A
- Authority
- GB
- United Kingdom
- Prior art keywords
- output
- circuit
- counter
- converter
- pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D3/00—Demodulation of angle-, frequency- or phase- modulated oscillations
- H03D3/02—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal
- H03D3/04—Demodulation of angle-, frequency- or phase- modulated oscillations by detecting phase difference between two signals obtained from input signal by counting or integrating cycles of oscillations
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
1507335 Binary FSK demodulators; data transmission SOC ITALIANA TELECOMUNICAZIONI SIEMENS SpA 25 Sept 1975 39394/75 Headings H3A and H4P A binary FSK demodulator comprises an input filter F 1 , a squaring circuit SQ, a circuit QD responsive to each zero-crossing of the input signal applied via SQ to provide a first pulse at 1 to enable a memory MR to store the contents of a counter CN connected to count clock pulses from TR and a second pulse at 2 to subsequently reset the counter, the demodulated output being derived via a digital to analog converter DA and a threshold circuit CT. The output of converter DA consists of two distinct voltage levels from which the two keying frequencies are obtained at the output of the threshold device CT. Power supply variations are compensated by making the output of converter DA and the reference voltage V, applied to CT dependent on the supply. The counting period of counter CN may be made equal or less than half period of the input signal. The circuit QD may include as in Fig. 2 (not shown) a two stage shift register and other logic gates.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB3939475A GB1507335A (en) | 1975-09-25 | 1975-09-25 | Fm demodulators |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB3939475A GB1507335A (en) | 1975-09-25 | 1975-09-25 | Fm demodulators |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1507335A true GB1507335A (en) | 1978-04-12 |
Family
ID=10409319
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB3939475A Expired GB1507335A (en) | 1975-09-25 | 1975-09-25 | Fm demodulators |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB1507335A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2201868A (en) * | 1987-03-04 | 1988-09-07 | Nat Semiconductor Corp | Second-order carrier/symbol synchronizer |
-
1975
- 1975-09-25 GB GB3939475A patent/GB1507335A/en not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2201868A (en) * | 1987-03-04 | 1988-09-07 | Nat Semiconductor Corp | Second-order carrier/symbol synchronizer |
GB2201868B (en) * | 1987-03-04 | 1991-08-14 | Nat Semiconductor Corp | Second-order carrier/symbol synchronizer |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4280224A (en) | Bit synchronizer with early and late gating | |
GB1324189A (en) | Data demodulator employing comparison | |
CA1154165A (en) | Manchester decoder | |
DE2965314D1 (en) | DEMODULATOR ARRANGEMENT FOR DIPHASE DIGITALLY MODULATED SIGNALS | |
EP0170454B1 (en) | Fsk demodulator | |
US3843931A (en) | Method for demodulation of a differentially phase-modulated signal | |
GB2016245A (en) | Decoding arrangements for digital data | |
US3632876A (en) | Binary to pulse waveform converter | |
GB1507335A (en) | Fm demodulators | |
CA1058288A (en) | Frequency detector circuit | |
US3801912A (en) | Frequency modulation communication system and digital carrier generator and demodulator for use therein | |
GB1245611A (en) | Improvements in frequency discriminator circuits | |
GB1501562A (en) | Signal detection apparatus | |
GB947430A (en) | Improvements in or relating to pulse-code modulation transmission systems | |
GB1455392A (en) | Data transmission systems | |
GB1381338A (en) | Signal receivers | |
ES399374A1 (en) | Installation for reading at a distance information in local stations | |
GB1458994A (en) | Demodulators for frequency shift keyed signals | |
ES475088A1 (en) | Decoder for binary coded data | |
GB1267079A (en) | ||
JPS5792413A (en) | Demodulation system for phase-modulated signal | |
JPS5466762A (en) | Code conversion circuit for 16 value orthogonal amplitude modulation | |
SU485454A1 (en) | Random Binary Sequence Analyzer | |
GB1518212A (en) | Data signal communication methods and apparatus | |
EP0204588A3 (en) | Digital timer |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PCNP | Patent ceased through non-payment of renewal fee |