GB1497745A - Bistable electronic circuit arrangement - Google Patents

Bistable electronic circuit arrangement

Info

Publication number
GB1497745A
GB1497745A GB6308/75A GB630875A GB1497745A GB 1497745 A GB1497745 A GB 1497745A GB 6308/75 A GB6308/75 A GB 6308/75A GB 630875 A GB630875 A GB 630875A GB 1497745 A GB1497745 A GB 1497745A
Authority
GB
United Kingdom
Prior art keywords
delay
output
input
latch
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB6308/75A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ital Elettronica SpA
Original Assignee
Ital Elettronica SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ital Elettronica SpA filed Critical Ital Elettronica SpA
Publication of GB1497745A publication Critical patent/GB1497745A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318522—Test of Sequential circuits
    • G01R31/318525—Test of flip-flops or latches
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/267—Reconfiguring circuits for testing, e.g. LSSD, partitioning
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/013—Modifications of generator to prevent operation by noise or interference
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H03K3/0375—Bistable circuits provided with means for increasing reliability; for protection; for ensuring a predetermined initial state when the supply voltage has been applied; for storing the actual state when the supply voltage fails

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Logic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
GB6308/75A 1974-03-15 1975-02-14 Bistable electronic circuit arrangement Expired GB1497745A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT49300/74A IT1004381B (it) 1974-03-15 1974-03-15 Dispositivo elettronico bistabile verificabile durante il servizio

Publications (1)

Publication Number Publication Date
GB1497745A true GB1497745A (en) 1978-01-12

Family

ID=11270262

Family Applications (1)

Application Number Title Priority Date Filing Date
GB6308/75A Expired GB1497745A (en) 1974-03-15 1975-02-14 Bistable electronic circuit arrangement

Country Status (10)

Country Link
US (1) US3970873A (enExample)
BE (1) BE825909A (enExample)
CA (1) CA1030608A (enExample)
CH (1) CH586976A5 (enExample)
DE (1) DE2506351C3 (enExample)
ES (1) ES435128A1 (enExample)
FR (1) FR2264427B1 (enExample)
GB (1) GB1497745A (enExample)
IT (1) IT1004381B (enExample)
NL (1) NL177961C (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11307252B2 (en) 2019-11-07 2022-04-19 Istanbul Teknik Universitesi Perfect detection of concurrent faults in CMOS circuits by exploiting reversible and preservative gates

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4742247A (en) * 1985-04-26 1988-05-03 Advanced Micro Devices, Inc. CMOS address transition detector with temperature compensation
US5541882A (en) * 1995-01-09 1996-07-30 Texas Instruments Incorporated Method of performing a column decode in a memory device and apparatus thereof
US20090067616A1 (en) * 2007-09-07 2009-03-12 Kerby William Suhre CAN echo cancellation level shifter

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3870953A (en) * 1972-08-01 1975-03-11 Roger Boatman & Associates Inc In circuit electronic component tester
US3833853A (en) * 1973-04-13 1974-09-03 Honeywell Inf Systems Method and apparatus for testing printed wiring boards having integrated circuits

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11307252B2 (en) 2019-11-07 2022-04-19 Istanbul Teknik Universitesi Perfect detection of concurrent faults in CMOS circuits by exploiting reversible and preservative gates

Also Published As

Publication number Publication date
NL7501108A (nl) 1975-09-17
ES435128A1 (es) 1977-02-01
DE2506351B2 (de) 1981-06-11
NL177961C (nl) 1985-12-16
FR2264427B1 (enExample) 1980-01-11
CH586976A5 (enExample) 1977-04-15
CA1030608A (en) 1978-05-02
DE2506351A1 (de) 1975-09-18
FR2264427A1 (enExample) 1975-10-10
BE825909A (fr) 1975-06-16
US3970873A (en) 1976-07-20
NL177961B (nl) 1985-07-16
IT1004381B (it) 1976-07-10
DE2506351C3 (de) 1982-05-27

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee