GB1485499A - Memory circuit - Google Patents

Memory circuit

Info

Publication number
GB1485499A
GB1485499A GB52615/74A GB5261574A GB1485499A GB 1485499 A GB1485499 A GB 1485499A GB 52615/74 A GB52615/74 A GB 52615/74A GB 5261574 A GB5261574 A GB 5261574A GB 1485499 A GB1485499 A GB 1485499A
Authority
GB
United Kingdom
Prior art keywords
branch
current
volts
pair
word line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB52615/74A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB1485499A publication Critical patent/GB1485499A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/402Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh
    • G11C11/4023Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh using field effect transistors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/22Modifications for ensuring a predetermined initial state when the supply voltage has been applied
    • H03K17/24Storing the actual state when the supply voltage fails
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356017Bistable circuits using additional transistors in the input circuit
    • H03K3/356052Bistable circuits using additional transistors in the input circuit using pass gates
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356104Bistable circuits using complementary field-effect transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K2217/00Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0036Means reducing energy consumption

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
GB52615/74A 1973-12-10 1974-12-05 Memory circuit Expired GB1485499A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US423422A US3870901A (en) 1973-12-10 1973-12-10 Method and apparatus for maintaining the charge on a storage node of a mos circuit
US426889A US3882467A (en) 1973-12-10 1973-12-20 Complementary field effect transistor memory cell

Publications (1)

Publication Number Publication Date
GB1485499A true GB1485499A (en) 1977-09-14

Family

ID=27025991

Family Applications (1)

Application Number Title Priority Date Filing Date
GB52615/74A Expired GB1485499A (en) 1973-12-10 1974-12-05 Memory circuit

Country Status (5)

Country Link
US (2) US3870901A (US06633600-20031014-M00021.png)
JP (1) JPS5717318B2 (US06633600-20031014-M00021.png)
DE (1) DE2458848C2 (US06633600-20031014-M00021.png)
FR (1) FR2255678B1 (US06633600-20031014-M00021.png)
GB (1) GB1485499A (US06633600-20031014-M00021.png)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE28905E (en) * 1967-10-19 1976-07-13 Bell Telephone Laboratories, Incorporated Field effect transistor memory cell
JPS5430617B2 (US06633600-20031014-M00021.png) * 1974-09-04 1979-10-02
GB1502270A (en) * 1974-10-30 1978-03-01 Hitachi Ltd Word line driver circuit in memory circuit
US3980935A (en) * 1974-12-16 1976-09-14 Worst Bernard I Volatile memory support system
JPS5199418A (en) * 1975-02-27 1976-09-02 Laurel Bank Machine Co Teidenjino ic memoriihojikairo
US3970950A (en) * 1975-03-21 1976-07-20 International Business Machines Corporation High common mode rejection differential amplifier utilizing enhancement depletion field effect transistors
US4004170A (en) * 1975-04-29 1977-01-18 International Business Machines Corporation MOSFET latching driver
DE2519323C3 (de) * 1975-04-30 1979-07-12 Siemens Ag, 1000 Berlin Und 8000 Muenchen Statisches Drei-Transistoren-Speicherelement
US4005395A (en) * 1975-05-08 1977-01-25 Sperry Rand Corporation Compatible standby power driver for a dynamic semiconductor
US4030084A (en) * 1975-11-28 1977-06-14 Honeywell Information Systems, Inc. Substrate bias voltage generated from refresh oscillator
US4175290A (en) * 1977-07-28 1979-11-20 Hughes Aircraft Company Integrated semiconductor memory array having improved logic latch circuitry
US4258430A (en) * 1978-02-08 1981-03-24 Tyburski Robert M Information collection and storage system with removable memory
US4189785A (en) * 1978-04-26 1980-02-19 National Semiconductor Corporation Complementary MOS memory array including complementary MOS memory cells therefor
US4463270A (en) * 1980-07-24 1984-07-31 Fairchild Camera & Instrument Corp. MOS Comparator circuit
US4532607A (en) * 1981-07-22 1985-07-30 Tokyo Shibaura Denki Kabushiki Kaisha Programmable circuit including a latch to store a fuse's state
US4447746A (en) * 1981-12-31 1984-05-08 International Business Machines Corporation Digital photodetectors
JPS6037531U (ja) * 1983-08-24 1985-03-15 昭和電工建材株式会社 外壁の水侵入防止構造
JPS60136084A (ja) * 1983-12-26 1985-07-19 Hitachi Ltd 半導体集積回路装置
JPH0795395B2 (ja) * 1984-02-13 1995-10-11 株式会社日立製作所 半導体集積回路
JP2937546B2 (ja) * 1991-05-30 1999-08-23 シャープ株式会社 外部電源端子を備える小型電子機器のメモリ保護装置
US5559455A (en) * 1994-12-23 1996-09-24 Lucent Technologies Inc. Sense amplifier with overvoltage protection
US5805496A (en) * 1996-12-27 1998-09-08 International Business Machines Corporation Four device SRAM cell with single bitline
KR100599130B1 (ko) * 1998-03-18 2006-07-12 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 메모리 셀을 갖는 반도체 장치
US6484265B2 (en) * 1998-12-30 2002-11-19 Intel Corporation Software control of transistor body bias in controlling chip parameters
CN105874598B (zh) * 2013-11-15 2019-06-18 德克萨斯仪器股份有限公司 用于控制耗尽型晶体管的方法和电路

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1113111A (en) * 1964-05-29 1968-05-08 Nat Res Dev Digital storage devices
US3518635A (en) * 1967-08-22 1970-06-30 Bunker Ramo Digital memory apparatus
US3533087A (en) * 1967-09-15 1970-10-06 Rca Corp Memory employing transistor storage cells
US3502909A (en) * 1968-12-10 1970-03-24 Shell Oil Co Pulsed substrate transistor inverter
US3621302A (en) * 1969-01-15 1971-11-16 Ibm Monolithic-integrated semiconductor array having reduced power consumption
GB1296067A (US06633600-20031014-M00021.png) * 1969-03-21 1972-11-15
US3579204A (en) * 1969-03-24 1971-05-18 Sperry Rand Corp Variable conduction threshold transistor memory circuit insensitive to threshold deviations
JPS5211199B1 (US06633600-20031014-M00021.png) * 1970-05-27 1977-03-29
US3702990A (en) * 1971-02-02 1972-11-14 Rca Corp Variable threshold memory system using minimum amplitude signals

Also Published As

Publication number Publication date
JPS5093747A (US06633600-20031014-M00021.png) 1975-07-26
US3882467A (en) 1975-05-06
DE2458848C2 (de) 1982-03-11
FR2255678B1 (US06633600-20031014-M00021.png) 1976-12-31
DE2458848A1 (de) 1975-06-26
FR2255678A1 (US06633600-20031014-M00021.png) 1975-07-18
JPS5717318B2 (US06633600-20031014-M00021.png) 1982-04-09
US3870901A (en) 1975-03-11

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee