GB1461393A - Pulse coded ocmmunication systems - Google Patents

Pulse coded ocmmunication systems

Info

Publication number
GB1461393A
GB1461393A GB1178773A GB1178773A GB1461393A GB 1461393 A GB1461393 A GB 1461393A GB 1178773 A GB1178773 A GB 1178773A GB 1178773 A GB1178773 A GB 1178773A GB 1461393 A GB1461393 A GB 1461393A
Authority
GB
United Kingdom
Prior art keywords
pulse
gate
counter
signal
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1178773A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Research Development Corp UK
National Research Development Corp of India
Original Assignee
National Research Development Corp UK
National Research Development Corp of India
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Research Development Corp UK, National Research Development Corp of India filed Critical National Research Development Corp UK
Priority to GB1178773A priority Critical patent/GB1461393A/en
Publication of GB1461393A publication Critical patent/GB1461393A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/18Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22Demodulator circuits; Receiver circuits
    • H04L27/233Demodulator circuits; Receiver circuits using non-coherent demodulation
    • H04L27/2335Demodulator circuits; Receiver circuits using non-coherent demodulation using temporal properties of the received signal
    • H04L27/2337Demodulator circuits; Receiver circuits using non-coherent demodulation using temporal properties of the received signal using digital techniques to measure the time between zero-crossings
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/068Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection by sampling faster than the nominal bit rate

Abstract

1461393 Determining significance of data bits NATIONAL RESEARCH DEVELOPMENT CORP 12 March 1974 [12 March 1973] 11787/73 Heading H4P In an apparatus for determining the significance of data bits in a two state data signal, especially of bit representations in a phase modulated signal in the presence of noise, a generator 16 e.g. a ring counter, provides a set of N pulse trains, a-h, starting one after another throughout an interval of t seconds, the pulses in each train occurring at t second intervals, being the same as the data bit duration. The pulse trains are applied to coincidence gates 8-15, the other input of each gate receiving a pulse m initiated at each transition in the data signal l. The output of each gate is coupled to a respective counter 17-24, each of which delivers a gating pulse at a predetermined count. Thus the counter associated with the pulse train most nearly in phase with the data signal transitions will rapidly run up to the predetermined count (e.g. 15) whereas the others which will only respond to odd, spurious transitions, will not. The gating pulse from the operated counter controls a respective latch 25-32 to hold open a respective gate 33-40. This gate receives one of the pulse trains, a-h, occurring half a bit (t/2) after the pulses applied to the counter controlling the latch. The sampling output from the selected gate 33-40 is sampled to the main logic circuit 41 to determine the appropriate sampling instants for the data signal. The arrangement is for use in analysing data signals derived from a phase comparator 5 in which a required phase shift keyed signal transmitted by a responder 1 in a vehicle in response to an interrogating signal from a generator 3 and radiating loop 2 is compared with the locally generated interrogating signal.
GB1178773A 1973-03-12 1973-03-12 Pulse coded ocmmunication systems Expired GB1461393A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB1178773A GB1461393A (en) 1973-03-12 1973-03-12 Pulse coded ocmmunication systems

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1178773A GB1461393A (en) 1973-03-12 1973-03-12 Pulse coded ocmmunication systems

Publications (1)

Publication Number Publication Date
GB1461393A true GB1461393A (en) 1977-01-13

Family

ID=9992701

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1178773A Expired GB1461393A (en) 1973-03-12 1973-03-12 Pulse coded ocmmunication systems

Country Status (1)

Country Link
GB (1) GB1461393A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112820225A (en) * 2019-11-15 2021-05-18 京东方科技集团股份有限公司 Data cache circuit, display panel and display device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112820225A (en) * 2019-11-15 2021-05-18 京东方科技集团股份有限公司 Data cache circuit, display panel and display device
CN112820225B (en) * 2019-11-15 2023-01-24 京东方科技集团股份有限公司 Data cache circuit, display panel and display device

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee