GB1457880A - Calculator data storage system - Google Patents

Calculator data storage system

Info

Publication number
GB1457880A
GB1457880A GB5804273A GB5804273A GB1457880A GB 1457880 A GB1457880 A GB 1457880A GB 5804273 A GB5804273 A GB 5804273A GB 5804273 A GB5804273 A GB 5804273A GB 1457880 A GB1457880 A GB 1457880A
Authority
GB
United Kingdom
Prior art keywords
calculator
data
chip
digit
registers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5804273A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/368,906 external-priority patent/US3944983A/en
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of GB1457880A publication Critical patent/GB1457880A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098Register arrangements
    • G06F9/30141Implementation provisions of register files, e.g. ports
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4243Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7864Architectures of general purpose stored program computers comprising a single central processing unit with memory on more than one IC chip
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Complex Calculations (AREA)

Abstract

1457880 Calculator system TEXAS INSTRUMENTS Inc 14 Dec 1973 [11 June 1973 (3)] 58042/73 Heading G4A A calculator implemented on semi-conductor integrated circuit chips is provided with one or more additional data stores each formed on an integrated circuit chip. The calculator may be as described in UK Specification numbers 1,401,204 and 1,401,265 and the additional data storage chips may be of the kind described in Specification 1,401,203 and U.S. Specification number 3,851,313. Each storage chip may provide ten, sixteen digit registers and has four data input/output leads for receiving address data and for exchanging data with the calculator in the form of BCD digits parallel by bit serial by digit, and control inputs. Accessing an additional data storage chip occupies four instruction cycles. During the first the chip responds to a FLAG control input from the calculator indicating that the data following is address data, any data appearing at the data inputs being otherwise ignored. In the following cycle the first, third, and fourth digits of a sixteen digit word supplied by the calculator designate respectively whether the operation required is input or output (relative to the storage chip) or the clearing of a specified register or registers, the particular register involved, and the particular chip involved, the remaining digits being unused. Each chip has four prewired inputs for comparison with the chip select digit, there being a further input to allow up to 32 chips of additional storage to be addressed. In the third cycle the FLAG control signal is reset and in the fourth sixteen digits of data are transferred between the calculator and the selected register or the selected chip. It is stated that a one digit delay occurs in the calculator and the additional storage chips are arranged to receive data from the calculator and perform a right shift, the last digit being buffered until the right shift has been completed, and to transmit data to the calculator one digit early. Clear operation may involve all registers in all additional storage chips, all registers in a selected chip, or selected registers in a selected chip. Address decoders used to select a register for data output to the calculator are powered only at times within a cycle of the system when they are required in order to reduce the power drain.
GB5804273A 1973-06-11 1973-12-14 Calculator data storage system Expired GB1457880A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US36890173A 1973-06-11 1973-06-11
US36878073A 1973-06-11 1973-06-11
US05/368,906 US3944983A (en) 1973-06-11 1973-06-11 Expandable data storage for a calculator system

Publications (1)

Publication Number Publication Date
GB1457880A true GB1457880A (en) 1976-12-08

Family

ID=27408885

Family Applications (1)

Application Number Title Priority Date Filing Date
GB5804273A Expired GB1457880A (en) 1973-06-11 1973-12-14 Calculator data storage system

Country Status (1)

Country Link
GB (1) GB1457880A (en)

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee