GB1439279A - Storage circuit - Google Patents
Storage circuitInfo
- Publication number
- GB1439279A GB1439279A GB4768973A GB4768973A GB1439279A GB 1439279 A GB1439279 A GB 1439279A GB 4768973 A GB4768973 A GB 4768973A GB 4768973 A GB4768973 A GB 4768973A GB 1439279 A GB1439279 A GB 1439279A
- Authority
- GB
- United Kingdom
- Prior art keywords
- gate
- gates
- enabled
- output
- control circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Pulse Circuits (AREA)
- Shift Register Type Memory (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US29931272A | 1972-10-20 | 1972-10-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1439279A true GB1439279A (en) | 1976-06-16 |
Family
ID=23154258
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB4768973A Expired GB1439279A (en) | 1972-10-20 | 1973-10-12 | Storage circuit |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US3784918A (enExample) |
| JP (1) | JPS5227017B2 (enExample) |
| DE (1) | DE2352877B2 (enExample) |
| GB (1) | GB1439279A (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3943378A (en) * | 1974-08-01 | 1976-03-09 | Motorola, Inc. | CMOS synchronous binary counter |
| AT345902B (de) * | 1975-03-25 | 1978-10-10 | Siemens Ag | Integrierte bausteinschaltung mit mehreren verknuepfungsgliedern fuer unterschiedliche verknuepfungsfunktionen |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3075091A (en) * | 1960-02-03 | 1963-01-22 | Ibm | Data latching systems |
| US3308384A (en) * | 1964-08-31 | 1967-03-07 | Rca Corp | One-out-of-n storage circuit employing at least 2n gates for n input signals |
| US3339145A (en) * | 1965-04-05 | 1967-08-29 | Ibm | Latching stage for register with automatic resetting |
| US3509366A (en) * | 1967-02-23 | 1970-04-28 | Ibm | Data polarity latching system |
| US3508079A (en) * | 1967-04-24 | 1970-04-21 | Burroughs Corp | Logic sensing circuit with single pushbutton operation |
| FR1537712A (fr) * | 1967-04-26 | 1968-08-30 | Bull General Electric | Perfectionnements aux étages de transfert-stockage pour registres à décalage et arrangements analogues |
| US3679915A (en) * | 1971-03-04 | 1972-07-25 | Ibm | Polarity hold latch with common data input-output terminal |
-
1972
- 1972-10-20 US US00299312A patent/US3784918A/en not_active Expired - Lifetime
-
1973
- 1973-10-12 GB GB4768973A patent/GB1439279A/en not_active Expired
- 1973-10-18 JP JP48117350A patent/JPS5227017B2/ja not_active Expired
- 1973-10-22 DE DE2352877A patent/DE2352877B2/de active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| US3784918A (en) | 1974-01-08 |
| JPS5227017B2 (enExample) | 1977-07-18 |
| JPS4975043A (enExample) | 1974-07-19 |
| DE2352877A1 (de) | 1974-04-25 |
| DE2352877B2 (de) | 1975-10-16 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed [section 19, patents act 1949] | ||
| PLNP | Patent lapsed through nonpayment of renewal fees |