GB1392376A - Sampling and holding circuits - Google Patents

Sampling and holding circuits

Info

Publication number
GB1392376A
GB1392376A GB3647872A GB3647872A GB1392376A GB 1392376 A GB1392376 A GB 1392376A GB 3647872 A GB3647872 A GB 3647872A GB 3647872 A GB3647872 A GB 3647872A GB 1392376 A GB1392376 A GB 1392376A
Authority
GB
United Kingdom
Prior art keywords
comparator
capacitor
aug
inputs
sample
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB3647872A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Licentia Patent Verwaltungs GmbH
Original Assignee
Licentia Patent Verwaltungs GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Licentia Patent Verwaltungs GmbH filed Critical Licentia Patent Verwaltungs GmbH
Publication of GB1392376A publication Critical patent/GB1392376A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C27/00Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/02Sample-and-hold arrangements
    • G11C27/024Sample-and-hold arrangements using a capacitive memory element
    • G11C27/026Sample-and-hold arrangements using a capacitive memory element associated with an amplifier

Abstract

1392376 Electric analogue calculating LICENTIA PATENT-VERWALTUNGS-GmbH 4 Aug 1972 [11 Aug 1971] 36478/72 Heading G4G A sample-and-hold circuit in which a voltage representative of an input signal U1 has to be stored in a capacitor C for a period of time comprises a comparator K which receives as inputs the input signal U1 and (via buffer amplifier V) the voltage stored on capacitor C, the comparator controlling through logic circuit L two current sources I 2 , I 3 which charge capacitor C in such a way as to make the inputs to comparator K equal. The sample-and-hold sequence is determined by gating signals t ab and t H . The output signal U3 is taken from terminals T1, T2.
GB3647872A 1971-08-11 1972-08-04 Sampling and holding circuits Expired GB1392376A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19712140186 DE2140186A1 (en) 1971-08-11 1971-08-11 SAMPLE AND HOLDING CIRCLE FOR ANALOGUE / DIGITAL CONVERTER

Publications (1)

Publication Number Publication Date
GB1392376A true GB1392376A (en) 1975-04-30

Family

ID=5816427

Family Applications (1)

Application Number Title Priority Date Filing Date
GB3647872A Expired GB1392376A (en) 1971-08-11 1972-08-04 Sampling and holding circuits

Country Status (2)

Country Link
DE (1) DE2140186A1 (en)
GB (1) GB1392376A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2718175C2 (en) * 1977-04-23 1983-12-15 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Sample and hold circuit for a phase discriminator

Also Published As

Publication number Publication date
DE2140186A1 (en) 1973-02-22

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee