GB1309194A - Logic system building block - Google Patents
Logic system building blockInfo
- Publication number
- GB1309194A GB1309194A GB3512171A GB3512171A GB1309194A GB 1309194 A GB1309194 A GB 1309194A GB 3512171 A GB3512171 A GB 3512171A GB 3512171 A GB3512171 A GB 3512171A GB 1309194 A GB1309194 A GB 1309194A
- Authority
- GB
- United Kingdom
- Prior art keywords
- blocks
- terminals
- block
- pins
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09B—EDUCATIONAL OR DEMONSTRATION APPLIANCES; APPLIANCES FOR TEACHING, OR COMMUNICATING WITH, THE BLIND, DEAF OR MUTE; MODELS; PLANETARIA; GLOBES; MAPS; DIAGRAMS
- G09B23/00—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes
- G09B23/06—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics
- G09B23/18—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism
- G09B23/183—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism for circuits
- G09B23/186—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism for circuits for digital electronics; for computers, e.g. microprocessors
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Computational Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Analysis (AREA)
- Computer Hardware Design (AREA)
- Mathematical Physics (AREA)
- Algebra (AREA)
- Business, Economics & Management (AREA)
- Educational Administration (AREA)
- Educational Technology (AREA)
- Theoretical Computer Science (AREA)
- Logic Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Credit Cards Or The Like (AREA)
- Instructional Devices (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19712106257 DE2106257A1 (de) | 1971-02-10 | 1971-02-10 | Computer-Lehrspiel |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1309194A true GB1309194A (en) | 1973-03-07 |
Family
ID=5798334
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB3512171A Expired GB1309194A (en) | 1971-02-10 | 1971-07-27 | Logic system building block |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US3728534A (https=) |
| JP (1) | JPS4718445A (https=) |
| DE (1) | DE2106257A1 (https=) |
| FR (1) | FR2124213B1 (https=) |
| GB (1) | GB1309194A (https=) |
Families Citing this family (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3764919A (en) * | 1972-12-22 | 1973-10-09 | Shintron Co Inc | An n-ary of flip-flop cells interconnected by rows of logic gates |
| US4068304A (en) * | 1973-01-02 | 1978-01-10 | International Business Machines Corporation | Storage hierarchy performance monitor |
| JPS49115745A (https=) * | 1973-03-09 | 1974-11-05 | ||
| US3881260A (en) * | 1973-07-05 | 1975-05-06 | James M Hombs | Self-teaching machine for binary logic |
| US3996457A (en) * | 1974-11-20 | 1976-12-07 | Gabriel Edwin Z | Electronic analog computers |
| AT345902B (de) * | 1975-03-25 | 1978-10-10 | Siemens Ag | Integrierte bausteinschaltung mit mehreren verknuepfungsgliedern fuer unterschiedliche verknuepfungsfunktionen |
| US3975836A (en) * | 1975-03-31 | 1976-08-24 | Broder Leonard J | Logic learning apparatus |
| DE2555483C3 (de) * | 1975-12-10 | 1981-09-17 | Groh, Goswin, 8600 Bamberg | Vorrichtung zum leicht veränderbaren Aufbau einer elektrischen Schaltung |
| JPS5294046A (en) * | 1976-02-04 | 1977-08-08 | Jiyunichi Senba | Basic device for forming logical circuit |
| DE2626585C2 (de) * | 1976-06-14 | 1982-04-22 | Heinrich 2803 Weyhe Nienaber | Vorrichtung zur elektronischen Verbindung von digitalen Bauelementen |
| USD251598S (en) | 1977-10-18 | 1979-04-17 | Gabriel Edwin Z | Electronic analog computer |
| US4306286A (en) * | 1979-06-29 | 1981-12-15 | International Business Machines Corporation | Logic simulation machine |
| DE2948620C2 (de) * | 1979-12-03 | 1986-01-09 | Ing. Bihler Elektroanlagen, Hermann Bihler GmbH & Co, 8000 München | Schaltplatte zum Aufbau und zur Demonstration von elektrischen oder elektronischen Schaltungen |
| GB2090037B (en) * | 1980-12-18 | 1984-08-30 | Denshiburokkukikiseizo Kk | Electronic teaching device |
| US4464120A (en) * | 1982-02-05 | 1984-08-07 | Kaj Jensen | Simulator systems for interactive simulation of complex dynamic systems |
| US4656580A (en) * | 1982-06-11 | 1987-04-07 | International Business Machines Corporation | Logic simulation machine |
| JPS597389A (ja) * | 1982-07-02 | 1984-01-14 | 財団法人能力開発工学センタ− | コンピユ−タ学習用構案装置 |
| US4697241A (en) * | 1985-03-01 | 1987-09-29 | Simulog, Inc. | Hardware logic simulator |
| US5369593A (en) * | 1989-05-31 | 1994-11-29 | Synopsys Inc. | System for and method of connecting a hardware modeling element to a hardware modeling system |
| US5353243A (en) * | 1989-05-31 | 1994-10-04 | Synopsys Inc. | Hardware modeling system and method of use |
| GB8927057D0 (en) * | 1989-11-30 | 1990-01-31 | Barclay Alex D | Teaching apparatus |
| GB8927281D0 (en) * | 1989-12-01 | 1990-01-31 | Univ Strathclyde | Method and apparatus for simulation of a physical process |
| DE19607194A1 (de) * | 1996-02-26 | 1997-08-28 | Siemens Ag | Vergossene, leiterplattenlose elektrische/elektronische Baugruppe |
| DE102008051401B4 (de) * | 2008-10-11 | 2010-08-05 | Festo Ag & Co. Kg | Trainings- und Simulationsgerät für elektrische Funktionsabläufe in elektrischen, elektromechanischen und elektrofluidischen Anlagen |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3100943A (en) * | 1958-10-28 | 1963-08-20 | Gen Atronics Corp | Computing device |
| US3278736A (en) * | 1962-11-13 | 1966-10-11 | James J Pastoriza | Educational apparatus |
| GB1097401A (en) * | 1964-03-06 | 1968-01-03 | Lan Electronics Ltd | Improvements in or relating to computer circuit demonstrating devices |
| US3309793A (en) * | 1964-11-30 | 1967-03-21 | Hickok Teaching Systems Inc | Digital computer trainer |
| US3428903A (en) * | 1965-08-02 | 1969-02-18 | Ibm | Multipurpose logic circuit for performing 254 out of 256 discrete logical combinations of three variables |
| US3446990A (en) * | 1965-12-10 | 1969-05-27 | Stanford Research Inst | Controllable logic circuits employing functionally identical gates |
| FR1483778A (fr) * | 1966-02-26 | 1967-06-09 | Snecma | Procédé et dispositif de recherche de trajet optimal |
| US3493939A (en) * | 1967-04-10 | 1970-02-03 | Us Army | Priority sequencing device |
-
1971
- 1971-02-10 DE DE19712106257 patent/DE2106257A1/de active Pending
- 1971-07-27 GB GB3512171A patent/GB1309194A/en not_active Expired
- 1971-07-30 US US00167634A patent/US3728534A/en not_active Expired - Lifetime
- 1971-08-05 FR FR7128752A patent/FR2124213B1/fr not_active Expired
- 1971-08-06 JP JP5910071A patent/JPS4718445A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| FR2124213A1 (https=) | 1972-09-22 |
| DE2106257A1 (de) | 1972-08-24 |
| JPS4718445A (https=) | 1972-09-14 |
| FR2124213B1 (https=) | 1977-01-21 |
| US3728534A (en) | 1973-04-17 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed [section 19, patents act 1949] | ||
| PLNP | Patent lapsed through nonpayment of renewal fees |