GB1300495A - Logic circuit arrangement using insulated gate field effect transistors - Google Patents

Logic circuit arrangement using insulated gate field effect transistors

Info

Publication number
GB1300495A
GB1300495A GB08062/71A GB1806271A GB1300495A GB 1300495 A GB1300495 A GB 1300495A GB 08062/71 A GB08062/71 A GB 08062/71A GB 1806271 A GB1806271 A GB 1806271A GB 1300495 A GB1300495 A GB 1300495A
Authority
GB
United Kingdom
Prior art keywords
igfet
pairs
pair
logic
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB08062/71A
Other languages
English (en)
Inventor
Yasoji Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP4615570A external-priority patent/JPS4934248B1/ja
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority claimed from JP46036812A external-priority patent/JPS5036145B1/ja
Publication of GB1300495A publication Critical patent/GB1300495A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/0948—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
GB08062/71A 1970-05-30 1971-05-28 Logic circuit arrangement using insulated gate field effect transistors Expired GB1300495A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP4615570A JPS4934248B1 (enExample) 1970-05-30 1970-05-30
JP46036812A JPS5036145B1 (enExample) 1971-05-28 1971-05-28

Publications (1)

Publication Number Publication Date
GB1300495A true GB1300495A (en) 1972-12-20

Family

ID=26375908

Family Applications (1)

Application Number Title Priority Date Filing Date
GB08062/71A Expired GB1300495A (en) 1970-05-30 1971-05-28 Logic circuit arrangement using insulated gate field effect transistors

Country Status (4)

Country Link
US (1) US3769523A (enExample)
FR (1) FR2100705B1 (enExample)
GB (1) GB1300495A (enExample)
NL (1) NL174792C (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5738996B2 (enExample) * 1973-03-20 1982-08-18
US3986042A (en) * 1974-12-23 1976-10-12 Rockwell International Corporation CMOS Boolean logic mechanization
US4032795A (en) * 1976-04-14 1977-06-28 Solitron Devices, Inc. Input buffer
US4464587A (en) * 1980-10-14 1984-08-07 Tokyo Shibaura Denki Kabushiki Kaisha Complementary IGFET Schmitt trigger logic circuit having a variable bias voltage logic gate section
JPS60173924A (ja) * 1984-02-20 1985-09-07 Toshiba Corp 論理回路
GB8420651D0 (en) * 1984-08-14 1984-09-19 British Telecomm Interface circuit
US4710649A (en) * 1986-04-11 1987-12-01 Raytheon Company Transmission-gate structured logic circuits
JPH0289292A (ja) * 1988-09-26 1990-03-29 Toshiba Corp 半導体メモリ
US4888499A (en) * 1988-10-19 1989-12-19 Ncr Corporation Three input exclusive OR-NOR gate circuit
JP2749185B2 (ja) * 1990-07-11 1998-05-13 シャープ株式会社 複合論理回路
JPH04192716A (ja) * 1990-11-26 1992-07-10 Mitsubishi Electric Corp Ｍｏｓトランジスタ出力回路
JP5301262B2 (ja) 2008-12-19 2013-09-25 ルネサスエレクトロニクス株式会社 半導体装置、及び動作モ−ド切換方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3356858A (en) * 1963-06-18 1967-12-05 Fairchild Camera Instr Co Low stand-by power complementary field effect circuitry
GB1113111A (en) * 1964-05-29 1968-05-08 Nat Res Dev Digital storage devices
US3501751A (en) * 1965-12-06 1970-03-17 Burroughs Corp High speed core memory with low level switches for sense windings
US3449594A (en) * 1965-12-30 1969-06-10 Rca Corp Logic circuits employing complementary pairs of field-effect transistors
US3322974A (en) * 1966-03-14 1967-05-30 Rca Corp Flip-flop adaptable for counter comprising inverters and inhibitable gates and in cooperation with overlapping clocks for temporarily maintaining complementary outputs at same digital level
US3541353A (en) * 1967-09-13 1970-11-17 Motorola Inc Mosfet digital gate

Also Published As

Publication number Publication date
NL174792C (nl) 1984-08-01
FR2100705B1 (enExample) 1973-06-08
FR2100705A1 (enExample) 1972-03-24
NL174792B (nl) 1984-03-01
NL7107355A (enExample) 1971-12-02
US3769523A (en) 1973-10-30
DE2126665A1 (de) 1971-12-16
DE2126665B2 (de) 1977-03-24

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
435 Patent endorsed 'licences of right' on the date specified (sect. 35/1949)
PE20 Patent expired after termination of 20 years