GB1189908A - Process for the Contacting of Semi-Conductor Arrangements - Google Patents

Process for the Contacting of Semi-Conductor Arrangements

Info

Publication number
GB1189908A
GB1189908A GB48292/67A GB4829267A GB1189908A GB 1189908 A GB1189908 A GB 1189908A GB 48292/67 A GB48292/67 A GB 48292/67A GB 4829267 A GB4829267 A GB 4829267A GB 1189908 A GB1189908 A GB 1189908A
Authority
GB
United Kingdom
Prior art keywords
regions
semi
type
electrodes
deposited
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB48292/67A
Inventor
Siegbert Heise
Hans-Joa Chin Munte
Hartwin Obernik
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Werk fuer Fernsehelektronik GmbH
Original Assignee
Werk fuer Fernsehelektronik GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to DE1614982A priority Critical patent/DE1614982B2/en
Application filed by Werk fuer Fernsehelektronik GmbH filed Critical Werk fuer Fernsehelektronik GmbH
Priority to GB48292/67A priority patent/GB1189908A/en
Priority to FR125995A priority patent/FR1541960A/en
Priority to CH1561567A priority patent/CH489911A/en
Priority to SU671196191A priority patent/SU664244A1/en
Publication of GB1189908A publication Critical patent/GB1189908A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • C25D7/12—Semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Electrochemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

1,189,908. Semi-conductor devices. WERK FUR FERNSEHELEKTRONIK VEB. 24 Oct., 1967, No. 48292/67. Heading H1K. [Also in Division C7] Electrodes are applied to the P-type regions of a semi-conductor device having at least one PN junction by placing the device in an electrolytic bath and applying an alternating current between an N-type region and a counter electrode in the bath. Electrode material is deposited on the P-type regions owing to the rectifying action of the junction but there is no resultant deposit on the N-type regions. If it is desired to deposit electrodes on N-type regions as well, for example in a transistor, the surface of the device is covered with an oxide layer, windows are formed in the layer at the points where electrodes are required, and metallic conductive tracks are vapour deposited on the layer to connect each N-type region with an adjacent P-type region. Lacquer layers are applied to the tracks except where they contact the regions, and electrolysis is carried out as before so that electrode material is deposited on the exposed parts of the regions.
GB48292/67A 1966-11-09 1967-10-24 Process for the Contacting of Semi-Conductor Arrangements Expired GB1189908A (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
DE1614982A DE1614982B2 (en) 1966-11-09 1967-09-15 Method for galvanic contacting of a multiplicity of semiconductor arrangements arranged in rows on a crystal disk made of semiconductor material
GB48292/67A GB1189908A (en) 1966-11-09 1967-10-24 Process for the Contacting of Semi-Conductor Arrangements
FR125995A FR1541960A (en) 1966-11-09 1967-10-26 Method of contacting semiconductor devices
CH1561567A CH489911A (en) 1966-11-09 1967-11-08 Method for contacting semiconductor arrangements
SU671196191A SU664244A1 (en) 1966-11-09 1967-11-09 Method of making contacts for semiconductor devices

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
DD12080766 1966-11-09
DD12606067 1967-07-18
DEV0034439 1967-09-15
GB48292/67A GB1189908A (en) 1966-11-09 1967-10-24 Process for the Contacting of Semi-Conductor Arrangements

Publications (1)

Publication Number Publication Date
GB1189908A true GB1189908A (en) 1970-04-29

Family

ID=27430180

Family Applications (1)

Application Number Title Priority Date Filing Date
GB48292/67A Expired GB1189908A (en) 1966-11-09 1967-10-24 Process for the Contacting of Semi-Conductor Arrangements

Country Status (4)

Country Link
CH (1) CH489911A (en)
DE (1) DE1614982B2 (en)
GB (1) GB1189908A (en)
SU (1) SU664244A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19963550B4 (en) * 1999-12-22 2004-05-06 Epigap Optoelektronik Gmbh Bipolar illumination source from a self-bundling semiconductor body contacted on one side
DE102011005743B3 (en) * 2011-03-17 2012-07-26 Semikron Elektronik Gmbh & Co. Kg Method for depositing a metal layer on a semiconductor device
DE102013217300A1 (en) * 2013-08-30 2014-05-08 Robert Bosch Gmbh MEMS microphone device, has electrically separate electrode portions formed in doped semiconductor layer and electrically separated from each other by p/n junction, and capacitor arrangement provided with electrode

Also Published As

Publication number Publication date
DE1614982B2 (en) 1974-02-21
DE1614982A1 (en) 1971-02-25
SU664244A1 (en) 1979-05-25
CH489911A (en) 1970-04-30

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PLNP Patent lapsed through nonpayment of renewal fees