GB1081812A - Data handling system - Google Patents

Data handling system

Info

Publication number
GB1081812A
GB1081812A GB41683/64A GB4168364A GB1081812A GB 1081812 A GB1081812 A GB 1081812A GB 41683/64 A GB41683/64 A GB 41683/64A GB 4168364 A GB4168364 A GB 4168364A GB 1081812 A GB1081812 A GB 1081812A
Authority
GB
United Kingdom
Prior art keywords
central control
program
store
order
sequence
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB41683/64A
Inventor
Anton Henry Doblmaier
Randall William Downing
Michael Peter Fabisch
John Allen Harr
Harold Frederick May
John Stanley Nowak
Frank Finley Taylor
Werner Ulrich
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of GB1081812A publication Critical patent/GB1081812A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4812Task transfer initiation or dispatching by interrupt, e.g. masked
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    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751Error or fault detection not based on redundancy
    • G06F11/0754Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
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    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
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    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1405Saving, restoring, recovering or retrying at machine instruction level
    • G06F11/141Saving, restoring, recovering or retrying at machine instruction level for bus or memory accesses
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    • G06F11/1633Error detection by comparing the output of redundant processing systems using mutual exchange of the output between the redundant processing components
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    • G06F11/1645Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components and the comparison itself uses redundant hardware
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    • G06F11/1629Error detection by comparing the output of redundant processing systems
    • G06F11/165Error detection by comparing the output of redundant processing systems with continued operation after detection of the error
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    • G06F11/1629Error detection by comparing the output of redundant processing systems
    • G06F11/1654Error detection by comparing the output of redundant processing systems where the output of only one of the redundant processing components can drive the attached hardware, e.g. memory or I/O
    • GPHYSICS
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    • G06F11/1666Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
    • GPHYSICS
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    • G06F11/1675Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1679Temporal synchronisation or re-synchronisation of redundant processing components at clock signal level
    • GPHYSICS
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    • G06F11/1675Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1687Temporal synchronisation or re-synchronisation of redundant processing components at event level, e.g. by interrupt or result of polling
    • GPHYSICS
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    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
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    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2023Failover techniques
    • G06F11/2033Failover techniques switching over of hardware resources
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2043Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant where the redundant components share a common memory address space
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018Bit or string instructions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3875Pipelining a single stage, e.g. superpipelining
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4812Task transfer initiation or dispatching by interrupt, e.g. masked
    • G06F9/4825Interrupt from clock, e.g. time of day
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • H04Q3/42Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54541Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
    • H04Q3/5455Multi-processor, parallelism, distributed systems
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • H04Q3/42Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54575Software application
    • H04Q3/54591Supervision, e.g. fault localisation, traffic measurements, avoiding errors, failure recovery, monitoring, statistical analysis
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2007Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/845Systems in which the redundancy can be transformed in increased performance

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Software Systems (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computer Hardware Design (AREA)
  • Monitoring And Testing Of Exchanges (AREA)
  • Interface Circuits In Exchanges (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

1,081,812. Automatic exchange systems. WESTERN ELECTRIC CO. Inc. Oct. 13, 1964 [Dec. 31, 1963], No. 41683/64. Heading H4K. [Also in Division G4] The data-processing system of the No. 1 ES5 comprises duplicated program stores, central controls and transmission buses between the stores and controls, a fault occurring in any one of these units bringing up an emergencyaction-sequence-device which alters the combinations of units in a set sequence and tests each new combination in turn using a special program until the faulty unit is eliminated. The location and nature of the fault are printed out so that the necessary maintenance can be performed. The system is applied to a telephone exchange using ferreed cross-points. The general method of operation of the exchange under the control of the data processor is similar to that described in Specification 904,164. General description.-The system operates on the basis of a 5.5 Ásec. machine cycle and usually a program order word obtained from the program store 102 can be processed and the necessary ensuing actions be performed within this period. However certain order words, e.g. those for maintenance testing or those which require further data from a memory, need further processing or require more time for their execution and in such cases central control either allots additional cycles to these order words without interrupting the sequence of obtaining program order words (buffer stores being used to store the extra information) or else it interrupts the sequence until the order has been completed. Various so-called " sequencers " are located in central control to effect these operations. Also if errors are detected during processing of an order word, then the relevant sequencer is brought-in to effect a correction. If the error is not corrected the emergency action sequencer is enabled. The program stores 102 are semi-permanent memories comprising twisters and information is stored therein as 44 bit words. Each word is duplicated and access to either or both words is possible. A word comprises 37 bits of information and 7 bits of redundant encoding. The stored information includes program order words and translation data, e.g. subscribers' directory-equipment numbers, class of service and special service facilities. The call stores 103 are temporary memories comprising ferrite sheets and information is stored therein as 24 bit words. Each word is duplicated, either or both being accessible. Normally central control addresses a call store twice in order to receive all 24 bits of a word. Processing words from a call store normally takes longer than the basic machine cycle. The call stores contain information relating to:- the conditions of lines, links etc.; AMA; maintenance; and " recent change " data (e.g. information regarding a recent change of a subscriber's number is stored in stores 103 until such time as sufficient new information has accumulated to warrant the rewriting of a program order word in stores 102). The communication buses 105, 106 &c. are multi-conductor-pair cables linking the various equipments. Each pair is duplicated and either or both may be used. The buses act inherently as tapped delay lines. They are transformer coupled at each end to their associated equipments. Data is transmitted in parallel in the form of ¢Ásec pulses. Separate bus systems are used in each direction. Pairs of central pulse distributers 143 are utilized for enabling circuit elements such as line scanners 123, switching network controllers 122 &c. Their outputs are in the form of unipolar or bipolar pulses. Flip-flops controlled by the former pulses must be reset before receipt of such a pulse. Central control supplies address information to all pulse distributers simultaneously but it only supplies an enable signal to one particular pulse distributer. The master scanners 144 (not duplicated), line scanners 123 and trunk scanners are used for monitoring test points in the system or supervizing the state of network equipment, e.g. the free or busy state of a line or link. The scanners comprise matrices of ferrods. Central control 101 processes data on a purely logical basis (AND, OR, EXCLUSIVE OR, PRODUCT MASK, UNION MASK, COMPLEMENT &c.) but it is provided with auxiliary equipment for performing minor arithmetic functions, e.g. add, subtract, shift, rotate. It receives order words from the call store in respect of " recent change " data. However, it chiefly receives order words from the program store. These words are in the form of decision or non-decision orders. The former require central control to observe certain conditions in the system and then to decide whether to advance to the next order in the current sequence of orders or to transfer to a new sequence. Non-decision orders are employed to communicate with units external to central control and to move data from one location to another, processing the data if necessary. In general completion of the latter type of order causes central control to execute the next order in the sequence. The duplicated central controls normally work in-step and as far as possible in-step working is maintained even under fault conditions. Thus, if, in the active central control, an error is detected whereby a fault correction sequencer is started, e.g. to cause re-reading from a memory, then additional machine cycles are required to accommodate the extra sequence of events. In order to prevent the other (standby) central control from getting out of step in these circumstances use is made of cross-connections between the controls whereby an indication that the active central control is being subjected to a certain fault procedure is signalled to the other control which thereupon adjusts itself accordingly. In the event of emergency action, e.g. if the error is not corrected, in-step working is not maintained. The composition of the program order words and the way in which they are processed in central control is described in the Specification. Faults and errors.-Almost all " communications " between central control and the other equipments in the system are verified in some way. For the very important communication between central control and a program store three simultaneous checks are made viz.: (1) Hamming code for detecting one or two errors accompanies each word transmitted, (2) synchronizing signals for ensuring that only the relevant gates are opened at a particular time and (3) all-seems-well signals (A.S.W.). In other communications the addressed equipment signals its identity to central control whereby matching of the transmitted and received addresses is checked. Simple check or parity bits may accompany some addresses. Certain test points in each equipment are periodically checked by means of the scanners. In the event of detection of any error the relevant sequencer is energized. Emergency action is initiated if a timer, started at the commencement of any fault correction sequence, times out. This could occur for example if the sequencer performing the correction is itself at fault or else if there is a true, i.e. non-correctible fault in the equipment being checked. Lack of output from the control clock source always initiates emergency action. Lack of synchronism between the passage of " real time " and the passage of time as indicated by the execution of program orders and continuous performance of certain functions to the exclusion of other functions which would normally be expected to occur also initiate emergency action. Emergency action comprises repetitive performance of four basic programs: (a) Basic sanity maze program which involves a sequence of tests on the program store and central control; (b) Central pulse distributer which involves communications between central control and the pulse distributer; (c) Call store check; and (d) Emergency action evaluation program which is used when emergency action is initiated at frequent intervals (correction apparently being achieved after each initiation). The emergency action sequencer alters the combinations of equipment used, in the following order, the above mentioned programs being initiated at each alternative, until the fault is cleared:- (1) Initial state, above programs first executed; (2) The roles (active or standby) of the two central controls are exchanged; (3) The roles of the buses to and from the program stores are exchanged; (4) A particular bus (first) and particular program store (first) are selected; (5) The other bus (second) and the first store are selected; (6) The second bus and second store are selected; (7) The first bus and second store are selected; (8) spare. For steps (9) to (14), the other central control is used in a sequence similar to (3) to (8) above. In the unlikely event that the fault is not detected and corrected, intervention by maintenance personnel is demanded.
GB41683/64A 1963-12-31 1964-10-13 Data handling system Expired GB1081812A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US33487563A 1963-12-31 1963-12-31

Publications (1)

Publication Number Publication Date
GB1081812A true GB1081812A (en) 1967-09-06

Family

ID=23309246

Family Applications (7)

Application Number Title Priority Date Filing Date
GB41682/64A Expired GB1081811A (en) 1963-12-31 1964-10-13 Data handling system
GB41683/64A Expired GB1081812A (en) 1963-12-31 1964-10-13 Data handling system
GB41686/64A Expired GB1081815A (en) 1963-12-31 1964-10-13 System for detecting changes in supervisory states of a communication system
GB41684/64A Expired GB1081813A (en) 1963-12-31 1964-10-13 Data handling system
GB41687/64A Expired GB1081816A (en) 1963-12-31 1964-10-13 Data handling system
GB41685/64A Expired GB1081814A (en) 1963-12-31 1964-10-13 Data handling system
GB41688/64A Expired GB1081817A (en) 1963-12-31 1964-10-13 Communication switching system

Family Applications Before (1)

Application Number Title Priority Date Filing Date
GB41682/64A Expired GB1081811A (en) 1963-12-31 1964-10-13 Data handling system

Family Applications After (5)

Application Number Title Priority Date Filing Date
GB41686/64A Expired GB1081815A (en) 1963-12-31 1964-10-13 System for detecting changes in supervisory states of a communication system
GB41684/64A Expired GB1081813A (en) 1963-12-31 1964-10-13 Data handling system
GB41687/64A Expired GB1081816A (en) 1963-12-31 1964-10-13 Data handling system
GB41685/64A Expired GB1081814A (en) 1963-12-31 1964-10-13 Data handling system
GB41688/64A Expired GB1081817A (en) 1963-12-31 1964-10-13 Communication switching system

Country Status (13)

Country Link
US (1) US3570008A (en)
JP (1) JPS514062B1 (en)
AT (7) AT269518B (en)
BE (7) BE654492A (en)
BR (4) BR6463327D0 (en)
CH (7) CH479993A (en)
DE (6) DE1474094B (en)
DK (4) DK114415B (en)
FR (7) FR1442298A (en)
GB (7) GB1081811A (en)
IL (7) IL22242A (en)
NL (8) NL145065B (en)
SE (4) SE326990B (en)

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US3723975A (en) * 1971-06-28 1973-03-27 Ibm Overdue event detector
US3737870A (en) * 1972-04-24 1973-06-05 Ibm Status switching arrangement
US3892928A (en) * 1973-10-09 1975-07-01 Bell Telephone Labor Inc Switching system equipped with line verification apparatus
US4053751A (en) * 1976-04-28 1977-10-11 Bell Telephone Laboratories, Incorporated Adaptable exerciser for a memory system
US4048452A (en) * 1976-05-28 1977-09-13 Bell Telephone Laboratories, Incorporated Automatic call distribution system
DE2849371A1 (en) * 1978-11-14 1980-05-29 Siemens Ag METHOD FOR TRANSMITTING INFORMATION BETWEEN FACILITIES OF AN INDIRECTLY CONTROLLED SWITCHING SYSTEM, IN PARTICULAR TELEPHONE SWITCHING SYSTEM
US4345116A (en) * 1980-12-31 1982-08-17 Bell Telephone Laboratories, Incorporated Dynamic, non-hierarchical arrangement for routing traffic
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SE334392B (en) 1971-04-26
AT269518B (en) 1969-03-25
US3570008A (en) 1971-03-09
NL6415240A (en) 1965-07-02
IL22240A (en) 1968-04-25
IL22237A (en) 1968-04-25
GB1081815A (en) 1967-09-06
BE654495A (en) 1965-04-16
NL6415236A (en) 1965-07-02
IL22242A (en) 1968-04-25
GB1081814A (en) 1967-09-06
IL22243A (en) 1968-04-25
NL6415235A (en) 1965-07-02
DE1437576A1 (en) 1969-02-27
DK115124B (en) 1969-09-08
FR1426972A (en) 1966-02-04
SE326990B (en) 1970-08-10
NL6415238A (en) 1965-07-02
DK136878C (en) 1978-05-16
IL22238A (en) 1968-04-25
FR1442332A (en) 1966-06-17
CH479992A (en) 1969-10-15
NL6415241A (en) 1965-07-02
AT274057B (en) 1969-09-10
CH476442A (en) 1969-07-31
BE657775A (en) 1965-04-16
AT272712B (en) 1969-07-25
CH479990A (en) 1969-10-15
FR1426973A (en) 1966-02-04
AT274056B (en) 1969-09-10
CH476441A (en) 1969-07-31
GB1081813A (en) 1967-09-06
DE1474095B1 (en) 1970-08-20
DE1474094B (en) 1971-04-15
AT271950B (en) 1969-06-25
BE654494A (en) 1965-04-16
GB1081817A (en) 1967-09-06
BR6463328D0 (en) 1973-06-26
BE654497A (en) 1965-04-16
SE319926B (en) 1970-01-26
IL22241A (en) 1968-04-25
IL22239A (en) 1968-04-25
NL6415237A (en) 1965-07-02
CH479993A (en) 1969-10-15
FR1446309A (en) 1966-07-22
AT271951B (en) 1969-06-25
CH477140A (en) 1969-08-15
FR1426970A (en) 1966-02-04
DE1437577A1 (en) 1969-02-20
SE312940B (en) 1969-07-28
DK114415B (en) 1969-06-30
GB1081816A (en) 1967-09-06
JPS514062B1 (en) 1976-02-07
DE1474093A1 (en) 1970-07-09
BR6463331D0 (en) 1973-06-26
BE654493A (en) 1965-04-16
DE1437577B2 (en) 1971-11-25
BR6463330D0 (en) 1973-06-26
DE1474096A1 (en) 1970-07-09
BE654492A (en) 1965-04-16
CH479991A (en) 1969-10-15
GB1081811A (en) 1967-09-06
AT273543B (en) 1969-08-11
DK136007C (en) 1978-01-09
DE1474093B2 (en) 1972-09-07
DK136878B (en) 1977-12-05
DK136007B (en) 1977-07-25
NL140351B (en) 1973-11-15
NL137733C (en)
FR1426971A (en) 1966-02-04
NL145065B (en) 1975-02-17
FR1442298A (en) 1966-06-17
BR6463327D0 (en) 1973-06-26
NL6415239A (en) 1965-07-02
DE1437576B2 (en) 1971-08-12
BE654496A (en) 1965-04-16
DE1437576C3 (en) 1972-03-16

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