GB1041750A - Improvements relating to the treatment of silicon - Google Patents

Improvements relating to the treatment of silicon

Info

Publication number
GB1041750A
GB1041750A GB4514662A GB4514662A GB1041750A GB 1041750 A GB1041750 A GB 1041750A GB 4514662 A GB4514662 A GB 4514662A GB 4514662 A GB4514662 A GB 4514662A GB 1041750 A GB1041750 A GB 1041750A
Authority
GB
United Kingdom
Prior art keywords
water
glacial acetic
acetic acid
treatment
solution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4514662A
Inventor
Edward George Heath
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Mobility Ltd
Original Assignee
Westinghouse Brake and Signal Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Westinghouse Brake and Signal Co Ltd filed Critical Westinghouse Brake and Signal Co Ltd
Priority to GB4514662A priority Critical patent/GB1041750A/en
Publication of GB1041750A publication Critical patent/GB1041750A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02019Chemical etching
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B61RAILWAYS
    • B61LGUIDING RAILWAY TRAFFIC; ENSURING THE SAFETY OF RAILWAY TRAFFIC
    • B61L3/00Devices along the route for controlling devices on the vehicle or vehicle train, e.g. to release brake, to operate a warning signal
    • B61L3/16Continuous control along the route
    • B61L3/22Continuous control along the route using magnetic or electrostatic induction; using electromagnetic radiation
    • B61L2003/228Constructional details

Abstract

An oxide-free surface is provided on a Group IVB, i.e. Si or Ge, semi-conductor substrate by chemical, i.e. non-electrolytic, etching with a solution containing less than 5% water. A suitable etchant solution comprises ammonium nitrate and ammonium bifluoride dissolved in concentrated sulphuric acid, and may include glacial acetic acid as a diluent. In the treatment of a silicon wafer, which may first have at least one surface polished by conventional methods, the wafer is immersed in the solution for 3 minutes at 40 DEG C., removed, quenched with glacial acetic acid and washed with water.ALSO:An oxide-free surface is provided on a Si semi-conductor substrate by chemical, i.e. non-electrolytic, etching with a solution containing less than 5% water. A suitable etchant solution comprises ammonium nitrate and ammonium bifluoride dissolved in concentrated sulphuric acid, and may include glacial acetic acid as a diluent. In the treatment of a silicon wafer, which may first have at least one surface polished by conventional methods, the wafer is immersed in the solution for 3 minutes at 40 DEG C., removed, quenched with glacial acetic acid and washed with water.
GB4514662A 1962-11-29 1962-11-29 Improvements relating to the treatment of silicon Expired GB1041750A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB4514662A GB1041750A (en) 1962-11-29 1962-11-29 Improvements relating to the treatment of silicon

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB4514662A GB1041750A (en) 1962-11-29 1962-11-29 Improvements relating to the treatment of silicon

Publications (1)

Publication Number Publication Date
GB1041750A true GB1041750A (en) 1966-09-07

Family

ID=10436061

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4514662A Expired GB1041750A (en) 1962-11-29 1962-11-29 Improvements relating to the treatment of silicon

Country Status (1)

Country Link
GB (1) GB1041750A (en)

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