GB1036167A - Improvements in or relating to semiconductor devices - Google Patents

Improvements in or relating to semiconductor devices

Info

Publication number
GB1036167A
GB1036167A GB9636/64A GB963664A GB1036167A GB 1036167 A GB1036167 A GB 1036167A GB 9636/64 A GB9636/64 A GB 9636/64A GB 963664 A GB963664 A GB 963664A GB 1036167 A GB1036167 A GB 1036167A
Authority
GB
United Kingdom
Prior art keywords
wafer
devices
ledges
contacts
graded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB9636/64A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB20201/62A external-priority patent/GB1010111A/en
Priority claimed from GB36013/62A external-priority patent/GB1044689A/en
Priority claimed from GB39650/62A external-priority patent/GB1023531A/en
Priority claimed from DEST19973A external-priority patent/DE1179280B/en
Priority to GB3786/64A priority Critical patent/GB1036165A/en
Priority to GB9636/64A priority patent/GB1036167A/en
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Priority to FR8137A priority patent/FR87924E/en
Priority to DEST23468A priority patent/DE1298637B/en
Priority to NL6502949A priority patent/NL6502949A/xx
Priority to BE660746D priority patent/BE660746A/xx
Publication of GB1036167A publication Critical patent/GB1036167A/en
Priority to US632874A priority patent/US3440717A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/041—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction having no base used as a mounting for the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Die Bonding (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

1,036,167. Semi-conductor devices. STANDARD TELEPHONES & CABLES Ltd. March 6, 1964, No. 9636/64. Addition to 1,023,531. Heading H1K. A semi-conductor wafer is provided with a ledge on at least one edge to enable its attitude to be sensed. The wafer, which has an insulating layer on its surface carrying a contact graded from an adherent metal adjacent the layer to a soft solderable metal remote from it, may be made as follows. Intersecting sets of parallel grooves are cut, preferably by a slow chemical etch, in one face of an N-type silicon wafer which is then surface oxidized in steam or oxygen. NPN planar transistors are next formed in the islands between the grooves as described in Specification 1,022,366. After depositing aluminium or nickel in apertures in the insulating oxide layer to contact the base, emitter and collector zones respectively graded contacts are provided extending from the deposits to large areas marked 10, 11, 12 in Fig. 6. The contacts may be graded from manganese to silver or gold to chromium and are tinned by dipping in molten lead-tin eutectic or silver solder. The wafer is next divided into single devices by cutting along the grooves using a rotary saw or an ultrasonic or spark erosion cutter in such a way that each device is rectangular and has ledges along three of its four edges (Fig. 6). The devices are mechanically mounted on headers of the type described in Specification 1,036,165 as follows. They are first shaken up a helical or linear ramp by a vibratory mechanism to the position shown in Fig. 9a (not shown). Any devices which are upside down are rejected by a tapered member on the ramp, Figs. 8a and 8b (not shown). A correctly positioned device by obscuring photo-cell aperture 25 while leaving photo-cell aperture 26 clear causes turret 27 to rotate, pushing the device into a semicircular channel, Fig. 10 (not shown), down which it slides into an inverted position where it is picked up by a suction head (Fig. 11, not shown). Incorrectly positioned devices are rejected by a reverse movement of the turret. The device 23 on the suction head is positioned over a header 31 brought up on a conveyer and the header wires soldered to the contacts with which they are in register. Excess solder runs on to the oxide coated ledges. After coating with silicone resin the device is mounted in a can or plastics encapsulation as described in Specification 1,036,165. In another embodiment, a planar diode wafer with ledges on all four edges is mounted in a glass envelope between two rigid metal plugs or between such a plug and a resilient contact member as described with reference to Figs. 15-18 (not shown). In each case the ledge by catching excess solder reduces the possibility of a short-circuit. In arrangements with contacts on both wafer faces alignment ledges may be provided on both faces. Instead of silicon germanium and gallium arsenide may be used for the wafers in which case the insulating layer is of resin or deposited silicon oxide. The invention may be applied to silicon controlled rectifiers, tinned diodes, and solid circuits, any of which may employ triangular or circular wafers, and be mounted on headers as described in Specifications 870,599 and 1,026,164.
GB9636/64A 1962-05-25 1964-03-06 Improvements in or relating to semiconductor devices Expired GB1036167A (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
GB3786/64A GB1036165A (en) 1962-05-25 1964-01-29 Improvements in or relating to semiconductor devices
GB9636/64A GB1036167A (en) 1962-05-25 1964-03-06 Improvements in or relating to semiconductor devices
FR8137A FR87924E (en) 1964-01-29 1965-03-05 Semiconductor device enhancements
DEST23468A DE1298637B (en) 1964-03-06 1965-03-06 Method for serial machine contacting of semiconductor component electrodes
BE660746D BE660746A (en) 1962-05-25 1965-03-08
NL6502949A NL6502949A (en) 1964-03-06 1965-03-08
US632874A US3440717A (en) 1964-03-06 1967-03-16 Method of making semiconductor devices

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
GB20201/62A GB1010111A (en) 1962-05-25 1962-05-25 Vapour deposition of metallic films
GB36013/62A GB1044689A (en) 1962-09-21 1962-09-21 Improvements in or relating to mountings for semi-conductor devices
GB39650/62A GB1023531A (en) 1962-05-25 1962-10-19 Improvements in or relating to semiconductor devices
DEST19973A DE1179280B (en) 1962-11-09 1962-11-09 Process for the production of solderable contact points
GB48863/62A GB1024216A (en) 1962-05-25 1962-12-28 Improvements in or relating to circuit modules including semiconductor devices
GB9636/64A GB1036167A (en) 1962-05-25 1964-03-06 Improvements in or relating to semiconductor devices

Publications (1)

Publication Number Publication Date
GB1036167A true GB1036167A (en) 1966-07-13

Family

ID=27544935

Family Applications (2)

Application Number Title Priority Date Filing Date
GB3786/64A Expired GB1036165A (en) 1962-05-25 1964-01-29 Improvements in or relating to semiconductor devices
GB9636/64A Expired GB1036167A (en) 1962-05-25 1964-03-06 Improvements in or relating to semiconductor devices

Family Applications Before (1)

Application Number Title Priority Date Filing Date
GB3786/64A Expired GB1036165A (en) 1962-05-25 1964-01-29 Improvements in or relating to semiconductor devices

Country Status (2)

Country Link
BE (1) BE660746A (en)
GB (2) GB1036165A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2545653B1 (en) * 1983-05-04 1986-06-06 Pichot Michel METHOD AND DEVICE FOR ENCAPSULATING INTEGRATED CIRCUITS

Also Published As

Publication number Publication date
GB1036165A (en) 1966-07-13
BE660746A (en) 1965-09-08

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